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7635898 |
Methods for fabricating semiconductor devices
Semiconductor devices and methods for fabricating a semiconductor devices are disclosed. A disclosed method comprises: forming a first gate electrode functioning as a flash memory; forming first...
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7633124 |
Semiconductor device and method of manufacturing thereof
A silicon nitride film having a thickness of 3 nm or less is formed on the surfaces of a P-well and N-well, as well as on the upper and side surfaces of a gate electrode, in which the silicon...
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7602029 |
Configuration and method of manufacturing the one-time programmable (OTP) memory cells
This invention discloses an one time programmable (OTP) memory. The OTP memory includes a first and a second metal oxide semiconductor (MOS) transistors connected in parallel and controlled by a...
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7602019 |
Drive circuit and drain extended transistor for use therein
A transistor comprises a source region of a first conductivity type and electrically communicating with a first semiconductor region. The transistor also comprises a drain region of the first...
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7598575 |
Semiconductor die with reduced RF attenuation
The attenuation of an RF signal on a metal trace in a semiconductor die is substantially reduced by utilizing a number of RF blocking structures that lie on the surface of the substrate directly...
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7554156 |
Semiconductor device having a field effect transistor using a high dielectric constant gate insulating film and manufacturing method of the same
In a method for manufacturing a semiconductor device having an N-channel field effect transistor, the N-channel field effect transistor is formed by a process including the steps of forming a high...
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7547592 |
PMOS depletable drain extension made from NMOS dual depletable drain extensions
In accordance with an embodiment of the invention, there is an integrated circuit device having a complementary integrated circuit structure comprising a first MOS device. The first MOS device...
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7545006 |
CMOS devices with graded silicide regions
A semiconductor device includes a semiconductor substrate, a gate stack overlying the semiconductor substrate, a spacer on a sidewall of the gate stack, a lightly doped source/drain (LDD) region...
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7544996 |
Methods of fabricating a semiconductor device having a metal gate pattern
A method of fabricating a semiconductor device having a metal gate pattern is provided in which capping layers are used to control the relative oxidation rates of portions of the metal gate pattern...
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7541653 |
Mask ROM devices of semiconductor devices and method of forming the same
Disclosed are a mask ROM device and a method of forming the same. This device includes a plurality of cells. At least one among the plurality of cells is programmed. The programmed cell includes a...
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7538387 |
Stack SiGe for short channel improvement
A semiconductor structure includes a first compound layer including an element, and a first impurity having a first impurity concentration; and a second compound layer including the element and a...
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7535065 |
Thin film transistor device utilizing transistors of differing material characteristics
A first insulating film is formed. Then, a gate electrode of a low voltage drive thin film transistor and a mask film for covering a region constituting a channel of a high voltage drive thin film...
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7528445 |
Wing gate transistor for integrated circuits
A system is provided for forming a semiconductor device. Layers of gate dielectric material, gate material, and cap material are formed on a semiconductor substrate. The cap material and a portion...
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7528442 |
Semiconductor device and manufacturing method thereof
In this invention, the semiconductor device is provided with a gate electrode formed on a gate insulating film in a region sectioned by an element isolation formed on a semiconductor layer of the...
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7525165 |
Light emitting device and manufacturing method thereof
The light emitting device according to the present invention is characterized in that a gate electrode comprising a plurality of conductive films is formed, and concentrations of impurity regions...
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7525158 |
Semiconductor device having pixel electrode and peripheral circuit
A TFT formed on an insulating substrate source, drain and channel regions, a gate insulating film formed on at least the channel region and a gate electrode formed on the gate insulating film....
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7521767 |
MOS transistor in a semiconductor device
Methods of forming a MOS transistor and a MOS transistor fabricated thereby are provided. The MOS transistor includes a semiconductor substrate of a first conductivity type, and an insulated gate...
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7521768 |
Electric device comprising an LDMOS transistor
The LDMOS transistor ( 99 ) of the invention is provided with a stepped shield structure ( 50 ) and/or with a first ( 25 ) and a second ( 26 ) drain extension region having a higher dopant...
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7518198 |
Transistor and method for manufacturing the same
A transistor including a semiconductor substrate defined with an active region and a device isolation region, a gate formed on the semiconductor substrate, an insulating spacers formed on...
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7514744 |
Semiconductor device including carrier accumulation layers
A semiconductor device includes a gate structure on a channel region of a semiconductor substrate adjacent to a source/drain region therein and a surface insulation layer directly on the...
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7511340 |
Semiconductor devices having gate structures and contact pads that are lower than the gate structures
Semiconductor devices have gate structures on a semiconductor substrate with first spacers on sidewalls of the respective gate structures. First contact pads are positioned between the gate...
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7498642 |
Profile confinement to improve transistor performance
A semiconductor device having well-defined profiles is disclosed. A p-type pocket/halo region is preferably formed along a channel-side border of the heavily doped source/drain region to neutralize...
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7495295 |
Semiconductor device and method for fabricating the same
In a semiconductor device according to the present invention, the power source voltage Vdd 1 of a core transistor Tr 1, the power source voltage Vdd 2 of an I/O transistor Tr 2, and the power...
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7495297 |
Semiconductor device and method for manufacturing the same
A semiconductor device, comprising: a first transistor of a second electric conductivity type formed in a substrate including impurities of a first electric conductivity type; and a second...
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7491988 |
Transistors with increased mobility in the channel zone and method of fabrication
A semiconductor transistor structure with increased mobility in the channel zone and a method of its fabrication are described. A semiconductor substrate having a first dopant is formed. A...
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7492029 |
Asymmetric field effect transistors (FETs)
A semiconductor structure. The structure includes (a) a semiconductor channel region, (b) a semiconductor source block in direct physical contact with the semiconductor channel region; (c) a source...
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7492017 |
Semiconductor transistor having a stressed channel
A process is described for manufacturing an improved PMOS semiconductor transistor. Recesses are etched into a layer of epitaxial silicon. Source and drain films are deposited in the recesses. The...
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7482233 |
Embedded non-volatile memory cell with charge-trapping sidewall spacers
An IC includes both “volatile” CMOS transistors (FETs) and embedded non-volatile memory (NVM) cells, both including polysilicon gate structures, sidewall oxide layers, sidewall spacer...
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7473976 |
Lateral power transistor with self-biasing electrodes
A semiconductor power transistor includes a drift region of a first conductivity type and a well region of a second conductivity type in the drift region such that the well region and the drift...
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7470956 |
Semiconductor device and manufacturing method thereof
A semiconductor device has a semiconductor base, an anode electrode, and a cathode electrode. The semiconductor base includes a P type semiconductor substrate, an insulating film, an N − type...
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7465978 |
Field effect transistor with a high breakdown voltage and method of manufacturing the same
An electric field effect transistor of high breakdown voltage and a method of manufacturing the same are disclosed. A recessed portion is formed at the channel region and is filled by a protective...
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7456448 |
Semiconductor device and method for producing the same
A semiconductor device, including a first MIS-type transistor formed in a first region of a semiconductor region, the first region being of a first conductivity type, the first MIS-type transistor...
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7446375 |
Quasi-vertical LDMOS device having closed cell layout
A low voltage power device includes a plurality of quasi-vertical LDMOS device cells. A conductive trench sinker is formed through the epitaxial layer and adjacent a selected one of the source and...
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7446377 |
Transistors and manufacturing methods thereof
Transistors and manufacturing methods thereof are disclosed. An example transistor includes a semiconductor substrate divided into device isolation regions and a device active region. The example...
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7436035 |
Method of fabricating a field effect transistor structure with abrupt source/drain junctions
Microelectronic structures embodying the present invention include a field effect transistor (FET) having highly conductive source/drain extensions. Formation of such highly conductive source/drain...
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7436026 |
Semiconductor device comprising a superlattice channel vertically stepped above source and drain regions
A semiconductor device may include a semiconductor substrate and at least one metal oxide semiconductor field-effect transistor (MOSFET). The at least one MOSFET may include spaced apart source and...
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7429771 |
Semiconductor device having halo implanting regions
A MIS-type semiconductor device includes a p-type semiconductor substrate, a gate insulating film formed on the semiconductor substrate, a gate electrode formed on the gate insulating film, and...
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RE40486 |
Self-aligned non-volatile memory cell
Disclosed is a self-aligned non-volatile memory cell including a small sidewall spacer electrically coupled and being located next to a main floating gate region. Both the small sidewall spacer and...
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7420250 |
Electrostatic discharge protection device having light doped regions
Provided are an electrostatic discharge (ESD) protection device and a method for making such a device. In one example, the ESD protection device includes a Zener diode region formed in a substrate...
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7414292 |
Semiconductor device and its manufacturing method
A semiconductor device manufacturing method includes, forming isolation region having an aspect ratio of 1 or more in a semiconductor substrate, forming a gate insulating film, forming a silicon...
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7408234 |
Semiconductor device and method for manufacturing the same
An object of the present invention is to provide a semiconductor device that is able to realize a low on-resistance maintaining a high drain-to-source breakdown voltage, and a method for...
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7408233 |
Semiconductor device having N-channel thin film transistor with LDD regions and P-channel thin film transistor with LDD region
A MIS type semiconductor device and a method for fabricating the same characterized in that impurity regions are selectively formed on a semiconductor substrate or semiconductor thin film and are...
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7405443 |
Dual gate lateral double-diffused MOSFET (LDMOS) transistor
Method and apparatus for providing a lateral double-diffused MOSFET (LDMOS) transistor having a dual gate. The dual gate includes a first gate and a second gate. The first gate includes a first...
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7405458 |
Asymmetric field transistors (FETs)
A semiconductor structure and a method for forming the same. The structure includes (a) a semiconductor channel region, (b) a semiconductor source block in direct physical contact with the...
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7405450 |
Semiconductor devices having high conductivity gate electrodes with conductive line patterns thereon
Semiconductor devices that include a semiconductor substrate and a gate line are provided. The gate line is on the semiconductor substrate and includes a gate insulation pattern and a gate...
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7402872 |
Method for forming an integrated circuit
A method is described for manufacturing an n-MOS semiconductor transistor. Recesses are formed in a semiconductor substrate adjacent a gate electrode structure. Silicon is embedded in the recesses...
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7400018 |
End of range (EOR) secondary defect engineering using chemical vapor deposition (CVD) substitutional carbon doping
A method for incorporating carbon into a wafer at the interstitial a-c silicon interface of the halo doping profile is achieved. A bulk silicon substrate is provided. A carbon-doped silicon layer...
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7388264 |
Semiconductor device having LDD-type source/drain regions and fabrication method thereof
A semiconductor device having LDD-type source/drain regions and a method of fabricating the same are provided. The semiconductor device includes at least a pair of gate patterns disposed on a...
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7388228 |
Display device and method of manufacturing the same
Thin film transistors for a display device each include a semiconductor layer made of polysilicon having a channel region, drain and source regions at both sides of the channel region and doped...
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7388265 |
Thin film transistor and fabrication method thereof
A thin film transistor (TFT) with a self-aligned lightly-doped region and a fabrication method thereof. An active layer has a channel region, a first doped region and a second doped region, in...
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