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Match Document Document Title
9041126 Deeply depleted MOS transistors having a screening layer and methods thereof  
A semiconductor transistor structure fabricated on a silicon substrate effective to set a threshold voltage, control short channel effects, and control against excessive junction leakage may...
9029956 SRAM cell with individual electrical device threshold control  
A static random access memory cell is provided that includes first and second inverters formed on a substrate each having a pull-up and pull-down transistor configured to form a cell node. Each of...
9006843 Source/drain extension control for advanced transistors  
A planar transistor with improved performance has a source and a drain on a semiconductor substrate that includes a substantially undoped channel extending between the source and the drain. A gate...
8994117 Moat construction to reduce noise coupling to a quiet supply  
A semiconductor chip having a P− substrate and an N+ epitaxial layer grown on the P− substrate is shown. A P− circuit layer is grown on top of the N+ epitaxial layer. A first moat having an...
8981494 Eco logic cell and design change method using eco logic cell  
The function of logic cells may be changed by altering their metal routing. Logic cells altered in this manner may be used to correct, substitute, or otherwise alter the operation of logic blocks...
8963249 Electronic device with controlled threshold voltage  
A field effect transistor having a source, drain, and a gate can include a semiconductor substrate, a buried insulator layer positioned on the semiconductor substrate, and a semiconductor...
8952462 Method and apparatus of forming a gate  
The present disclosure provides an apparatus that includes a semiconductor device. The semiconductor device includes a substrate. The semiconductor device also includes a first gate dielectric...
8952455 Source follower circuit or bootstrap circuit, driver circuit comprising such circuit, and display device comprising such driver circuit  
In the case of using an analog buffer circuit, an input voltage is required to be added a voltage equal to a voltage between the gate and source of a polycrystalline silicon TFT; therefore, a...
8927358 Metal oxide semiconductor device having a predetermined threshold voltage and a method of making  
A metal-oxide-semiconductor (MOS) device having a selectable threshold voltage determined by the composition of an etching solution contacting a metal layer. The MOS device can be either a p-type...
8921949 MOS P-N junction diode with enhanced response speed and manufacturing method thereof  
A MOS P-N junction diode includes a semiconductor substrate, a mask layer, a guard ring, a gate oxide layer, a polysilicon structure, a central conductive layer, a silicon nitride layer, a metal...
8921950 Semiconductor device  
A semiconductor device includes a gate electrode formed on a nitride semiconductor layer, and a source electrode and a drain electrode provided on the nitride semiconductor layer so as to...
8907431 FinFETs with multiple threshold voltages  
A device includes a substrate, a semiconductor fin over the substrate, and a gate dielectric layer on a top surface and sidewalls of the semiconductor fin. A gate electrode is spaced apart from...
8907406 Transistor having impurity distribution controlled substrate and method of manufacturing the same  
A semiconductor device according to embodiments includes a semiconductor substrate, a buried insulating layer which is formed on the semiconductor substrate, a semiconductor layer which is formed...
8901674 Scaling of metal gate with aluminum containing metal layer for threshold voltage shift  
A method of forming a p-type semiconductor device is provided, which in one embodiment employs an aluminum containing threshold voltage shift layer to produce a threshold voltage shift towards the...
8872284 FinFET with metal gate stressor  
A gate stressor for a fin field effect transistor (FinFET) device is provided. The gate stressor includes a floor, a first stressor sidewall, and a second stressor sidewall. The floor is formed on...
8836047 Reducing defect rate during deposition of a channel semiconductor alloy into an in situ recessed active region  
When forming sophisticated high-k metal gate electrode structures on the basis of a threshold voltage adjusting semiconductor alloy, a highly efficient in situ process technique may be applied in...
8809968 Semiconductor layer structure  
This invention relates to a semiconductor layer structure. The semiconductor layer structure described includes a substrate and a buffer layer deposited onto the substrate. The semiconductor layer...
8803250 Metal-oxide-semiconductor field-effect transistor and method for manufacturing the same  
A Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) is disclosed. The MOSFET includes a substrate, a well region formed in the substrate, a shallow channel layer, a channel, a gate oxide...
8803233 Junctionless transistor  
A transistor includes a semiconductor layer, and a gate dielectric is formed on the semiconductor layer. A gate conductor is formed on the gate dielectric and an active area is located in the...
8759872 Transistor with threshold voltage set notch and method of fabrication thereof  
A structure and method of fabrication thereof relate to a Deeply Depleted Channel (DDC) design, allowing CMOS based devices to have a reduced σVT compared to conventional bulk CMOS and can allow...
8753944 Pocket counterdoping for gate-edge diode leakage reduction  
A method of fabricating a Metal-Oxide Semiconductor (MOS) transistor includes providing a substrate having a substrate surface doped with a second dopant type and a gate stack over the substrate...
8748986 Electronic device with controlled threshold voltage  
Structures and methods of fabrication thereof related to an improved semiconductor on insulator (SOI) transistor formed on an SOI substrate. The improved SOI transistor includes a substantially...
8735984 FinFET with novel body contact for multiple Vt applications  
FinFET devices are formed with body contact structures enabling the fabrication of such devices having different gate threshold voltages (Vt). A body contact layer is formed to contact the gate...
8729644 Programmable III-nitride semiconductor device  
A III-nitride semiconductor device which includes a charged gate insulation body.
8722486 Enhancing deposition uniformity of a channel semiconductor alloy by forming a recess prior to the well implantation  
When forming sophisticated gate electrode structures requiring a threshold adjusting semiconductor alloy for one type of transistor, a recess is formed in the corresponding active region, thereby...
8716811 Semiconductor device  
A semiconductor device includes a first conduction-type semiconductor substrate, a first semiconductor region of a first conduction-type formed on the semiconductor substrate, a second...
8716807 Fabrication of devices having different interfacial oxide thickness via lateral oxidation  
A semiconductor device includes a first field effect transistor (FET) and a second FET located on a substrate, the first FET comprising a first interfacial oxide layer, and the second FET...
8710538 Light-emitting device with a spacer at bottom surface  
A light-emitting device having at least one spacer located at a bottom surface is disclosed. In two other embodiments, an electronic display system and an electronic system having such...
8686511 Source/drain extension control for advanced transistors  
A planar transistor with improved performance has a source and a drain on a semiconductor substrate that includes a substantially undoped channel extending between the source and the drain. A gate...
8680609 Depletion mode semiconductor device with trench gate and manufacturing method thereof  
A manufacturing method of a depletion mode trench semiconductor device includes following steps. Firstly, a substrate including a drift epitaxial layer disposed thereon is provided. A trench is...
8674419 Method of forming a CMOS structure having gate insulation films of different thicknesses  
The semiconductor integrated circuit device employs on the same silicon substrate a plurality of kinds of MOS transistors with different magnitudes of tunnel current flowing either between the...
8674455 Semiconductor device  
A semiconductor device is provided, which includes an N well having a peak concentration of 2E+17 atom/cm3 or more in the range of 0.2 to 1 μm depth from the surface of a P-type semiconductor...
8664067 CMOS devices with reduced short channel effects  
An MOS transistor includes a doping profile that selectively increases the dopant concentration of the body region. The doping profile has a shallow portion that increases the dopant concentration...
8664060 Semiconductor structure and method of fabricating the same  
A semiconductor structure and a method of fabricating the same comprising the steps of providing a substrate, forming at least one fin structure on said substrate, forming a gate covering said fin...
8664054 Method for forming semiconductor structure  
The invention relates to a method for forming a semiconductor structure, comprising: providing a semiconductor substrate which comprises a dummy gate formed thereon, a spacer surrounding the dummy...
8653565 Mixed mode multiple switch integration of multiple compound semiconductor FET devices  
Various aspects of the technology includes a quad semiconductor power and/or switching FET comprising a pair of control/sync FET devices. Current may be distributed in parallel along source and...
8643106 Semiconductor device  
A transistor capable of adjusting a threshold value is obtained by adjusting an impurity concentration of a silicon substrate supporting an SOI layer and by controlling a thickness of a buried...
8643117 Semiconductor device, method for manufacturing same, and semiconductor storage device  
In an SOI-MISFET that operates with low power consumption at a high speed, an element area is reduced. While a diffusion layer region of an N-conductivity type MISFET region of the SOI type MISFET...
8637938 Semiconductor device with pocket regions and method of manufacturing the same  
A semiconductor device includes a first pocket region and a second pocket region. The source region includes a first extension region having a concentration peak located at a first depth from a...
8637385 High voltage durability transistor and method for fabricating same  
According to one exemplary embodiment, a method for fabricating a high voltage durability transistor comprises forming a gate over a gate oxide layer formed over a substrate, aligning an exposure...
8598595 Semiconductor device and method for manufacturing the same  
The present application discloses a semiconductor device and a method for manufacturing the same. The semiconductor device comprises an SOI substrate; a semiconductor fin formed on the SOI...
8592921 Deep trench embedded gate transistor  
A semiconductor device includes a source extending into a surface of a substrate, a drain extending into the surface of the substrate, and an embedded gate in the substrate extending from the...
8587075 Tunnel field-effect transistor with metal source  
A semiconductor device includes a channel region; a gate dielectric over the channel region; and a gate electrode over the gate dielectric. A first source/drain region is adjacent the gate...
8581349 3D memory semiconductor device and structure  
A 3D memory device, including: a first memory layer including a first memory transistor with side gates; a second memory layer including a second memory transistor with side gates; and a periphery...
8575012 Semiconductor device production method and semiconductor device  
A semiconductor device production method includes: forming an insulating film on a semiconductor substrate, forming a concave portion in the insulating film, forming a gate insulating film at...
8575708 Structure of field effect transistor with fin structure  
A method for fabricating a field effect transistor with fin structure includes the following steps. A substrate having an ion well with a first conductivity type is provided, wherein the ion well...
8563384 Source/drain extension control for advanced transistors  
A planar transistor with improved performance has a source and a drain on a semiconductor substrate that includes a substantially undoped channel extending between the source and the drain. A gate...
8530286 Low power semiconductor transistor structure and method of fabrication thereof  
A structure and method of fabrication thereof relate to a Deeply Depleted Channel (DDC) design, allowing CMOS based devices to have a reduced σVT compared to conventional bulk CMOS and can allow...
8518784 Adjusting of strain caused in a transistor channel by semiconductor material provided for threshold adjustment  
The threshold voltage of a sophisticated transistor may be adjusted by providing a specifically designed semiconductor alloy in the channel region of the transistor, wherein a negative effect of...
8508001 Semiconductor device with work function adjusting layer having varied thickness in a gate width direction and methods of making same  
Disclosed herein is a semiconductor device that includes a semiconducting substrate and a work-function adjusting layer positioned at least partially in the semiconducting substrate, the...

Matches 1 - 50 out of 327 1 2 3 4 5 6 7 >