|
Match
|
Document |
Document Title |
|
|
7550798 |
CMOS image sensor and method for manufacturing the same
Provided is a CMOS image sensor and method for manufacturing the same. The CMOS image sensor includes a semiconductor substrate, a gate electrode formed on the semiconductor substrate, a conductive...
|
|
|
7541627 |
Method and apparatus for improving sensitivity in vertical color CMOS image sensors
The invention describes in detail the structure of a CMOS image sensor pixel that senses color of impinging light without having absorbing filters placed on its surface. The color sensing is...
|
|
|
7473976 |
Lateral power transistor with self-biasing electrodes
A semiconductor power transistor includes a drift region of a first conductivity type and a well region of a second conductivity type in the drift region such that the well region and the drift...
|
|
|
7462916 |
Semiconductor devices having torsional stresses
A FET structure is provided in which at least one stressor element provided at or near one corner of an active semiconductor region applies a stress in a first direction to one side of a channel...
|
|
|
7459758 |
Transistor structure and method for making same
A gate structure in a transistor and method for fabricating the structure. A gate structure is formed on a substrate. The gate structure includes three layers: an oxide layer, a nitride layer and a...
|
|
|
7402474 |
Manufacturing method of semiconductor device
A method of manufacturing a semiconductor device comprises the following steps: a step of depositing a silicon oxide film on the top surface of an epitaxial layer of the region where a high...
|
|
|
7323394 |
Method of producing element separation structure
A method of producing an element separation structure includes the steps of: forming a first thermal oxide film on the substrate; forming a silicon nitride film on the first thermal oxide film;...
|
|
|
7309899 |
Semiconductor device including a MOSFET with nitride side wall
A semiconductor device includes a semiconductor substrate, a gate insulating layer, a gate electrode structure and a side wall structure. The gate insulating layer is formed on the semiconductor...
|
|
|
7307324 |
MOS transistor in an active region
After an isolation region is formed using a field-forming silicon nitride film, this silicon nitride film is patterned, thereby a gate trench is formed. Next, a gate electrode material is buried...
|
|
|
7268392 |
Trench gate semiconductor device with a reduction in switching loss
A semiconductor device comprises: a first semiconductor region of a first conductivity type; a second semiconductor region of a second conductivity type provided on the first semiconductor region;...
|
|
|
7221039 |
Thin film transistor (TFT) device structure employing silicon rich silicon oxide passivation layer
A thin film transistor device structure and a method for fabricating the thin film transistor device structure each comprise a thin film transistor device formed over a substrate. The thin film...
|
|
|
7198968 |
Method of fabricating thin film transistor array substrate
A method of fabricating a thin film transistor array substrate is provided. The method includes forming a first conductive pattern group on a substrate using a first etch resist and a first soft...
|
|
|
7180129 |
Semiconductor device including insulating layer
A method of manufacturing an insulating layer that ensures reproducibility across like manufacturing apparatus. The insulating layer is formed on the substrate by (a) flowing an oxidizing gas at an...
|
|
|
7176533 |
Semiconductor devices having contact plugs including polysilicon doped with an impurity having a lesser diffusion coefficient than phosphorus
Forming a semiconductor device can include forming an insulating layer on a semiconductor substrate including a conductive region thereof, wherein the insulating layer has a contact hole therein...
|
|
|
7105878 |
Active pixel having reduced dark current in a CMOS image sensor
The active pixel includes a photodiode, a reset transistor, and a pixel output transistor. The photodiode is substantially covered with a protective structure, thus protecting the entire surface of...
|
|
|
7030498 |
Semiconductor device with copper wirings having improved negative bias temperature instability (NBTI)
A semiconductor device with p-channel MOS transistor having: a gate insulating film of nitrogen-containing silicon oxide; a gate electrode of boron-containing silicon; side wall spacers on side...
|
|
|
7019392 |
Storage apparatus, card type storage apparatus, and electronic apparatus
A storage apparatus 10 is disclosed, that comprises a wiring substrate 11 having a first surface and a second surface, a flat type external connection terminal 12 a disposed on the first...
|
|
|
7019379 |
Semiconductor device comprising voltage regulator element
A semiconductor device includes a heavily doped layer 25 of p-type formed in the surface of an n-type well 21, an intermediately doped layer 26 of p-type formed to adjoin and surround the...
|
|
|
7009262 |
Semiconductor device and manufacturing method thereof
A manufacturing method of a semiconductor device which can decrease the degradation of an element due to plasma in the LDD formation process is provided. The degradation of an element due to plasma...
|
|
|
7002210 |
Semiconductor device including a high-breakdown voltage MOS transistor
On a semiconductor substrate, a well is formed. In the well, one MOS transistor including a gate electrode, a source region, a source field limiting layer and a source/drain region, and another MOS...
|
|
|
6992325 |
Active matrix organic electroluminescence display device
An active matrix organic electroluminescence display device capable of maintaining the brightness of the organic light emitting diode. The active matrix organic electroluminescence display device...
|
|
|
6967344 |
Multi-terminal chalcogenide switching devices
Multi-terminal electronic switching devices comprising a chalcogenide material switchable between a resistive state and a conductive state. The devices include a first terminal, a second terminal...
|
|
|
6958518 |
Semiconductor device having at least one source/drain region formed on an isolation region and a method of manufacture therefor
The present invention provides a semiconductor device and a method of manufacture therefor. The semiconductor device includes a semiconductor substrate having a gate formed there over. The...
|
|
|
6949815 |
Semiconductor device with decoupling capacitors mounted on conductors
A semiconductor device has an LSI device provided with a plurality of power supply line connection pads and ground line connection pad in a peripheral edge part of a circuit-formation surface,...
|
|
|
6946712 |
Magnetic memory device using SOI substrate
A magnetic memory device includes an SOI substrate having a first semiconductor layer, a first insulating film formed on the first semiconductor layer, and a second semiconductor layer formed on...
|
|
|
6927457 |
Circuit structure for connecting bonding pad and ESD protection circuit
A circuit structure for connecting a bonding pad with an electrostatic discharge protection circuit. The circuit structure includes a plurality of conductive layers, a first plurality of first...
|
|
|
6909140 |
Flash memory with protruded floating gate
A method of forming a flash memory with a protruded floating gate. A substrate is provided. An isolation area and a plurality of patterned conductive layers are sequentially formed on the...
|
|
|
6909131 |
Word line strap layout structure
A word line strap layout structure is described, comprising an isolation post, a word line, a contact and a metal line. The isolation post is located on a substrate between two memory areas. The...
|
|
|
6906389 |
High-voltage, high-cutoff-frequency electronic MOS device
An MOS electronic device is formed to reduce drain/gate capacity and to increase cutoff frequency. The device includes a field insulating layer that covers a drain region, delimits an active area...
|
|
|
6879007 |
Low volt/high volt transistor
A semiconductor device has at least one high-voltage and low-voltage transistor on a single substrate. The reliability of the high-voltage transistor is enhanced by performing a LDD implantation in...
|
|
|
6873021 |
MOS transistors having higher drain current without reduced breakdown voltage
A drain-extended MOS transistor in a semiconductor wafer ( 300 ) of a first conductivity type comprises a first well ( 315 ) of the first conductivity type, operable as the extension of the...
|
|
|
6864547 |
Semiconductor device having a ghost source/drain region and a method of manufacture therefor
The present invention provides a semiconductor device and a method of manufacture therefor. The semiconductor device includes a channel region located in a semiconductor substrate and a trench...
|
|
|
6853535 |
Method for producing crystallographically textured electrodes for textured PZT capacitors
A bottom electrode structure and manufacturing method is described for producing crystallographically textured iridium electrodes for making textured PZT capacitors that enables enhanced...
|
|
|
6844602 |
Semiconductor device, and method for manufacturing the same
The present invention discloses semiconductor device which comprises a metal gate electrode surrounded by polysilicon layers and a gate insulating film whose edges are thicker than the center...
|
|
|
6835982 |
Semiconductor devices
A SOI MOSFET 10 may be formed from silicon single crystal as a substrate body that is formed on an embedded oxide film 11 . For example, a P-type body 12 , a channel section 13 , and N-type...
|
|
|
6831313 |
Ferroelectric composite material, method of making same and memory utilizing same
A ferroelectric memory ( 436 ) includes a plurality of memory cells ( 73, 82, 100 ) each containing a ferroelectric thin film ( 15 ) including a microscopically composite material having a...
|
|
|
6822301 |
Maskless middle-of-line liner deposition
A process for fabricating a semiconductor structure, wherein the semiconductor structure includes a core region and a periphery region. The core region includes a plurality of transistors and the...
|
|
|
6818950 |
Increasing switching speed of geometric construction gate MOSFET structures
In cellular MOSFET transistor arrays using a geometric gate construction, deleterious inherent capacitance induced by the construction is substantially reduced by the use of plugs in between...
|
|
|
6818958 |
Semiconductor device and process for its manufacture to increase threshold voltage stability
The oxide atop a P pad below the gate electrode has a cut completely through the oxide atop the P pad to prevent the drift of contamination ions, such as sodium ions from the periphery of a...
|
|
|
6787840 |
Nitridated tunnel oxide barriers for flash memory technology circuitry
A semiconductor chip having a plurality of flash memory devices, shallow trench isolation in the periphery region, and LOCOS isolation in the core region. A hard mask is used first to create the...
|
|
|
6744113 |
Semiconductor device with element isolation using impurity-doped insulator and oxynitride film
In a trench ( 2 ), an oxynitride film ( 31 ON 1 ) and a silicon oxide film ( 31 O 1 ) are positioned between a doped silicon oxide film ( 31 D) and a substrate ( 1 ), and a silicon oxide film ( 31...
|
|
|
6713347 |
Process for integrating in a same chip a non-volatile memory and a high-performance logic circuitry
A process for the manufacturing of an integrated circuit including a low operating voltage, high-performance logic circuitry and an embedded memory device having a high operating voltage higher...
|
|
|
6713822 |
Semiconductor device
Provides a semiconductor device that can separate components easily. Gate electrode 42 is formed only within component forming region 32 , and gate electrode 42 and aluminum wiring 48 are...
|
|
|
6707082 |
Ferroelectric transistor
In a ferroelectric transistor containing two source/drain zones with a channel region disposed there-between, a first dielectric intermediate layer containing Al 2 O 3 is disposed on a surface of...
|
|
|
6700167 |
Semiconductor device having thick insulating layer under gate side walls
A semiconductor device includes a semiconductor substrate, a silicon oxide layer formed on the semiconductor substrate, a gate electrode formed over the silicon oxide layer, and a side wall...
|
|
|
6686635 |
Four transistors static-random-access-memory
A method for forming transistors static-random-access-memory. The method comprises the steps of: providing a substrate which at least comprises a cell area and periphery area, wherein the cell area...
|
|
|
6677651 |
Semiconductor device and method for manufacturing the same
A semiconductor device includes a semiconductor substrate, a silicon oxide layer formed on the semiconductor substrate, a gate electrode formed over the silicon oxide layer, and a side wall...
|
|
|
6667524 |
Semiconductor device with a plurality of semiconductor elements
A first semiconductor element is a transistor for use in a memory cell region, and a second semiconductor element is a transistor for use in a peripheral circuit region. A first total impurity...
|
|
|
6642557 |
Isolated junction structure for a MOSFET
A MOSFET structure in which the channel region is contiguous with the semiconductor substrate while the source and drain junctions are substantially isolated from the substrate, includes a...
|
|
|
6639286 |
Method and apparatus for reducing process-induced charge buildup
Method and apparatus are disclosed for protection of a circuit against process-induced electrical discharge. The method includes forming a diode in close proximity to a charge collector structure...
|