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7633127 |
Silicide gate transistors and method of manufacture
A method in which a gate and raised source/drain (S/D) regions are fully silicided in separate steps to avoid degrading the resistance or junction leakage is described. A gate dielectric layer,...
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7629655 |
Semiconductor device with multiple silicide regions
A system and method for forming a semiconductor device with a reduced source/drain extension parasitic resistance is provided. An embodiment comprises implanting two metals (such as ytterbium and...
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7615828 |
CMOS devices adapted to prevent latchup and methods of manufacturing the same
In a first aspect, a first apparatus is provided. The first apparatus is a semiconductor device on a substrate that includes (1) a first metal-oxide-semiconductor field-effect transistor (MOSFET);...
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7615829 |
Elevated source and drain elements for strained-channel heterojuntion field-effect transistors
A semiconductor structure having a surface layer disposed over a substrate, the surface layer including strained silicon. A contact layer is disposed over a portion of the surface layer, the...
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7608898 |
One transistor DRAM cell structure
A one-transistor dynamic random access memory (DRAM) cell includes a transistor which has a first source/drain region, a second source/drain region, a body region between the first and second...
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7592669 |
Semiconductor device with MISFET that includes embedded insulating film arranged between source/drain regions and channel
With the objective of suppressing or preventing a kink effect in the operation of a semiconductor device having a high breakdown voltage field effect transistor, n + type semiconductor regions,...
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7560351 |
Integrated circuit arrangement with low-resistance contacts and method for production thereof
An integrated circuit arrangement and fabrication method is presented. The integrated circuit arrangement contains a semiconductor and a metal electrode. The contact area between a semiconductor...
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7550808 |
Fully siliciding regions to improve performance
Structures and related methods including fully silicided regions are disclosed. In one embodiment, a structure includes a substrate; a partially silicided region located in an active region of an...
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7541653 |
Mask ROM devices of semiconductor devices and method of forming the same
Disclosed are a mask ROM device and a method of forming the same. This device includes a plurality of cells. At least one among the plurality of cells is programmed. The programmed cell includes a...
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7528450 |
Semiconductor device having NMOSFET and PMOSFET and manufacturing method therefor
A element isolation insulating film is formed around the device regions in the silicon substrate. The device regions are formed an n-type diffusion layer region, a p-type diffusion layer region, a...
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7514714 |
Thin film power MOS transistor, apparatus, and method
A thin film power transistor includes a plurality of first doped regions over a substrate and a second doped region forming a body. At least a portion of the body is disposed between the plurality...
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7511350 |
Nickel alloy silicide including indium and a method of manufacture therefor
The invention provides a semiconductor device, a method of manufacture therefore and a method for manufacturing an integrated circuit including the same. The semiconductor device, among other...
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7504698 |
Semiconductor device and manufacturing method thereof
A semiconductor device and a manufacturing method thereof that can prevent mutual diffusion of impurity in a silicide layer and can decrease sheet resistance of an N-type polymetal gate electrode...
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7498641 |
Partial replacement silicide gate
A method of forming fully silicide gates having uniform gate silicide thickness is presented. A gate dielectric is formed over a substrate. A silicon-containing layer is formed over the gate...
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7498640 |
Self-aligned silicide process for silicon sidewall source and drain contacts and structure formed thereby
A method (and structure formed thereby) of forming a metal silicide contact on a non-planar silicon containing region having controlled consumption of the silicon containing region, includes...
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7495293 |
Semiconductor device and method for manufacturing the same
A semiconductor device includes a silicon region including Si, and a silicide film provided on the silicon region, the silicide film comprising a compound of Si with Ni, Co, Pd, or Pt and including...
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7479682 |
Structure of a field effect transistor having metallic silicide and manufacturing method thereof
A field effect transistor having metallic silicide layers is formed in a semiconductor layer on an insulating layer of an SOI substrate. The metallic silicide layers are composed of refractory...
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7476973 |
Method of manufacturing a semiconductor device having a silicidation blocking layer
A silicidation blocking layer (SBL) pattern is formed on a substrate including an active region and a field region. The SBL pattern covers the field region and exposes the active region. A silicide...
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7476943 |
Semiconductor device having diffusion layers as bit lines and method for manufacturing the same
A semiconductor device includes: a semiconductor region; a plurality of bit line diffusion layers formed in an upper portion of the semiconductor region and each extending in a row direction; a...
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7465996 |
Semiconductor device and method for fabricating the same
A semiconductor device includes: a semiconductor substrate divided into a first region and a second region; a first MIS transistor formed in the first region of the semiconductor substrate and...
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7453120 |
Semiconductor structure
A method for fabricating a semiconductor structure is described. A substrate is provided, having thereon a gate structure and a spacer on the sidewall of the gate structure and having therein an...
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7446381 |
Semiconductor memory device and method for fabricating the same
A semiconductor memory device has a memory region which is formed on a semiconductor substrate and in which a plurality of memory cells each including a memory transistor are arranged as a matrix...
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7446379 |
Transistor with dopant-bearing metal in source and drain
A transistor and method of manufacturing thereof. A gate dielectric and gate are formed over a workpiece, and the source and drain regions of a transistor are recessed. The recesses are filled with...
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7439593 |
Semiconductor device having silicide formed with blocking insulation layer
Some embodiments include an isolation layer defining an active region of a substrate, a gate pattern formed on the active region, and source/drain regions formed in the active region. Sidewall...
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7439596 |
Transistors for semiconductor device and methods of fabricating the same
The present invention discloses a transistor for a semiconductor device capable of preventing the generation of a depletion capacitance in a gate pattern due to the diffusion of impurity ions. The...
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7429770 |
Semiconductor device and manufacturing method thereof
A technique capable of reducing threshold voltage and reducing high-temperature heat treatment after forming a gate electrode is provided. An n-type MIS transistor or a p-type MIS transistor is...
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7427796 |
Semiconductor device and method of manufacturing a semiconductor device
A semiconductor device according to an embodiment of the present invention comprises a first transistor including: a first source layer and a first drain layer both formed in one surface of a...
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7411258 |
Cobalt disilicide structure
A structure relating to removal of an oxide of titanium generated as a byproduct of a process that forms cobalt disilicide within an insulated-gate field effect transistor (FET). The structure may...
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7405449 |
Semiconductor device and method of manufacturing the same
A semiconductor device includes a semiconductor substrate, and a MOS transistor provided on the semiconductor substrate and having a channel type of a first conductivity, the MOS transistor...
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7391089 |
Semiconductor device and method of manufacturing the same
A semiconductor device which includes a field effect transistor having a gate electrode on the upper side of a semiconductor substrate, with a gate insulation film therebetween, wherein at least...
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7385260 |
Semiconductor device having silicide thin film and method of forming the same
The present invention provides a semiconductor device having a silicide thin film and method of forming the same. A semiconductor device comprises a gate insulation layer formed on an active region...
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7372108 |
Semiconductor device and manufacturing method thereof
The present invention discloses a semiconductor device and a manufacturing method thereof which improves its characteristics even though it is miniaturized. According to one aspect of the present...
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7365404 |
Semiconductor device having silicide reaction blocking region
A semiconductor device has a silicon substrate, an n-type well region formed in the silicon substrate, first and second source/drain regions constructed of a p-type diffusion layer formed on the...
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7361959 |
CMOS circuits including a passive element having a low end resistance
The present invention relates to complementary metal-oxide-semiconductor (CMOS) circuits, as well as methods for forming such CMOS circuits. More specifically, the present invention relates to CMOS...
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7358574 |
Semiconductor device having silicide-blocking layer and fabrication method thereof
A semiconductor device having a silicide-blocking layer is provided. The device includes a field oxide layer defining an active region, source/drain regions in the active region of a substrate, a...
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7348233 |
Methods for fabricating a CMOS device including silicide contacts
Methods are provided for fabricating a CMOS device having a silicon substrate including a first N-type region and a second P-type region. The method includes the steps of forming a first gate...
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7326648 |
Semiconductor device and fabrication process of forming silicide layer on a polysilicon pattern by reducing thickness of metal layer before forming silicide layer on the polysilicon pattern
A semiconductor device includes a substrate having first and second device regions separated from each other by a device isolation region, a first field effect transistor having a first polysilicon...
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7317239 |
Method for manufacturing a resistor
A method of manufacturing a resistor is provided. At first, a semiconductor layer including at least a high resistance region and a low resistance region is formed on a substrate. Following that, a...
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7314789 |
Structure and method to generate local mechanical gate stress for MOSFET channel mobility modification
A semiconductor structure and method that is capable of generating a local mechanical gate stress for channel mobility modification are provided. The semiconductor structure includes at least one...
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7307322 |
Ultra-uniform silicide system in integrated circuit technology
A structure of an integrated circuit is provided. A gate dielectric is formed on a semiconductor substrate, and a gate is formed over a gate dielectric on the semiconductor substrate. Source/drain...
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7298011 |
Semiconductor device with recessed L-shaped spacer and method of fabricating the same
A semiconductor device with a recessed L-shaped spacer and a method for fabricating the same. A recessed L-shaped spacer includes a vertical portion and a horizontal portion. The vertical portion...
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7298012 |
Shallow junction semiconductor
An integrated circuit with a semiconductor substrate is provided. A gate dielectric is on the semiconductor substrate, and a gate is on the gate dielectric. A silicide layer is on the semiconductor...
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7294935 |
Integrated circuits protected against reverse engineering and method for fabricating the same using an apparent metal contact line terminating on field oxide
Semiconducting devices, including integrated circuits, protected from reverse engineering comprising metal traces leading to field oxide. Metallization usually leads to the gate, source or drain...
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7294890 |
Fully salicided (FUSA) MOSFET structure
A method is described to form a MOSFET with a fully silicided gate electrode and fully silicided, raised S/D elements that are nearly coplanar to allow a wider process margin when forming contacts...
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7271455 |
Formation of fully silicided metal gate using dual self-aligned silicide process
An advanced gate structure that includes a fully silicided metal gate and silicided source and drain regions in which the fully silicided metal gate has a thickness that is greater than the...
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7265400 |
Semiconductor device including field-effect transistor using salicide (self-aligned silicide) structure and method of fabricating the same
An element isolation region for electrically isolating an element region where an element is to be formed is formed in a semiconductor substrate. A gate insulating film is formed on the...
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7265425 |
Semiconductor device employing an extension spacer and a method of forming the same
A semiconductor device formed on a semiconductor substrate and a method of forming the same. In one embodiment, the semiconductor device includes a gate over the semiconductor substrate and a...
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7259432 |
Semiconductor device for reducing parasitic capacitance produced in the vicinity of a transistor located within the semiconductor device
A semiconductor device includes: a gate electrode formed on a substrate; impurity regions formed in the substrate and to both sides of the gate electrode; a first interlayer insulating film formed...
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7256498 |
Resistance-reduced semiconductor device and methods for fabricating the same
Semiconductor devices and methods for fabricating the same. The semiconductor device includes a resistance-reduced transistor with metallized bilayer overlying source/drain regions and gate...
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7253481 |
High performance MOS device with graded silicide
A semiconductor device suffering fewer current crowding effects and a method of forming the same are provided. The semiconductor device includes a substrate, a gate over the substrate, a gate...
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