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7615828 CMOS devices adapted to prevent latchup and methods of manufacturing the same  
In a first aspect, a first apparatus is provided. The first apparatus is a semiconductor device on a substrate that includes (1) a first metal-oxide-semiconductor field-effect transistor (MOSFET);...
7554162 Thin film transistor substrate with low reflectance upper electrode  
A thin film transistor substrate includes an upper electrode for electrically connecting a transparent picture element electrode to the thin film transistor. The upper electrode includes at least a...
7541653 Mask ROM devices of semiconductor devices and method of forming the same  
Disclosed are a mask ROM device and a method of forming the same. This device includes a plurality of cells. At least one among the plurality of cells is programmed. The programmed cell includes a...
7538398 System and method for forming a semiconductor device source/drain contact  
The present invention discloses a semiconductor source/drain contact structure, which comprises a substrate, a source/drain region disposed in the substrate, at least one non-silicided conductive...
7514714 Thin film power MOS transistor, apparatus, and method  
A thin film power transistor includes a plurality of first doped regions over a substrate and a second doped region forming a body. At least a portion of the body is disposed between the plurality...
7498640 Self-aligned silicide process for silicon sidewall source and drain contacts and structure formed thereby  
A method (and structure formed thereby) of forming a metal silicide contact on a non-planar silicon containing region having controlled consumption of the silicon containing region, includes...
7485960 Semiconductor device and manufacturing method thereof  
A semiconductor device of the invention includes a semiconductor element ( 1 ), an interposer ( 5 ) having electrodes ( 2 ) arranged on a top face thereof in four directions and external electrodes...
7446044 Carbon nanotube switches for memory, RF communications and sensing applications, and methods of making the same  
Switches having an in situ grown carbon nanotube as an element thereof, and methods of fabricating such switches. A carbon nanotube is grown in situ in mechanical connection with a conductive...
7432560 Body-tied-to-source MOSFETs with asymmetrical source and drain regions and methods of fabricating the same  
A metal oxide semiconductor field effect transistor (MOSFET) includes a body pattern of a first conductivity type disposed on an insulating layer. A gate electrode is disposed on the body pattern....
7411258 Cobalt disilicide structure  
A structure relating to removal of an oxide of titanium generated as a byproduct of a process that forms cobalt disilicide within an insulated-gate field effect transistor (FET). The structure may...
7405449 Semiconductor device and method of manufacturing the same  
A semiconductor device includes a semiconductor substrate, and a MOS transistor provided on the semiconductor substrate and having a channel type of a first conductivity, the MOS transistor...
7391086 Conductive contacts and methods for fabricating conductive contacts for elctrochemical planarization of a work piece  
Conductive contacts and methods for fabricating conductive contacts for electrochemical mechanical planarization are provided. A conductive contact in accordance with an exemplary embodiment of the...
7385260 Semiconductor device having silicide thin film and method of forming the same  
The present invention provides a semiconductor device having a silicide thin film and method of forming the same. A semiconductor device comprises a gate insulation layer formed on an active region...
7314789 Structure and method to generate local mechanical gate stress for MOSFET channel mobility modification  
A semiconductor structure and method that is capable of generating a local mechanical gate stress for channel mobility modification are provided. The semiconductor structure includes at least one...
7307322 Ultra-uniform silicide system in integrated circuit technology  
A structure of an integrated circuit is provided. A gate dielectric is formed on a semiconductor substrate, and a gate is formed over a gate dielectric on the semiconductor substrate. Source/drain...
7294935 Integrated circuits protected against reverse engineering and method for fabricating the same using an apparent metal contact line terminating on field oxide  
Semiconducting devices, including integrated circuits, protected from reverse engineering comprising metal traces leading to field oxide. Metallization usually leads to the gate, source or drain...
7276767 Thin film resistor device and a method of manufacture therefor  
The present invention provides a thin film resistor and method of manufacture therefor. The thin film resistor comprises a resistive layer located on a first dielectric layer, first and second...
7271455 Formation of fully silicided metal gate using dual self-aligned silicide process  
An advanced gate structure that includes a fully silicided metal gate and silicided source and drain regions in which the fully silicided metal gate has a thickness that is greater than the...
7259432 Semiconductor device for reducing parasitic capacitance produced in the vicinity of a transistor located within the semiconductor device  
A semiconductor device includes: a gate electrode formed on a substrate; impurity regions formed in the substrate and to both sides of the gate electrode; a first interlayer insulating film formed...
7250661 Semiconductor memory device with plural source/drain regions  
A semiconductor memory device includes first and second source/drain regions, and first and second semiconductor regions. The first source/drain region of a first conductive type is formed in a...
7230286 Vertical FET with nanowire channels and a silicided bottom contact  
A vertical FET structure with nanowire forming the FET channels is disclosed. The nanowires are formed over a conductive silicide layer. The nanowires are gated by a surrounding gate. Top and...
7230304 Electric contacts and method of manufacturing thereof, and vacuum interrupter and vacuum circuit breaker using thereof  
An electric contact member which is excellent in voltage-proof performance and melt-resistant performance and excellent in mass productivity, and a method of manufacturing thereof, and a vacuum...
7190010 Semiconductor device  
A semiconductor device includes a semiconductor substrate, a T-shaped gate electrode, a moisture-proof insulating film, and an interlayer dielectric film. The T-shaped gate electrode has a leg...
7176523 Power mosfet having conductor plug structured contacts  
In a high frequency amplifying MOSFET having a drain offset region, the size is reduced and the on-resistance is decreased by providing conductor plugs 13 (P 1 ) for leading out electrodes on a...
7148535 Zero capacitance bondpad utilizing active negative capacitance  
The present invention is an apparatus and system for reducing bondpad capacitance of an integrated circuit. Circuitry of the present invention may produce a negative capacitance approximately equal...
7138688 Doping method and semiconductor device fabricated using the method  
A doping method includes the step of attaching molecules or clusters to the surface of a semiconductor substrate to enable charge transfer from the molecules or clusters to the substrate surface,...
7135744 Semiconductor device having self-aligned contact hole and method of fabricating the same  
According to embodiments of the invention, word line patterns are placed on a semiconductor substrate in a cell array region and at least one gate pattern is placed on the semiconductor substrate...
7125787 Method of manufacturing insulated gate semiconductor device  
A gate electrode includes a first polysilicon film remaining on a first oxide film, a part of a second polysilicon layer 8 superimposed on the polysilicon layer, and a part of the second...
7126195 Method for forming a metallization layer  
A method for forming a metallization layer ( 30 ). A first layer ( 14 ) is formed outwardly from a semiconductor substrate ( 10 ). Contact vias ( 16 ) are formed through the first layer ( 14 ) to...
7102201 Strained semiconductor device structures  
Semiconductor fabrication methods and structures, devices and integrated circuits characterized by enhanced operating performance. The structures generally include first and second source/drain...
7098516 Refractory metal-based electrodes for work function setting in semiconductor devices  
The present invention provides, in one embodiment, a gate structure ( 100 ). The gate structure comprises a gate dielectric ( 105 ) and a gate ( 110 ). The gate dielectric includes a refractory...
7061056 High fMAX deep submicron MOSFET  
A method of forming a high f MAX deep submicron MOSFET, comprising the following steps of. A substrate having a MOSFET formed thereon is provided. The MOSFET having a source and a drain and...
7049744 Organic electroluminescence panel having a substrate and a sealing panel sealed by adhering an inorganic film and the sealing panel using a sealing material  
To effectively prevent intrusion of moisture into a space above an organic EL element, a moisture blocking layer made of a silicon-based nitride film such as SiNx or a TEOS film formed to cover a...
7026691 Minimizing transistor size in integrated circuits  
A method for fabricating a field effect transistor (FET) in and on a semiconductor substrate with local interconnects to permit the formation of minimal space between gate and the local...
7015552 Dual work function semiconductor structure with borderless contact and method of fabricating the same  
A dual work function semiconductor structure with borderless contact and method of fabricating the same are presented. The structure may include a field effect transistor (FET) having a...
7005713 Annular segmented MOSFET  
An annular segment MOSFET structure has reduced drain electric fields for a given applied voltage and dimensional sizing for improved reliability from damage by reducing high energy hot carriers...
6984864 Semiconductor device with MISFET having low leakage current  
In an n-channel type power MISFET, a source electrode in contact with an n + -semiconductor region (source region) and a p + -semiconductor region (back gate contact region) is constituted with an...
6963114 SOI MOSFET with multi-sided source/drain silicide  
A microelectronic device including an insulator located over a substrate, a semiconductor feature and a contact layer. The semiconductor feature has a thickness over the insulator, a first surface...
6939812 Method of forming an etch stop layer in a semiconductor device  
There is a method of manufacturing a semiconductor device. In an example embodiment, the method comprises applying a semiconductor substrate that is provided with a conductor at a surface. The...
6940134 Semiconductor with contact contacting diffusion adjacent gate electrode  
Methods of forming a contact to a gate electrode or substrate despite misalignment of the contact opening due to lithographic techniques, and a semiconductor having such a contact. Silicide can be...
6927462 Method of forming a gate contact in a semiconductor device  
A processing sequence for definition of gate contacts can be implemented using either a deep ultra-violet (DUV) or mid ultra-violet (MUV) positive resist processing and supports the use of a...
6927457 Circuit structure for connecting bonding pad and ESD protection circuit  
A circuit structure for connecting a bonding pad with an electrostatic discharge protection circuit. The circuit structure includes a plurality of conductive layers, a first plurality of first...
6927461 Semiconductor device having shared contact and fabrication method thereof  
Semiconductor devices and methods of fabrication. A device includes a semiconductor substrate, a gate electrode insulated from the semiconductor substrate by a gate insulation layer, LDD-type...
6891232 Semiconductor device having an injection substance to knock against oxygen and manufacturing method of the same  
A semiconductor device comprises: a semiconductor substrate; a gate insulating film formed on the top surface of the semiconductor substrate; a gate electrode formed on the gate insulating film;...
6873019 Semiconductor device including memory cells and manufacturing method thereof  
In a semiconductor device having memory cells and peripheral circuits, the memory cells and the peripheral circuits are formed on a semiconductor substrate. Source regions, drain regions and gate...
6861704 Semiconductor device and method for fabricating the same  
The semiconductor device comprises a gate electrode 26 formed on a semiconductor substrate 10 , a source region 45 a having a lightly doped source region 42 a and a heavily doped source...
6861701 Trench power MOSFET with planarized gate bus  
Power MOSFETs and fabrication processes for power MOSFETs use a continuous conductive gate structure within trenches to avoid problems arising from device topology caused when a gate bus extends...
6844601 Local interconnect structure for integrated circuit devices, source structure for the same, and method for fabricating the same  
A process for making a local interconnect and the structures formed thereby. The process is practiced by forming a Ti layer having a nitrogen-rich upper portion over a portion of a substrate,...
6844600 ESD/EOS protection structure for integrated circuit devices  
Apparatus and methods forming electrostatic discharge and electrical overstress protection devices for integrated circuits wherein such devices include shared electrical contact between source...
6822299 Boron-doped titanium nitride layer for high aspect ratio semiconductor devices  
Conductive contacts in a semiconductor structure, and methods for forming the conductive components are provided. The contacts are useful for providing electrical connection to active components...
Matches 1 - 50 out of 255 1 2 3 4 5 6 >