Matches 151 - 200 out of 1121 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >
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7326960 Semiconductor circuit constructions  
The invention includes a method of forming semiconductor circuitry wherein a first semiconductor structure comprising a first monocrystalline semiconductor substrate is bonded to a second...
7317229 Gate electrode structures and methods of manufacture  
Gate electrode structures used in field effect transistors and integrated circuits and methods of manufacture are disclosed. Improved work function and threshold modulation are provided by the...
7314789 Structure and method to generate local mechanical gate stress for MOSFET channel mobility modification  
A semiconductor structure and method that is capable of generating a local mechanical gate stress for channel mobility modification are provided. The semiconductor structure includes at least one...
7315051 Method of forming a source/drain and a transistor employing the same  
A method of forming a source/drain having a reduced junction capacitance and a transistor employing the same. In one embodiment, the method of forming the source/drain includes forming a recess in...
7312485 CMOS fabrication process utilizing special transistor orientation  
Complementary metal oxide semiconductor transistors are formed on a silicon substrate. The substrate has a {100} crystallographic orientation. The transistors are formed on the substrate so that...
7303955 Semiconductor memory device with high operating current and method of manufacturing the same  
In a semiconductor memory device with a high operating current and a method of manufacturing the same, a semiconductor substrate is formed in which a memory cell region and a peripheral circuit...
7304352 Alignment insensitive D-cache cell  
A D-Cache SRAM cell having a modified design in schematic and layout that exhibits increased symmetry from the circuit schematic and the physical cell layout perspectives. That is, the SRAM cell...
7301206 Semiconductor-on-insulator SRAM configured using partially-depleted and fully-depleted transistors  
A static memory element includes a first inverter having an input coupled to a left bit node and an output coupled to a right bit node. A second inverter has an input coupled to the right bit node...
7298008 Electrostatic discharge protection device and method of fabricating same  
Disclosed are a silicon control rectifier, a method of making the silicon control rectifier and the use of the silicon control rectifier as an electrostatic discharge protection device of an...
7297584 Methods of fabricating semiconductor devices having a dual stress liner  
In a semiconductor device having a dual stress liner for improving electron mobility, the dual stress liner includes a first liner portion formed on a PMOSFET and a second liner portion formed on...
7298010 Radiation-hardened transistor and integrated circuit  
A composite transistor is disclosed for use in radiation hardening a CMOS IC formed on an SOI or bulk semiconductor substrate. The composite transistor has a circuit transistor and a blocking...
7294888 CMOS-compatible non-volatile memory cell with lateral inter-poly programming layer  
An electrically erasable programmable read-only memory (“CMOS NON-VOLATILE MEMORY”) cell is fabricated using standard CMOS fabrication processes. First and second polysilicon gates are...
7288821 Structure and method of three dimensional hybrid orientation technology  
A method and device for increasing pFET performance without degradation of nFET performance. The method includes forming a first structure on a substrate using a first plane and direction and...
7288822 Semiconductor structure and fabricating method thereof  
A semiconductor structure is disclosed, including a substrate having therein a first well of a first conductivity type and a second well of a second conductivity type, a first MOS transistor of the...
7285826 High mobility CMOS circuits  
Semiconductor structure formed on a substrate and process of forming the semiconductor. The semiconductor includes a plurality of field effect transistors having a first portion of field effect...
7285451 Semiconductor integrated circuit device manufacturing method  
To reduce variation in channel lengths of MOS transistors within a circuit functional module. When exposure of a wafer substrate having a semiconductor integrated circuit device 1 including a...
7282770 Semiconductor device and fabrication process thereof  
A semiconductor device includes a semiconductor substrate of a first conductivity type, a well of the first conductivity type formed in the semiconductor substrate, a transistor formed in the well,...
7279727 Semiconductor device  
A semiconductor device includes a semiconductor substrate; a diffusion region which is formed in the semiconductor substrate and serves as a region for the formation of a MIS transistor; an element...
7279755 SRAM cell with improved layout designs  
A 6T SRAM cell includes a first inverter having a first pull-up transistor and a first pull-down transistor serially coupled between a supply source and a complementary supply source, and a second...
7279756 Semiconductor device with high-k gate dielectric and quasi-metal gate, and method of forming thereof  
A process and apparatus for a semiconductor device is provided. A device comprises a first transistor having a first charge carrier type. The first transistor comprises a high-k gate dielectric and...
7274056 Semiconductor constructions  
The invention includes a semiconductor construction having a pair of channel regions that have sub-regions doped with indium and surrounded by boron. A pair of transistor constructions are located...
7274217 High performance PFET header in hybrid orientation technology for leakage reduction in digital CMOS VLSI designs  
Discloses are CMOS circuit designs that combine MTCMOS and hybrid orientation technology to achieve the dual objectives of high performance and low standby leakage power. The invention utilizes...
7271436 Flash memory devices including a pass transistor  
Flash memory integrated circuit devices include an integrated circuit substrate. A cell array on the integrated circuit substrate includes a plurality of cell transistors. A bit line is coupled to...
7268399 Enhanced PMOS via transverse stress  
In the present invention, a PMOS device comprises a channel region formed in {100} silicon with first and second source/drain region disposed on either side of the channel region. The channel...
7259412 Solid state imaging device  
A solid state imaging device includes a substrate of a first conductivity type. A transistor, which includes a first gate electrode and a first and second impurity areas, is provided on a surface...
7253472 Method of fabricating semiconductor device employing selectivity poly deposition  
A method for fabricating a semiconductor device employing a selectivity poly deposition is disclosed. The disclosed method comprises depositing selectivity poly on a gate poly and source/drain...
7250655 MOS transistor having a T-shaped gate electrode  
A MOS transistor having a T-shaped gate electrode and a method for fabricating the same are provided, wherein the MOS transistor includes a T-shaped gate electrode on a semiconductor substrate; an...
7247914 Semiconductor device and method for fabricating the same  
A semiconductor device includes: a first gate insulating film formed on a first nMOS transistor region in a semiconductor substrate; a second gate insulating film formed on a first pMOS transistor...
7244994 Laterally diffused metal oxide semiconductor device and method of forming the same  
A transistor advantageously embodied in a laterally diffused metal oxide semiconductor device having a gate located over a channel region recessed into a semiconductor substrate and a method of...
7244993 Driving circuit  
A driving circuit and a data-line driver is provided which are capable of improving the tolerance to noise between adjacent terminals by using a conventional CMOS process while keeping the chip...
7242063 Symmetric non-intrusive and covert technique to render a transistor permanently non-operable  
A technique for and structures for camouflaging an integrated circuit structure. The technique including forming active areas of a first conductivity type and LDD regions of a second conductivity...
7235857 Power semiconductor device  
A semiconductor device is provided in which a plurality of MOSFETs including a vertical MOSFET is formed on a substrate. The device includes a silicon carbide substrate having front and back...
7235828 Semiconductor device with residual nickel from crystallization of semiconductor film  
It is an object to obtain a crystalline silicon film having preferable characteristics for a thin film transistor. A crystalline silicon film having improved crystallinity is obtained by the...
7229881 Dynamic random access memory of semiconductor device and method for manufacturing the same  
The present invention discloses an improved DRAM of semiconductor device and method for manufacturing the same wherein an ONO (oxide-nitride-oxide) structure for trapping electrons or holes used in...
7230303 Semiconductor memory device with reduced soft error rate (SER) and method for fabricating same  
The present invention provides a semiconductor memory device with reduced soft error rate (SER) and a method for fabricating such a device. The semiconductor memory device includes a plurality of...
7227230 Low-K gate spacers by fluorine implantation  
A MOSFET device and a method of fabricating a MOSFET device having low-K dielectric oxide gate sidewall spacers produced by fluorine implantation. The present invention implants fluorine into the...
7223647 Method for forming integrated advanced semiconductor device using sacrificial stress layer  
An integrated advanced method for forming a semiconductor device utilizes a sacrificial stress layer as part of a film stack that enables spatially selective silicide formation in the device. The...
7217963 Semiconductor integrated circuit device  
In a low power consumption mode in which prior data is retained upon power shutdown, the return speed thereof is increased. While use of an existent data retaining flip-flop may be considered, this...
7214979 Selectively deposited silicon oxide layers on a silicon substrate  
A process for selectively depositing a silicon oxide layer onto silicon substrates of different conductivity types is disclosed. The silicon oxide layer is formed by the ozone decomposition of TEOS...
7214990 Memory cell with reduced soft error rate  
The present invention includes SRAM memory cells and methods for forming SRAM cells having reduced soft error rate. The SRAM cell includes a first NMOS transistor and a first PMOS transistor having...
7214989 Semiconductor device and semiconductor integrated circuit device  
Soft-error resistance and latch up resistance are simultaneously improved for LSI involving miniaturization and reducing operating voltage. P wells and N wells are formed in a higher density...
7211869 Increasing carrier mobility in NFET and PFET transistors on a common wafer  
Enhanced carrier mobility in transistors of differing (e.g. complementary) conductivity types is achieved on a common chip by provision of two or more respective stressed layers, such as etch stop...
7205639 Semiconductor devices with rotated substrates and methods of manufacture thereof  
Integrated circuits are oriented on a substrate at an angle that is rotated between 0 to 45 degrees from a direction parallel or perpendicular to a preferred crystalline plane direction, such as...
7202535 Manufacturing method for an integrated semiconductor structure and corresponding integrated semiconductor structure  
The present invention provides a manufacturing method for an integrated semiconductor structure and a corresponding integrated semiconductor structure. The manufacturing method comprises the steps...
7202536 Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology  
A family of semiconductor devices is formed in a substrate that contains no epitaxial layer. In one embodiment the family includes a 5V CMOS pair, a 12V CMOS pair, a 5V NPN, a 5V PNP, several forms...
7199429 Semiconductor device having an organic anti-reflective coating (ARC) and method therefor  
In a making a semiconductor device, a patterning stack above a conductive material that is to be etched has a patterned photoresist layer that is used to pattern an underlying a...
7196379 MOS capacitor device  
A semiconductor device in which a dielectric breakdown of a gate oxide in a MOS capacitor can be prevented and in which a circuit area can be reduced. The semiconductor device comprises an NMOS...
7196380 High mobility plane FinFET with equal drive strength  
An integrated circuit structure has a buried oxide (BOX) layer above a substrate, and a first-type fin-type field effect transistor (FinFET) and a second-type FinFET above the BOX layer. The second...
7193269 MOS semiconductor device  
While using conventional manufacturing processes, it is intended to apply a compressive strain in the channel direction to the p-channel MOS field effect transistor and also apply a tensile strain...
7193280 Indium oxide conductive film structures  
One-transistor ferroelectric memory devices using an indium oxide film (In 2 O 3 ), an In 2 O 3 film structure, and corresponding fabrication methods have been provided. The method for controlling...
Matches 151 - 200 out of 1121 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >