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7605059 |
Semiconductor device and method of manufacturing the semiconductor device
A semiconductor device comprises: a MOS transistor including: a semiconductor substrate; a source region, formed in the semiconductor substrate, that comprises an impurity of a first conductive...
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7602022 |
Surge voltage protection diode with controlled p-n junction density gradients
To prevent the destruction of a semiconductor element due to negative resistance, and to reduce the dynamic resistance of a static electricity prevention diode, the ratio of the maximum electric...
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7598538 |
ESD protecting circuit and manufacturing method thereof
An ESP protecting circuit and a manufacturing method thereof are provided. The ESP protecting circuit includes a device isolation layer, first and second high-concentration impurity regions, a...
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7595537 |
MOS type semiconductor device having electrostatic discharge protection arrangement
In a semiconductor device, a well region is formed in a semiconductor substrate, a transistor-formation region is defined in the well region. An electrostatic discharge protection device is...
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7582938 |
I/O and power ESD protection circuits by enhancing substrate-bias in deep-submicron CMOS process
A technique to enhancing substrate bias of grounded-gate NMOS fingers (ggNMOSFET's) has been developed. By using this technique, lower triggering voltage of NMOS fingers can be achieved without...
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7579658 |
Devices without current crowding effect at the finger's ends
ESD protection devices without current crowding effect at the finger's ends. It is applied under MM ESD stress in sub-quarter-micron CMOS technology. The ESD discharging current path in the NMOS or...
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7573102 |
ESD protection structure and method utilizing substrate triggering for a high-voltage tolerant pad
In an ESD protection structure and method utilizing substrate triggering for a high-voltage tolerant pad on a substrate, an ESD protection device has a source connected to the pad and a gate and a...
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7560777 |
Protection element and method of manufacture
An electrostatic discharge (“ESD”) protection circuit having dynamically configurable series-connected diodes and a method for manufacturing the ESD protection circuit. A doped region of P-type...
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7560345 |
Method of assessing potential for charging damage in integrated circuit designs and structures for preventing charging damage
A method for preventing charging damage during manufacturing of an integrated circuit design, having silicon over insulator (SOI) transistors. The method prevents damage from charging during...
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7557413 |
Serpentine ballasting resistors for multi-finger ESD protection device
This invention discloses a ballasting resistor for an electrostatic discharge (ESD) device that comprises at least one first active region forming a source/drain of an ESD discharge transistor, at...
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7554159 |
Electrostatic discharge protection device and method of manufacturing the same
An electrostatic discharge protection device that includes a semiconductor substrate of a first dopant type, at least one source/drain pair of a second dopant type formed in the substrate, wherein...
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7538394 |
Compound semiconductor switch circuit device
High-resistance elements are connected as parts of a control resistor between a switching element and a protecting element immediately near the switching element and between adjacent protecting...
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7521761 |
Variable layout structure for producing CMOS circuit
A layout structure for a CMOS circuit comprises a transistor layer forming P-type transistors 11 and 21 and N-type transistors 12 and 22, and a resistor layer which includes a resistor 13 ...
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7521713 |
Semiconductor device having electrostatic discharge element
A semiconductor device includes a laminated substrate; a removal portion; a cavity; a first semiconductor element; and a second semiconductor element. In the laminated substrate, a bulk layer, an...
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7511345 |
Bulk resistance control technique
The present invention provides a MOS transistor device for providing ESD protection including at least one interleaved finger having a source, drain and gate region formed over a channel region...
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7508038 |
ESD protection transistor
An electrostatic discharge (ESD) transistor structure includes a self-aligned outrigger less than 0.4 microns from a gate electrode that is 50 microns wide. The outrigger is fabricated on ordinary...
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7492011 |
Semiconductor device and manufacturing method of semiconductor device
To present a semiconductor device mounting ESD protective device appropriately applicable to transistors mutually different in dielectric strength, and its manufacturing method. The semiconductor...
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7473974 |
Semiconductor circuit device including a protection circuit
A protection element comprises a ring-shape gate electrode, an N + drain region inside the ring-shape gate electrode, an N + source region outside, and a shield plate electrode. The ring gate and...
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7470959 |
Integrated circuit structures for preventing charging damage
Disclosed is a circuit for preventing charging damage in an integrated circuit design, for example, a design having silicon over insulator (SOI) transistors. The circuit prevents damage from...
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7470942 |
Thin film transistor array and electrostatic discharge protective device thereof
A thin film transistor array, an electrostatic discharge protective device thereof, and methods for fabricating the same are provided. The thin film transistor array comprises a plurality of scan...
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7466009 |
Method for reducing dislocation threading using a suppression implant
The present invention provides a method for manufacturing a semiconductor device. In one embodiment, the method for manufacturing the semiconductor device includes a method for manufacturing a...
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7465994 |
Layout structure for ESD protection circuits
A layout structure for an ESD protection circuit includes a first MOS device area having a first and second doped regions of the same polarity disposed at two sides of a first conductive gate...
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7456478 |
MOS transistor circuit
A reduction of a current capability of a MOS transistor (P 1 ) is compensated by dynamically changing a substrate bias of the MOS transistor (P 1 ) in response to a fluctuation of the power supply,...
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7449751 |
High voltage operating electrostatic discharge protection device
A high voltage operating electrostatic discharge protection device is provided. The high voltage operating electrostatic discharge protection device includes: a first gate structure and a second...
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7449750 |
Semiconductor protection device
A semiconductor protection device for efficiently protecting internal circuits in semiconductor integrated circuits wherein an N-type diffusion layer is formed to enclose a P + doped diffusion...
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7446378 |
ESD protection structure for I/O pad subject to both positive and negative voltages
An ESD protection circuit is disclosed for an n-channel MOS transistor formed in an inner p-well of a triple-well process and connected to an I/O pad that may experience both positive and negative...
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7439591 |
Gate layer diode method and apparatus
Method, apparatus, and article of manufacture for a diode defined by a portion of a gate layer of an integrated circuit. Illustrative, non-limiting embodiments of the invention are provided,...
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7432555 |
Testable electrostatic discharge protection circuits
A semiconductor die has a bonding pad for a MOSFET such as a power MOSFET and a separate bonding pad for ESD protection circuitry. Connecting the bonding pads together makes the ESD protection...
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7420251 |
Electrostatic discharge protection circuit and driving circuit for an LCD using the same
An exemplary ESD protection circuit includes first and second sets of transistors and an ESD discharge transistor. Each of the transistors includes a source electrode, a drain electrode, and a gate...
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7417303 |
System and method for ESD protection
An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programable attenuation...
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7411251 |
Self protecting NLDMOS, DMOS and extended voltage NMOS devices
In an NLDMOS, DMOS or NMOS active device the ability to withstand snapback under stress conditions is provided by moving the hot spot away from the drain contact region. This is achieved by moving...
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7408226 |
Electronic card with protection against aerial discharge
An electronic card includes a card terminal which is exposed on a surface of a card, a semiconductor integrated circuit chip including an insulated-gate field effect transistor, and a protection...
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7405446 |
Electrostatic protection systems and methods
Systems and methods are disclosed herein to provide improved electrostatic protection for electrical circuits. For example, in accordance with an embodiment of the present invention, an...
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7402869 |
Apparatus and method for breakdown protection of a source follower circuit
A breakdown protection circuit for a source follower comprising a field effect transistor (FET). The protection circuit comprises a plurality of PFET's and NFET's that are controlled to exhibit on...
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7402846 |
Electrostatic discharge (ESD) protection structure and a circuit using the same
An electrostatic discharge (ESD) protection structure is disclosed. The ESD protection structure includes an active device. The active device includes a plurality of drains. Each of the drains has...
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7397089 |
ESD protection structure using contact-via chains as ballast resistors
According to an exemplary embodiment, an ESD protection structure situated in a semiconductor die includes a FET including a gate and first and second active regions, where the gate includes at...
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7394134 |
Semiconductor device with electrostatic discharge protection
A semiconductor device is provided having a high performance resistance element. In an N-type well isolated by an insulating film, two higher concentration N-type regions are formed. An interlayer...
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7368786 |
Process insensitive ESD protection device
Methods and apparatus for ESD protection of LDMOS devices are provided. The apparatus comprises two LDMOS devices, with source, drain and gate contacts parallel coupled. One is the protected device...
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7361957 |
Device for electrostatic discharge protection and method of manufacturing the same
The present invention relates to a device for electrostatic discharge protection (ESD). According to an embodiment of the present invention, a device for electrostatic discharge protection includes...
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7358572 |
Radiation tolerant electrostatic discharge protection networks
Realizing that rather than protect electronic circuitry, electrostatic discharge networks when hit by cosmic rays and charged particles, can actually cause the electronic circuitry in satellites...
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7355252 |
Electrostatic discharge protection device and method of fabricating the same
An electrostatic discharge protection device, and a method of fabricating the same, includes a substrate, an n-well formed in the substrate, a p-well formed on the n-well, an NMOS transistor formed...
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7355250 |
Electrostatic discharge device with controllable holding current
An electrostatic discharge (ESD) device with a parasitic silicon controlled rectifier (SCR) structure and controllable holding current is provided. A first distance is kept between a first N+ doped...
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7355249 |
Silicon-on-insulator based radiation detection device and method
Structures and a method for detecting ionizing radiation using silicon-on-insulator (SOI) technology are disclosed. In one embodiment, the invention includes a substrate having a buried insulator...
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7352031 |
Electrostatic-breakdown-preventive and protective circuit for semiconductor-device
A compact electrostatic-breakdown-preventive and protective circuit for a semiconductor-device capable of performing high-speed operations includes first and second protective transistors. The...
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7342281 |
Electrostatic discharge protection circuit using triple welled silicon controlled rectifier
Provided is an electrostatic discharge (ESD) protection circuit using a silicon controlled rectifier (SCR), which is applied to a semiconductor integrated circuit (IC). A semiconductor substrate...
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7340699 |
Analysis apparatus for semiconductor LSI circuit electrostatic discharge by calculating inter-pad voltage between pads
A semiconductor integrated circuit electrostatic discharge analysis apparatus includes a resistance network generation unit generating a resistance network served as a power supply interconnect...
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7335953 |
Circuit substrate, electro-optical device, and electronic apparatus
The invention provides a circuit substrate including an electrostatic-breakdown-protection circuit efficient for an EL display panel or the like. A substrate includes a common electrode formed on...
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7323753 |
MOS transistor circuit and voltage-boosting booster circuit
To an output of an NMOS having one end connected to a power source, a capacitor and a PMOS are connected. A capacitor is connected to the output of the PMOS. The NMOS and the PMOS are turned on...
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7323752 |
ESD protection circuit with floating diffusion regions
This invention discloses an electrostatic discharge (ESD) protection circuit that comprises a substrate of a predetermined type, at least one MOS transistor being coupled to a pad of an integrated...
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7319254 |
Semiconductor memory device having resistor and method of fabricating the same
A semiconductor device having resistors in a peripheral area and fabrication method thereof are provided. A mold layer is formed on a semiconductor substrate. The mold layer is patterned to form...
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