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6586290 Structure for ESD protection in semiconductor chips  
An ESD protection structure for I/O pads is formed with well resistors underlying the active areas of a transistor. The well resistors are coupled in series with the active areas and provide...
6583477 Field emission device  
The present invention provides a field emission device driven with a high voltage. The field emission device of the present invention includes a resistor connected between a gate electrode and an...
6580130 Process for producing a resistor in an integrated circuit and corresponding integrated static random access memory device having four transistors and two resistors  
An integrated static random access memory device includes four transistors and two resistors defining a memory cell. The four transistors are in a semiconductor substrate and are mutually...
6576961 Substrate resistance ring  
An embodiment of the invention is a doped region within the silicon substrate 20 of an integrated circuit where the silicon substrate 10 separates the doped region into at least two sub-regions...
6570226 Device and circuit for electrostatic discharge and overvoltage protection applications  
The present invention is related to a semiconductor device for electrostatic discharge or overvoltage protection applications, said device comprising means for absorbing an electrostatic discharge...
6566715 Substrate-triggered technique for on-chip ESD protection circuit  
In this invention, a novel substrate-triggered technique is proposed to effectively improve the electrostatic discharge (ESD) robustness of integrated circuit (IC) products. The ESD protection...
6563176 Asymmetrical semiconductor device for ESD protection  
An asymmetrical ESD protection device and a method of production thereof are provided. A source region and a drain region are formed in a substrate. A gate is formed over the substrate between the...
6559508 ESD protection device for open drain I/O pad in integrated circuits with merged layout structure  
An open drain driver circuit and a Vss to Vdd FET with a merged layout structure are formed to provide a short path for an ESD current from an associated pad and either Vss or Vdd. The short path...
6559507 Compact ballasting region design for snapback N-MOS ESD protection structure using multiple local N&plus region blocking  
In a n+ snapback device, saturation current is limited by using one or more NLDD current blocking regions. This limits the snapback saturation current, while avoiding current stratification by...
6552399 Dummy layer diode structures for ESD protection  
Described are structures for a device with a controllable dummy layer which can provide a low controllable trigger voltage and can be used as a first triggered device in ESD protection networks. A...
6552372 Integrated circuit having improved ESD protection  
An MOS integrated circuit, such as an input-output buffer, exhibits improved resistance to damage from electrostatic discharge (ESD) by balancing the ESD current flow through active and inactive...
6550039 Circuit design method for designing conductive members with a multilayered structure to have antenna sized of proper values  
A circuit design method for designing conductive members with a multilayered structure to have antenna sizes of proper values is disclosed. Individual damage is calculated for each of a plurality...
6545322 Semiconductor protection device  
There is provided a semiconductor integrated circuit device with high electrostatic resistance. A semiconductor device is provided with a transistor for input-output protection having a desired...
6541824 Modified source side inserted anti-type diffusion ESD protection device  
An ESD protection circuit that will prevent internal circuits of an integrated circuit is formed on a semiconductor substrate to prevent damage during extreme voltage levels from an ESD voltage...
6541801 Triac with a holding voltage that is greater than the dc bias voltages that are on the to-be-protected nodes  
The holding voltage (the minimum voltage required for operation) of a triac is increased to a value that is greater than a dc bias on to-be-protected nodes. The holding voltage is increased by...
6538289 Smart power component  
A power component is proposed which reliably switches inductive loads and has a current detection element to detect the current through the inductive load. The component includes a protective...
6538288 ESD protection device with island-like distributed p&plus diffusion regions  
An electrostatic discharge (ESD) protection structure for an integrated circuit constructed on a substrate of a first type is provided to includes a plurality of island-like distributed diffusion...
6534834 Polysilicon bounded snapback device  
A snapback device functions as a semiconductor protection circuit to prevent damage to integrated circuits due to events such as electrostatic discharge and the like. The snapback device is...
6529035 Arrangement for improving the ESD protection in a CMOS buffer  
An arrangement for improving the ESD protection in a CMOS buffer includes a plurality of PMOS transistors (31 to 37) and a plurality of NMOS transistors (41-47) which are connected in series with...
6521952 Method of forming a silicon controlled rectifier devices in SOI CMOS process for on-chip ESD protection  
An NMOS-trigger silicon controlled rectifier in silicon-on-insulator (SOI-NSCR) SOI-NSCR includes a P-type well and an N-type well. A first P+ doping region and a first N+ doping region are in the...
6504216 Electrostatic discharge protective circuit  
An electrostatic discharge protective circuit. The electrostatic discharge protective circuit includes a gate electrode. A drain is formed at one side of the gate electrode. A source is formed at...
6504213 SOI-structure field-effect transistor and method of manufacturing the same  
A dynamic threshold-voltage MOSFET (DTMOS) enables a low power consumption, even during use under conditions of a comparatively high gate voltage. A first contact portion and a gate electrode are...
6498373 ESD protection CMOS structure with dynamic substrate control  
In an ESD protection device and method, greater stability is achieved in a MOS device by replacing the thin gate oxide with a shallow trench isolation region, and breakdown voltages are reduced by...
6495888 Semiconductor device with p-n junction diode and method of forming the same  
The present invention provides a semiconductor device having: a first semiconductor region of a first conductivity type having a first area and a second area; at least a diffusion region of a...
6492686 Integrated circuit having buffering circuitry with slew rate control  
Buffering circuitry (10) uses pull-up slew rate control circuitry (12) and pull-down slew rate control circuitry (14) to control the rising and falling slew rates of an output signal (50) provided...
6493047 Liquid crystal display panel having electrostatic discharge prevention circuitry  
A liquid crystal display (ALCD@) panel having electrostatic discharge (AESD@) prevention circuitry. The LCD panel includes a plurality of gate lines connected to a gate driving circuit and a...
6486515 ESD protection network used for SOI technology  
A method for forming an electrostatic discharge device using silicon-on-insulator technology is described. An N-well is formed within a silicon semiconductor substrate. A P+ region is implanted...
6479869 Semiconductor device with enhanced protection from electrostatic breakdown  
A semiconductor device is provided that is resistant to electrostatic breakdown by forming active elements for enhancing the protection capability by utilizing a guard ring. A circuit formation...
6479870 ESD device with salicide layer isolated by shallow trench isolation for saving one salicide block photomask  
A electrostatic discharge (ESD) device with salicide layers isolated by a shallow trench isolation in order to save one salicide block photomask. A shallow trench isolation is formed in drain...
6476449 Silicide block for ESD protection devices  
A semiconductor device has a first diffusion region having a silicided portion and a non-silicided portion. The device also has a second diffusion region, and a channel region between the first...
6476422 Electrostatic discharge protection circuit with silicon controlled rectifier characteristics  
An ESD protection circuit based on a modification of conventional silicon controlled rectifier (SCR) for preventing integrated circuits from ESD damage. A first N-well, which has a second N-type...
6472710 Field MOS transistor and semiconductor integrated circuit including the same  
A field MOS transistor having a high withstand voltage is disclosed. An island region of an epitaxial layer is surrounded by a heavily-doped isolation layer and a lightly-doped isolation layer...
6469354 Semiconductor device having a protective circuit  
A semiconductor device includes a protective circuit at an input/output port thereof, wherein the protective circuit includes a plurality of protective MOS transistors. A diffused region is...
6466423 Electrostatic discharge protection device for mixed voltage application  
A novel electrostatic discharge (ESD) protection device used for mixed voltage application is disclosed. A primary ESD device and a MOS transistor stack are respectively coupled to the...
6462380 ESD protection circuit for advanced technologies  
A structure is designed with a lightly doped substrate (316) having a first conductivity type and a face. A first lightly doped region (314) has a second conductivity type and is formed within the...
6462390 Multi-film capping layer for a salicide process  
A multi-film capping layer having a cobalt layer, a barrier layer, and a stuffing layer is disclosed, wherein the barrier layer isolates the cobalt layer from the stuffing layer. The multi-film...
6462383 Semiconductor device with embedded protection element  
A semiconductor device includes an internal element and a protection element for protecting the internal element from entering static electricity. The both elements have the respective embedded...
6462384 Semiconductor device for ESD protection  
A semiconductor device for ESD protection is provided. The semiconductor device includes a plurality of transistors having a multi-fingered structure, a plurality of multilayer interconnections...
6455897 Semiconductor device having electrostatic discharge protection circuit  
A semiconductor device, including an electrostatic discharge protection circuit capable of preventing current from being concentrated in a hot spot through a silicide layer, includes an N-type MOS...
6455898 Electrostatic discharge input protection for reducing input resistance  
An ESD protection structure for protecting an internal circuit comprising a primary protection device, a secondary protection device, and a substrate pickup is presented. The primary protection...
6448593 Type-1 polysilicon electrostatic discharge transistors  
The present invention provides a method and apparatus for providing a polysilicon type-1 ESD transistor in a flash memory chip. The method and apparatus include providing a select gate transistor...
6441437 Integrated semiconductor circuit with protective structure for protection against electrostatic discharge  
An integrated semiconductor circuit includes a protective structure for protection against electrostatic discharge. The protective structure is disposed between a terminal pad and the integrated...
6441460 Largely voltage-independent electrical resistor formed in an integrated semiconductor circuit  
An electrical resistor integrated in an integrated semiconductor circuit to have a useful resistor with two spaced-apart useful resistor terminal contact regions and a useful resistor region of...
6429505 SOI semiconductor controlled rectifier and diode for electrostatic discharge protection  
A diode (QN1) is connected in parallel to one of two bipolar transistors (PB1, NB1) constituting a semiconductor-controlled rectifier or SCR (400) in such a direction as to encourage positive...
6424013 Body-triggered ESD protection circuit  
A protection circuit is designed with an external terminal (300), a reference terminal (126) and a substrate (342). A semiconductor body (338) is formed by an isolation region (332, 340) formed...
6420774 Low junction capacitance semiconductor structure and I/O buffer  
A low junction capacitance semiconductor structure and an I/O buffer are disclosed. The semiconductor structure includes a MOS transistor and a lightly doped region. The MOS transistor is formed...
6417544 Diode-like plasma induced damage protection structure  
A novel structured for a diode-like PID protection (DLPP) device structure and process are described. An N-well, three associate N+ regions and a P+ region are formed on a P substrate. The DLPP is...
6414370 Semiconductor circuit preventing electromagnetic noise  
A semiconductor circuit or a semiconductor device has the current-voltage characteristic that, in a blocking-state of the semiconductor circuit or the semiconductor device, a current gently flows...
6404017 Protection circuit for semiconductor integrated circuit that can discriminate between program voltage and static electricity  
A current when static electricity intrudes is passed by a first circuit portion composed of a series circuit including a fuse element and a resistor until a program voltage is applied to a program...
6399991 Semiconductor integrated circuit  
In the guard ring section, four regions, p+ diffusion region, n+ diffusion region, n+ diffusion region, and p+ diffusion region, are formed to surround a hard macro and disposed in the order of...