Matches 101 - 150 out of 572 < 1 2 3 4 5 6 7 8 9 10 11 12 >
Match Document Document Title
7098509 High energy ESD structure and method  
In one embodiment, a concentric ring ESD structure includes a first p-type region and a second p-type region are formed in a layer of semiconductor material. The two p-type regions are coupled...
7098510 Multifinger-type electrostatic discharge protection element  
A multifinger ESD protection element has between an input wiring to which a surge current is input and a reference-potential wiring, 2n-number (where n is a natural number of 2 or greater) of...
7098522 High voltage device with ESD protection  
A high voltage device. A high voltage MOS transistor is applied in the ESD protection device to the structure of which a doped region is added, generating a parasitic semiconductor controlled...
7087968 Electrostatic discharge protection circuit and semiconductor circuit therewith  
An ESD protection circuit is adapted for an integrated circuit with a first power source and a second power source. The ESD protection circuit comprises a first silicon controlled rectifier (SCR),...
7075155 Structure for protecting a semiconductor circuit from electrostatic discharge and a method for forming the structure  
A structure for protecting a semiconductor circuit from electrostatic discharge is provided. The structure comprises a semiconductor substrate of a first conductivity type having two wells of a...
7067887 High voltage device and high voltage device for electrostatic discharge protection circuit  
A high voltage device for an electrostatic discharge protection circuit is provided. A silicon layer is disposed in a substrate. A first type well and a second type well are disposed in the silicon...
7067886 Method of assessing potential for charging damage in SOI designs and structures for eliminating potential for damage  
A method and structure alters an integrated circuit design having silicon over insulator (SOI) transistors. The method/structure prevents damage from charging during processing to the gate of SOI...
7064392 Semiconductor device  
In an N-channel type field effect transistor constituting an input/output protection circuit, an N-type well 1 a with a lower dopant concentration than the source region 3 c is formed under the...
7061052 Input protection circuit connected to protection circuit power source potential line  
An input protection circuit capable of precisely bypassing a surge current to a power source terminal and protecting the gate of a protective transistor from an electrostatic surge. The input...
7053452 Metal oxide semiconductor device for electrostatic discharge protection circuit  
A MOS device for an electrostatic discharge protection circuit provided. A gate structure is disposed on the substrate. A source region and a drain region are formed in the substrate beside the...
7045863 Semiconductor device  
An electrostatic discharge protected transistor of the present invention includes transistors in an active region composed of a p-type semiconductor substrate and surrounded by element isolation...
7034345 High-power, integrated AC switch module with distributed array of hybrid devices  
A novel architecture of high-power four-quadrant hybrid power modules based on high-current trench gate IGBTs and arrays of low-current wide-bandgap diodes is conceived. The distributed physical...
7034364 Reduced finger end MOSFET breakdown voltage (BV) for electrostatic discharge (ESD) protection  
The present invention relates to electro static discharge (ESD) protection circuitry. Multiple techniques are presented to adjust one or more ends of one or more fingers of an ESD protection device...
7030447 Low voltage transient voltage suppressor  
A method of providing a Transient Voltage Suppression (TVS) device is described utilizing a Metal Oxide Semiconductor (MOS) structure and an Insulated Gate Bipolar Transistor (IGBT) structure. The...
7019368 Low-capacitance input/output and electrostatic discharge circuit for protecting an integrated circuit from electrostatic discharge  
A transistor formed on a semiconductor substrate of a first conductivity type in a well formed in the substrate and doped with the first conductivity type to an impurity level higher than that of...
7012304 Diode and transistor design for high speed I/O  
An integrated circuit including a performance circuit occupying a first area of an integrated circuit substrate and a protection circuit coupled to the performance circuit and occupying a second...
7012307 Output buffer with good ESD protection  
An output buffer with a pull down circuit. The pull down circuit is coupled between a second power line and a pad, and has a resistor, a diode and an electrostatic discharge protection component....
7012308 Diode  
A diode which eliminates generation of local avalanche breakdown phenomenon when static surges in the backward direction are applied and withstands electrostatic breakdown. A P-type impurity...
7005708 Minimum-dimension, fully-silicided MOS driver and ESD protection design for optimized inter-finger coupling  
An electrostatic discharge (ESD) MOS transistor including a plurality of interleaved fingers, where the MOS transistor is formed in an I/O periphery of and integrated circuit (IC) for providing ESD...
7002219 Electrical fuse for integrated circuits  
An electrically programmable fuse includes a metal-oxide-semiconductor (MOS) programmable transistor that is gate-source coupled by a resistive element. The resistive element can comprise a...
7002218 Low capacitance ESD-protection structure under a bond pad  
An ESD-protection structure is located substantially under an integrated circuit bond pad. This ESD-protection structure is formed as a low capacitance structure by inserting a forward diode...
6979908 Input/output architecture for integrated circuits with efficient positioning of integrated circuit elements  
A described embodiment of the present invention includes an integrated circuit having a plurality of I/O modules. The I/O modules include a bond pad formed on a substrate. The I/O modules also...
6979869 Substrate-biased I/O and power ESD protection circuits in deep-submicron twin-well process  
A semiconductor device which includes a P-well which is underneath NMOS fingers. The device includes an N-well ring which is configured so that the inner P-well underneath the NMOS fingers is...
6977421 Semiconductor constructions  
The invention includes a DRAM array having a structure therein which includes a first material separated from a second material by an intervening insulative material. The first material is doped to...
6969904 Trimming pattern  
There is provided a trimming pattern enabling trimming to be implemented with ease and time required for trimming to be shortened without causing damage to internal elements. The invention provides...
6967378 Semiconductor integrated circuit device configured to prevent the generation of a reverse current in a MOS transistor  
A semiconductor integrated circuit device has a MOS transistor M 2 including a parasitic diode Dx 2 for preventing a reverse current due to a parasitic diode Dx 1 of a MOS transistor M 1 . The...
6963111 Efficient pMOS ESD protection circuit  
A pMOS transistor ( 601 ) is located in an n-well ( 602 ) and has at least one gate ( 603 ). Transistor ( 601 ) is connected between power pad Vdd or I/O pad ( 604 ) and ground potential Vss ( 605...
6960784 Charging sensor method and apparatus  
A charging sensor is provided to detect charging signal during the manufacturing process of integrated circuits and various semiconductor devices. In one embodiment, the charging sensor includes a...
6953971 Device for adjusting circuits before encapsulation  
A device for adjusting an integrated circuit before encapsulation includes a first MOS transistor having a gate and a source connected together, and a body connected to a voltage reference. A first...
6952037 Electrostatic discharge semiconductor protection circuit of reduced area  
A semiconductor device includes a substrate, a well region formed in the substrate, a field effect transistor formed in the well region, and a diffused region, formed across the well region and the...
6952027 Semiconductor integrated circuit device and electronic card using the same  
A semiconductor integrated circuit device includes a semiconductor region of a first conductivity type. A first insulated-gate field effect transistor having a source/drain region of a second...
6946690 High holding voltage ESD protection structure and method  
The holding voltage (the minimum voltage required for operation) of a LVTSCR-like device is increased to a value that is greater than a dc bias on a to-be-protected node. The holding voltage is...
6943412 Semiconductor integrated circuit  
A semiconductor integrated circuit is provided, which has an improved withstanding voltage for electrostatic breakdown at the time of electrostatic discharge by the charged device model, in the...
6940137 Semiconductor device having an angled compensation implant and method of manufacture therefor  
The present invention provides a semiconductor device 200 having an angled compensation implant, a method of manufacture therefore and a method of manufacturing an integrated circuit including...
6940104 Cascaded diode structure with deep N-well and method for making the same  
A cascaded diode structure with a deep N-well for effectively reducing the leakage current of the P-type substrate by floating the base of a parasitic transistor in the cascaded diode structure....
6940128 Semiconductor device for power MOS transistor module  
A first transistor has a first main electrode region which is formed so that these are subdivided into a plurality of first isolated island region. A second transistor has its first main electrode...
6940131 MOS ESD CDM clamp with integral substrate injection guardring and method for fabrication  
The present invention includes a MOS device ( 100 ) that has a P-type substrate ( 102 ) and an N-type drain region ( 104 ) formed within the substrate ( 102 ). An annular N-type source region ( 106...
6936896 Semiconductor apparatus  
A low voltage thyristor is disclosed that can be used to provide protection during electrostatic discharge event. The thyristor is connected between voltage reference nodes having a common...
6933567 Substrate pump ESD protection for silicon-on-insulator technologies  
An electrostatic discharge (ESD) protection device formed in the semiconductor layer of a semiconductor-on-insulator device, wherein the semiconductor layer has first and second wells. A discharge...
6927457 Circuit structure for connecting bonding pad and ESD protection circuit  
A circuit structure for connecting a bonding pad with an electrostatic discharge protection circuit. The circuit structure includes a plurality of conductive layers, a first plurality of first...
6924532 Field-effect power transistor  
The present invention provides a field-effect power transistor having a first semiconductor region ( 10 ) with first channels ( 20 ) having a large ratio of a channel width (w) to a channel length...
6919602 Gate-coupled MOSFET ESD protection circuit  
A gate-coupled MOSFET ESD protection circuit. The circuit has a gate-node potential controlled by an inverter and a timing control circuit. Unlike current-shunting ESD clamping devices that turn...
6919588 High-voltage silicon controlled rectifier structure with improved punch through resistance  
When a high-voltage, such as from an ESD pulse, is placed across a silicon controlled rectifier, which includes an NPN transistor and a PNP transistor that is connected to the NPN transistor, the...
6914305 Circuits and methods for electrostatic discharge protection in integrated circuits  
An output circuit of an integrated circuit device includes first and second MOS transistors including respective spaced apart pairs of source and drain regions in a substrate, arranged such that...
6911700 Semiconductor integrated circuit device including digital and analog circuits comprising electrostatic destruction protection circuits  
A semiconductor integrated circuit including a digital circuit and an analog circuit which are integrated on a single semiconductor chip comprises a first electrostatic destruction protection...
6894365 Semiconductor device having an integral resistance element  
A resistance element of a semiconductor device includes a first resistance pattern and a second resistance pattern formed adjacent to the first resistance pattern at a lower level, wherein the...
6882011 ESD protection device having reduced trigger voltage  
An ESD protection device having reduced trigger voltage is disclosed. A first MOS transistor includes a first gate, a first heavily doped region at one side of the first gate, and a second heavily...
6873015 Semiconductor constructions comprising three-dimensional thin film transistor devices and resistors  
The invention includes semiconductor constructions having a thin film stacked resistor in electrical connection with a source/drain region of a transistor device. The resistor includes first and...
6870229 Ultra-low power basic blocks and their uses  
The present invention relates to an ultra-low power (ULP) MOS diode. The diode has a first and a second terminal. It comprises an n-MOS transistor having a channel, a first N+ doped diffusion...
6864537 Thick gate oxide transistor and electrostatic discharge protection utilizing thick gate oxide transistors  
An electrostatic discharge (ESD) protection circuit includes a transistor with a gate electrode isolated from the semiconductor substrate by a thick oxide, a collector clamp coupled with a pad and...
Matches 101 - 150 out of 572 < 1 2 3 4 5 6 7 8 9 10 11 12 >