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6858900 |
ESD protection devices and methods to reduce trigger voltage
ESD protection devices and methods of forming them are provided in this invention. By employing the thin gate oxide fabricated by a dual gate oxide process and breakdown-enhanced layers, ESD...
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6853052 |
Semiconductor device having a buffer layer against stress
A semiconductor device and a method for preparing the same that can solve crack of a semiconductor film, capacitance electrodes and the like due to stress when forming a source electrode and a...
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6844573 |
Structure for minimizing hot spots in SOI device
In a high power input/output SOI semiconductor structure, the transistors thereof are laid out in a manner so that the high current density transistors, subject to the greatest heat buildup, are...
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6833561 |
Storage capacitor structure for LCD and OELD panels
The present invention relates to a structure and a fabrication method of a storage capacitor used in the pixel region of a display panel such as LCD or OELD. The present invention simultaneously...
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6833590 |
Semiconductor device
An NMOS transistor circuit has a surge protection circuit connected in parallel with the NMOS transistor. A resistor is connected between a back gate of the NMOS transistor and ground. As a result,...
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6833593 |
Electrode means, a method for its manufacture, an apparatus comprising the electrode means as well as use of the latter
In an electrode means comprising a first and a second thin-film electrode layers (L 1 , L 2 ) with electrodes (ε) in the form of parallel strip-like electrical conductors in each layer, the...
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6818967 |
Fabricating method of low temperature poly-silicon film and low temperature poly-silicon thin film transistor
A fabricating method of low temperature poly-silicon film is described. An amorphous silicon layer is formed on a substrate first; then, an anneal treatment is performed on the amorphous silicon...
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6818955 |
Electrostatic discharge protection
An electrostatic discharge device may provide better protection of an integrated circuit by more uniform breakdown of a plurality of finger regions. The plurality of finger regions may extend...
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6791122 |
Silicon controlled rectifier electrostatic discharge protection device with external on-chip triggering and compact internal dimensions for fast triggering
A silicon controlled rectifier electrostatic discharge protection circuit with external on-chip triggering and compact internal dimensions for fast triggering. The ESD protection circuit includes a...
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6777752 |
Complementary MOS semiconductor device
In a power management semiconductor device or analog semiconductor device having a CMOS and a resistor, a conductivity type of a gate electrode of the CMOS is P-type as to both an NMOS and a PMOS,...
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6759711 |
Method of manufacturing a transistor
A method of manufacturing a thin film transistor (TFT) is disclosed comprising source and drain electrodes joined by a semiconductor channel layer, a gate insulating layer formed from at least two...
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6753578 |
Resin-sealed semiconductor device
A resin-sealed semiconductor device is provided which allows unwanted air to be bled out steadily and readily from the space defined between the resistor of a plate-like shape and the insulating...
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6734502 |
Field effect transistor circuitry
Methods of forming field effect transistors and resultant field effect transistor circuitry are described. In one embodiment, a semiconductive substrate includes a field effect transistor having a...
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6734549 |
Semiconductor device having a device for testing the semiconductor
A semiconductor device constructed by mounting a plurality of chip intellectual properties (IPs) on a common semiconductor wiring substrate, a method for testing the device and a method for...
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6727556 |
Semiconductor device and a method of manufacturing thereof
A semiconductor device has a semiconductor element formed on a semiconductor substrate and a first insulating film having contact holes. The semiconductor element has a gate electrode, a source...
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6700162 |
Chip structure to improve resistance-capacitance delay and reduce energy loss of the chip
A chip structure comprises a substrate, a first built-up layer, a passivation layer and a second built-up layer. The substrate includes many electric devices placed on a surface of the substrate....
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6693326 |
Semiconductor device of SOI structure
A semiconductor device of SOI structure comprises a surface semiconductor layer in a floating state, which is stacked on a buried insulating film so as to construct an SOI substrate, source/drain...
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6680513 |
Semiconductor device
A semiconductor device has a first IGBT ( 1 ) for controlling a principal current and a second IGBT ( 2 ) for preventing an over-current of the first IGBT ( 1 ). A diode portion ( 11 ) is disposed...
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6653709 |
CMOS output circuit with enhanced ESD protection using drain side implantation
A new cascaded NMOS transistor output circuit with enhanced ESD protection is achieved. A driver PMOS transistor has the source connected to a voltage supply, the gate connected to the input...
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6635932 |
Thin film crystal growth by laser annealing
A layer of material is transformed from a first state to a second state by the application of energy from an energy beam. For example, large direction- and location-controlled p-Si grain growth...
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6621108 |
Semiconductor device and the process of manufacturing the semiconductor device
Disclosed herein is a semiconductor device wherein a thyristor protective element and a trigger element are provided in a semiconductor layer formed on a buried insulating layer, and a trigger...
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6621146 |
Method and apparatus for the use of embedded resistance to linearize and improve the matching properties of transistors
An integrated circuit includes a substrate and a degenerated transistor. The degenerated transistor includes a control terminal formed on the substrate, a channel formed in the substrate beneath...
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6597021 |
Protection circuit and semiconductor device
A protection circuit for protecting a semiconductor device from being damaged due to an excessively high applied voltage, includes a P-type MOS transistor provided between an external input-output...
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6590241 |
MOS transistors with improved gate dielectrics
The specification describes silicon MOS devices with gate dielectrics having the composition Ta 1−x Al x O y , where x is 0.03-0.7 and y is 1.5-3, Ta 1−x Si x O y , where x is 0.05-0.15, and y...
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6580130 |
Process for producing a resistor in an integrated circuit and corresponding integrated static random access memory device having four transistors and two resistors
An integrated static random access memory device includes four transistors and two resistors defining a memory cell. The four transistors are in a semiconductor substrate and are mutually...
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6552399 |
Dummy layer diode structures for ESD protection
Described are structures for a device with a controllable dummy layer which can provide a low controllable trigger voltage and can be used as a first triggered device in ESD protection networks. A...
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6550039 |
Circuit design method for designing conductive members with a multilayered structure to have antenna sized of proper values
A circuit design method for designing conductive members with a multilayered structure to have antenna sizes of proper values is disclosed. Individual damage is calculated for each of a plurality...
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6531745 |
Electro static discharge protection n-well ballast resistor device
An n-well resistor device and its method of fabrication. The n-well resistor device of the present invention comprises a first n-type region and a second n-type region formed in an n-type silicon...
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6518108 |
Electronic device and a method for making the same
An electronic device which comprises a gate electrode on one surface of a substrate and a gate insulating film covering the substrate and the gate electrode therewith is described. The device...
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6492689 |
Semiconductor device switching regulator used as a DC regulated power supply
In a driving power IC including a starter circuit comprising a main-switch (MS) transistor, a starter switch (SS) for starting the MS transistor and a start resistor (or a resistor element) SR, the...
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6489656 |
Resistor for high performance system-on-chip using post passivation process
The present invention extends the above referenced continuation-in-part application by in addition creating high quality electrical components, such as inductors, capacitors or resistors, on a...
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6489662 |
Semiconductor integrated circuit device formed on SOI substrate
A semiconductor integrated circuit device comprises a thin film layer formed on a silicon-on-insulator (SOI) substrate, a laser-trimmable fuse element, a laser trimming positioning pattern for...
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6479870 |
ESD device with salicide layer isolated by shallow trench isolation for saving one salicide block photomask
A electrostatic discharge (ESD) device with salicide layers isolated by a shallow trench isolation in order to save one salicide block photomask. A shallow trench isolation is formed in drain...
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6475873 |
Method of forming laser trimmable thin-film resistors in a fully planarized integrated circuit technology
A new and improved method of forming a thin film resistor is provided herein that overcomes many of the drawbacks of prior art methods. More specifically, the new method of forming a thin film...
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6441460 |
Largely voltage-independent electrical resistor formed in an integrated semiconductor circuit
An electrical resistor integrated in an integrated semiconductor circuit to have a useful resistor with two spaced-apart useful resistor terminal contact regions and a useful resistor region of...
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6429458 |
Method of making a micromechanical device from a single crystal semiconductor substrate and monolithic sensor formed thereby
A monolithic sensor including a doped mechanical structure is movably supported by but electrically isolated from a single crystal semiconductor substrate of the sensor through a relatively simple...
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6424013 |
Body-triggered ESD protection circuit
A protection circuit is designed with an external terminal ( 300 ), a reference terminal ( 126 ) and a substrate ( 342 ). A semiconductor body ( 338 ) is formed by an isolation region ( 332, 340 )...
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6420760 |
Thin film transistor manufacturing method and thin film transistor
A first insulation film is formed as a gate insulation film of a thin film transistor, and a gate electrode is formed on the gate insulation film. Then, dopant is implanted to form source and drain...
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6393603 |
Circuit design method calculating antenna size of conductive member connected to gate oxide film of transistor with approximate expression
Antenna size of conductive members is calculated with respect to an area of a gate oxide film of a transistor using an expression which approximates an actual relationship of changes therein, not...
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6380591 |
Electrode wiring board subjected to counter measure against static electricity and display device using the same
A step portion is formed in an insulating layer provided between two opposing electrode layers outside a pixel electrode formation region, so that a projection portions are formed on the two...
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6369428 |
Polysilicon load for 4T SRAM operating at cold temperatures
This invention relates to the fabrication of integrated circuit devices and more particularly to a method for reducing the otherwise excessive negative TCR of low doped polysilicon load resistors...
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6351021 |
Low temperature coefficient resistor (TCRL)
A low temperature coefficient resistor (TCRL) has some unrepaired ion implant damage. The damaged portion raises the resistance and renders the resistor less sensitive to operating temperature...
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6348718 |
Integrated CMOS circuit for use at high frequencies
The invention relates to an integrated CMOS circuit for use at high frequencies with active CMOS components ( 12 ) and passive components ( 16, 18, 20 ). The active CMOS components ( 12 ) are...
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6340830 |
Semiconductor device and method for forming the same
In a field effect type device having a thin film-like active layer, there is provided a thin film-like semiconductor device including a top side gate electrode on the active layer and a bottom side...
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6310380 |
Electrostatic discharge protection transistor structure with a trench extending through the source or drain silicide layers
A MOS transistor structure is provided for ESD protection in an integrated circuit device. A trench controls salicide deposition to prevent hot spot formation and allows control of the turn-on...
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6274908 |
Semiconductor device having input-output protection circuit
A semiconductor device having a SOI structure in which an ESD resistance can be enhanced is obtained. The semiconductor device comprises PMOS transistors Q21 and Q22 which are brought into a...
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6249027 |
Partially depleted SOI device having a dedicated single body bias means
A conductive body contact or layer is embedded in the bulk region of a partially depleted SOI device. The contact or layer is connected to the output of a bias voltage generator which generates a...
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6246092 |
High breakdown voltage MOS semiconductor apparatus
A MOS type semiconductor apparatus is provided that includes a first MOS type semiconductor device through which main current flows, and a second MOS type semiconductor device through which current...
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6229183 |
ESD damage immunity buffer
The present invention discloses an ESD damage immunity buffer, comprising: a gate, a first doped region, a second doped region, a third doped region, and a resist layer. The ESD damage immunity...
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6218704 |
ESD protection structure and method
The preferred embodiment of the present invention overcomes the limitations of the prior art and provides a device and method to increase the robustness of electrostatic discharge (ESD) protection...
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