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7633125 |
Integration of silicon boron nitride in high voltage and small pitch semiconductors
Integration of silicon boron nitride in high voltage semiconductors is generally described. In one example, a microelectronic apparatus includes a semiconductor substrate upon which transistors of...
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7622775 |
System for ESD protection with extra headroom in relatively low supply voltage integrated circuits
An ESD protection system providing extra headroom at an integrated circuit (IC) terminal pad. The system includes an ESD protection circuit having one or more first diodes coupled in series between...
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7615826 |
Electrostatic discharge protection semiconductor structure
An electrostatic discharge (ESD) protection device with adjustable single-trigger or multi-trigger voltage is provided. The semiconductor structure has multi-stage protection semiconductor circuit...
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7612410 |
Trigger device for ESD protection circuit
The present invention is a trigger device useful, for example, in triggering an SCR in an ESD protection circuit. Illustratively, an NMOS trigger device comprises a gate and heavily doped P and N...
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7602022 |
Surge voltage protection diode with controlled p-n junction density gradients
To prevent the destruction of a semiconductor element due to negative resistance, and to reduce the dynamic resistance of a static electricity prevention diode, the ratio of the maximum electric...
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7595537 |
MOS type semiconductor device having electrostatic discharge protection arrangement
In a semiconductor device, a well region is formed in a semiconductor substrate, a transistor-formation region is defined in the well region. An electrostatic discharge protection device is...
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7589566 |
Semiconductor device provided with antenna ratio countermeasure circuit
A CMOS LSI includes an inverter including first and second MOS transistors, a relatively long metal interconnection connected to an input node of the inverter, first and second diodes releasing...
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7585705 |
Method for preventing gate oxide damage of a trench MOSFET during wafer processing while adding an ESD protection module atop
A method and device structure are disclosed for preventing gate oxide damage of a trench MOSFET during wafer processing while adding an ESD protection module atop the trench MOSFET. The ESD...
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7582938 |
I/O and power ESD protection circuits by enhancing substrate-bias in deep-submicron CMOS process
A technique to enhancing substrate bias of grounded-gate NMOS fingers (ggNMOSFET's) has been developed. By using this technique, lower triggering voltage of NMOS fingers can be achieved without...
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7579658 |
Devices without current crowding effect at the finger's ends
ESD protection devices without current crowding effect at the finger's ends. It is applied under MM ESD stress in sub-quarter-micron CMOS technology. The ESD discharging current path in the NMOS or...
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7573067 |
Semiconductor display device
It is an object of the present invention to provide a semiconductor display device using a protective circuit in which dielectric breakdown is prevented more effectively. In the invention, in the...
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7566935 |
ESD structure without ballasting resistors
An electrostatic discharge (ESD) structure connected to a bonding pad in an integrated circuit comprising: a P-type substrate with one or more first P+ regions connected to a low voltage supply...
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7554158 |
Semiconductor device having analog and digital circuits
An N-type deep well is used to protect a circuit from a noise. However, a noise with a high frequency propagates through the N-type deep well, and as a result, the circuit that should be protected...
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7541235 |
Method for providing a programmable electrostatic discharge (ESD) protection device
A method for providing a programmable electrostatic discharge (ESD) protection device is provided. The method includes providing a source diffusion in a substrate, providing a deeper body diffusion...
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7525159 |
Turn-on-efficient bipolar structures for on-chip ESD protection
A semiconductor device suitable for applications in an electrostatic discharge (ESD) protection circuit, including a semiconductor substrate, a first well formed in the substrate, a second well...
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7518192 |
Asymmetrical layout structure for ESD protection
A semiconductor structure for electrostatic discharge protection is presented. The semiconductor structure comprises a grounded gate nMOS (GGNMOS) having a substrate, a gate electrode, a source...
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7511345 |
Bulk resistance control technique
The present invention provides a MOS transistor device for providing ESD protection including at least one interleaved finger having a source, drain and gate region formed over a channel region...
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7508038 |
ESD protection transistor
An electrostatic discharge (ESD) transistor structure includes a self-aligned outrigger less than 0.4 microns from a gate electrode that is 50 microns wide. The outrigger is fabricated on ordinary...
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7482659 |
Semiconductor devices with electric current detecting structure
A semiconductor device is provided with a main electrode of main switching elements region, a sensor electrode of sensor switching elements region, and a protective device formed between the main...
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7473973 |
Semiconductor device including metal-oxide-silicon field-effect transistor as a trigger circuit
A semiconductor device includes a silicon-controlled rectifier to protect an internal circuit from electrostatic discharge damage and a first metal-oxide-silicon field-effect transistor to apply a...
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7470959 |
Integrated circuit structures for preventing charging damage
Disclosed is a circuit for preventing charging damage in an integrated circuit design, for example, a design having silicon over insulator (SOI) transistors. The circuit prevents damage from...
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7465995 |
Resistor structure for ESD protection circuits
A semiconductor device includes an ESD protection device on a substrate, and a resistor having a gate structure overlying a resistor well separating a first doped region coupled to the ESD...
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7465610 |
Method for operating an H-bridge drive utilizing a pair of high and low side MOSFETS
A fully protected H-bridge for a d-c motor consists of two high side MOSFETs and a control and logic IC on a first conductive heat sink all within a first package and two discrete low side MOSFETs....
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7465993 |
Semiconductor chips having improved electrostatic discharge protection circuit arrangement
A semiconductor chip may include a plurality of pads arranged in at least a first and a second row, and a plurality of protection circuits connected to the plurality of pads. The plurality of...
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7449751 |
High voltage operating electrostatic discharge protection device
A high voltage operating electrostatic discharge protection device is provided. The high voltage operating electrostatic discharge protection device includes: a first gate structure and a second...
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7439590 |
Semiconductor device
A semiconductor device features connecting gate patterns of all transistors to a N+ or +P junction by the first connected wiring layer to prevent degradation of characteristics of the semiconductor...
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7439591 |
Gate layer diode method and apparatus
Method, apparatus, and article of manufacture for a diode defined by a portion of a gate layer of an integrated circuit. Illustrative, non-limiting embodiments of the invention are provided,...
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7436041 |
Electrostatic discharge protection circuit using a double-triggered silicon controlling rectifier
An ESD protection circuit using a double-triggered silicon controller rectifier (SCR). The double-triggered silicon controller rectifier (SCR) includes N+ diffusion areas, P+ diffusion areas, a...
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7432556 |
Semiconductor device with dummy conductors
At least a laminate of a gate insulating film 6 and a gate electrode 7 and an active region 13 are formed on a silicon substrate 1 , and an underlying interlayer insulating film 10 is...
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7429774 |
Electrostatic discharge (ESD) protection MOS device and ESD circuitry thereof
An NMOS device having protection against electrostatic discharge. The NMOS device includes a P-substrate, a P-epitaxial layer overlying the P-substrate, a P-well in the P-epitaxial layer, an N-well...
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7420251 |
Electrostatic discharge protection circuit and driving circuit for an LCD using the same
An exemplary ESD protection circuit includes first and second sets of transistors and an ESD discharge transistor. Each of the transistors includes a source electrode, a drain electrode, and a gate...
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7420252 |
LDMOS device with improved ESD performance
A semiconductor device includes a first doped region disposed on a first well in a semiconductor substrate; a second doped region disposed on a second well adjacent to the first well in the...
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7417287 |
Electrostatic discharge device having controllable trigger voltage
An electrostatic discharge (ESD) device has a parasitic SCR structure and a controllable trigger voltage. The controllable trigger voltage of the ESD device is achieved by modulating a distance...
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7417303 |
System and method for ESD protection
An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programable attenuation...
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7402868 |
System and method for protecting semiconductor devices
A semiconductor memory device includes a group of word lines and a structure that is configured to dissipate current from the group of word lines during fabrication of the semiconductor memory device.
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7402846 |
Electrostatic discharge (ESD) protection structure and a circuit using the same
An electrostatic discharge (ESD) protection structure is disclosed. The ESD protection structure includes an active device. The active device includes a plurality of drains. Each of the drains has...
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7391069 |
Semiconductor device and manufacturing method thereof
In a conventional semiconductor device, for example, a MOS transistor, there is a problem that a parasitic transistor is prone to be operated due to an impurity concentration in a back gate region...
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7385253 |
Device for electrostatic discharge protection and circuit thereof
Disclosed herein are a device for electrostatic protection and circuit thereof. According to the present invention, a device for electrostatic discharge protection comprises first to third wells...
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7361957 |
Device for electrostatic discharge protection and method of manufacturing the same
The present invention relates to a device for electrostatic discharge protection (ESD). According to an embodiment of the present invention, a device for electrostatic discharge protection includes...
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7355250 |
Electrostatic discharge device with controllable holding current
An electrostatic discharge (ESD) device with a parasitic silicon controlled rectifier (SCR) structure and controllable holding current is provided. A first distance is kept between a first N+ doped...
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7352031 |
Electrostatic-breakdown-preventive and protective circuit for semiconductor-device
A compact electrostatic-breakdown-preventive and protective circuit for a semiconductor-device capable of performing high-speed operations includes first and second protective transistors. The...
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7342282 |
Compact SCR device and method for integrated circuits
A semiconductor device and method for electrostatic discharge protection. The semiconductor device includes a first semiconductor controlled rectifier and a second semiconductor controlled...
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7335954 |
Electrostatic discharge protection device
An electrostatic discharge (ESD) protection device includes a first-type substrate, a second-type well formed in the substrate and a first-type well formed in the substrate. The second-type well...
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7323753 |
MOS transistor circuit and voltage-boosting booster circuit
To an output of an NMOS having one end connected to a power source, a capacitor and a PMOS are connected. A capacitor is connected to the output of the PMOS. The NMOS and the PMOS are turned on...
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7298008 |
Electrostatic discharge protection device and method of fabricating same
Disclosed are a silicon control rectifier, a method of making the silicon control rectifier and the use of the silicon control rectifier as an electrostatic discharge protection device of an...
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7294892 |
Multi-transistor layout capable of saving area
A multi-transistor layout capable of saving area includes a substrate; a common drain comprising four sides formed over the substrate; four gates formed over the four sides of the common drain; and...
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7291883 |
Semiconductor device
In a conventional semiconductor device, there is a problem that an N-type diffusion region provided for protecting an element from an overvoltage is narrow and a breakdown current is concentrated...
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7285837 |
Electrostatic discharge device integrated with pad
A structure of an electrostatic discharge (ESD) device integrated with a pad is provided. The ESD device is integrated with the pad and formed under the pad. By using the area under the pad, the...
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7282768 |
MOS field-effect transistor
A high-reliable depletion-type MOS field-effect transistor as a process monitor is provided. A diode formed in polycrystalline silicon and a diode formed in a semiconductor substrate form a...
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7274071 |
Electrostatic damage protection device with protection transistor
This invention provides an electrostatic damage protection device which can protects a device to be protected enough from an electrostatic damage and prevents damages of protection transistors...
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