Matches 351 - 400 out of 1124 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >
Match Document Document Title
6858902 Efficient ESD protection with application for low capacitance I/O pads  
A semiconductor device for ESD protection of an input/output pad ( 301 ) of an integrated circuit built in a substrate of a first conductivity type comprising a multi-finger MOS transistor ( 304 ),...
6858900 ESD protection devices and methods to reduce trigger voltage  
ESD protection devices and methods of forming them are provided in this invention. By employing the thin gate oxide fabricated by a dual gate oxide process and breakdown-enhanced layers, ESD...
6855964 Triggering of an ESD NMOS through the use of an N-type buried layer  
An ESD NMOS structure with an odd number of N-type structures built into a P-type well. Buried N-type structures are positioned between the N-type structures. The center N-type structure and each...
6855611 Fabrication method of an electrostatic discharge protection circuit with a low resistant current path  
A fabrication method of an electrostatic discharge protection circuit is described, in which a buried layer is formed in the substrate of the electrostatic discharge protection circuit, and a...
6855981 Silicon carbide power device having protective diode  
A silicon carbide power device includes a junction field effect transistor and a protective diode, which is a Zener or PN junction diode. The PN junction of the protective diode has a breakdown...
6855586 Low voltage breakdown element for ESD trigger device  
As technology in the semiconductor industry advances, semiconductor devices decrease in size to become faster and less expensive per function. Smaller semiconductor devices, particularly MOSFETs,...
6853036 Method and apparatus for preventing microcircuit dynamic thermo-mechanical damage during an ESD event  
A method and apparatus for preventing thermo-mechanical damage to an electrostatic discharge (ESD) protection device is disclosed. The method and apparatus of the invention focus on preventing ESD...
6853063 Semiconductor device and communication terminal using thereof  
Wire bonding or printed wiring board leads or, alternatively, lead frames or equivalents thereof are used to electrically connect external electrodes of high withstand voltage capacitors formed on...
6849907 Electrostatic discharge protection device  
An electrostatic discharge (ESD) protection device. The ESD protection device includes a first parasitic bipolar transistor, a second parasitic bipolar transistor, a third parasitic bipolar...
6849902 Input/output cell with robust electrostatic discharge protection  
An electrostatic discharge (ESD) protection device with enhanced ESD robustness. The ESD protection device comprises a pad, a finger-type MOS, a well stripe and a doped segment. The pad is on a...
6847082 Semiconductor integrated device including an electrostatic breakdown protection circuit having uniform electrostatic surge response  
A semiconductor integrated device having a source region and a drain region of a first conductive type, a channel region of a second conductive type which is located between the source and drain...
6847059 Semiconductor input protection circuit  
A lateral PNP transistor PB and a lateral NPN transistor NB are serially connected between an input terminal and a reference potential (ground potential). In the transistor PB, a diode D 1 is...
6844596 Si-MOS high-frequency semiconductor device  
A sophisticated and highly reliable high-frequency Si-MOS semiconductor device having high electrostatic discharge (ESD) resistance. Lateral polysilicon diodes are connected between high-frequency...
6844598 Lateral high breakdown voltage MOSFET and device provided therewith  
A film thickness of a gate oxide film of a lateral high breakdown voltage MOSFET of a first conduction type is formed with a thickness in which an electric field value to an absolute maximum rated...
6844617 Packaging mold with electrostatic discharge protection  
The present invention relates to a packaging mold with electrostatic discharge protection, comprising at least one recess for receiving at least one packaging substrate, the packaging substrate...
6844573 Structure for minimizing hot spots in SOI device  
In a high power input/output SOI semiconductor structure, the transistors thereof are laid out in a manner so that the high current density transistors, subject to the greatest heat buildup, are...
6844595 Electrostatic discharge protection circuit with high triggering voltage  
An ESD protection circuit comprising a substrate having a first conductivity type, a well region having a second conductivity type, a first doping region having the first conductivity type, and a...
6838708 I/O cell and ESD protection circuit  
An ESD protection circuit has a VDD bus, a VSS bus, an IC pad, a PMOS transistor coupled to the IC pad and the VDD bus, and an NMOS transistor coupled to the IC pad and the VSS bus. The pitch of...
6838323 Diffusion resistor/capacitor (DRC) non-aligned MOSFET structure  
A structure and process for making a non-aligned MOSFET structure for ESD protection using resistor wells as the diffusions and adjustable capacitors. The present invention compensates the shallow...
6838734 ESD implantation in deep-submicron CMOS technology for high-voltage-tolerant applications  
High-voltage-tolerant ESD protection devices (ESDPD) for deep-submicron CMOS process were activated between LDD implanting and forming sidewall spacers. ESD-Implant (ESDI) regions are located at...
6835984 ESD resistant device  
A semiconductor device such as a photodetector has a substrate having an active region layer containing an active region of the device. A dielectric layer is disposed on the active region layer,...
6835985 ESD protection structure  
A transistor structure is provided for ESD protection in an integrated circuit device. A semiconductor substrate has source and drain diffusion regions and respective source and drain wells under...
6833568 Geometry-controllable design blocks of MOS transistors for improved ESD protection  
An MOS transistor in the surface of a semiconductor substrate ( 180 ) of a first conductivity type, which has a grid of isolations ( 171 ) in the surface, each grid unit surrounding a rectangular...
6833590 Semiconductor device  
An NMOS transistor circuit has a surge protection circuit connected in parallel with the NMOS transistor. A resistor is connected between a back gate of the NMOS transistor and ground. As a result,...
6831334 Semiconductor device having electrostatic protection circuit and method of fabricating the same  
A semiconductor device including an electrostatic protection circuit capable of preventing current from being concentrated in a hot spot through a silicide layer. A plurality of salicide N-type MOS...
6831327 Vertically structured power semiconductor component  
A vertically structured semiconductor power component is described. A layer thickness of a substrate of the power module between a pn junction and a metallized back is chosen in such a manner that...
6825504 Semiconductor integrated circuit device and method of manufacturing the same  
In order to eliminate the difference in ESD resistance caused by polarities of excessive voltages applied to an external terminal and enhance ESD resistance of a semiconductor integrated circuit...
6822297 Additional n-type LDD/pocket implant for improving short-channel NMOS ESD robustness  
A short-channel NMOS transistor in a p-well, bordered laterally on each side by an isolation region and vertically by a channel stop region, has a n-source and a n-drain, each comprising a shallow...
6822296 Complementary metal oxide semiconductor structure for battery protection circuit and battery protection circuit having the same  
A complementary metal-oxide semiconductor (CMOS) structure for a battery protection circuit and a battery protection circuit therewith. A tri-well technique or a buried layer technique is used for...
6822294 High holding voltage LVTSCR  
In an ESD protection device using a LVTSCR-like structure, the holding voltage is increased by placing the p+ emitter outside the drain of the device, thereby retarding the injection of holes from...
6822295 Overvoltage protection device using pin diodes  
A device and method of manufacture for a low capacitance overvoltage protection device. This is accomplished through the use of PiN diodes to shunt overvoltage away from internal circuit elements....
6818953 Protection of an integrated circuit against electrostatic discharges and other overvoltages  
The forming of an integrated circuit including at least one element of electronic protection of the circuit formed of at least one switch for short-circuiting supply conductors arranged in a rail,...
6818955 Electrostatic discharge protection  
An electrostatic discharge device may provide better protection of an integrated circuit by more uniform breakdown of a plurality of finger regions. The plurality of finger regions may extend...
6818956 Non-volatile memory device and fabrication method thereof  
A nonvolatile read-only memory device, wherein a word line is on a substrate and the word line includes a metal layer and a polysilicon line. A trapping layer is further located between the word...
6815775 ESD protection design with turn-on restraining method and structures  
The present invention is directed to an electrostatic discharge (ESD) device with an improved ESD robustness for protecting output buffers in I/O cell libraries. The ESD device according to the...
6815776 Multi-finger type electrostatic discharge protection circuit  
A multi-finger type electrostatic discharge protection circuit is disclosed. In an NMOS type ESD protection circuit, a pair of gates are formed in parallel with each other in one of multiple active...
6812528 Surge protection circuit for semiconductor devices  
A surge protection device includes a gate electrode embedded in an insulator, a source electrode and a drain electrode on the insulator. The source and drain electrodes respectively form first and...
6809383 Method of manufacturing an integrated edge structure for high voltage semiconductor devices, and related integrated edge structure  
Method of manufacturing an edge structure for a high voltage semiconductor device, including a first step of forming a first semiconductor layer of a first conductivity type, a second step of...
6800516 Electrostatic discharge device protection structure  
The problem of gate oxide damage as a result of electrostatic discharges has been overcome by including within the drain of the ESD protection device a region having very high defect density. Its...
6800906 Electrostatic discharge protection circuit  
The invention provides an ESD protection circuit compatible with the high voltage device manufacturing processes by using parasitic bipolar junction transistor punch characteristics. The design of...
6798066 Heat dissipation from IC interconnects  
The present invention relates to dissipating heat from an interconnect formed in a low thermal conductivity dielectric in an integrated circuit apparatus. The integrated circuit apparatus includes...
6792578 Hard macro having an antenna rule violation free input/output ports  
Disclosed is an improved hard macro design for use in an ASIC, which avoids undesirable buildup of electrostatic charge on a gate of an I/O transistor of the hard macro. The hard macro includes a...
6791122 Silicon controlled rectifier electrostatic discharge protection device with external on-chip triggering and compact internal dimensions for fast triggering  
A silicon controlled rectifier electrostatic discharge protection circuit with external on-chip triggering and compact internal dimensions for fast triggering. The ESD protection circuit includes a...
6787400 Electrostatic discharge protection device having a graded junction and method for forming the same  
An electrostatic discharge protection device is formed in a substrate and contains a drain area of a first dopant concentration abutting an extended drain area having a dopant concentration lower...
6787856 Low triggering N MOS transistor for electrostatic discharge protection device  
An ESD device and method using parasitic bipolar transistors that are silicided. The first embodiment is a parasitic Bipolar Junction Transistor comprised of n+/n−/p−/n−/n+ regions. The...
6784496 Circuit and method for an integrated charged device model clamp  
A CDM clamp circuit integrated into the interface circuit it is protecting on an integrated circuit. Generally, the integrated CDM clamp circuit and interface circuit are adjacent to each other and...
6784001 Automated variation of stepper exposure dose based upon across wafer variations in device characteristics, and system for accomplishing same  
A novel method and system for fabricating integrated circuit devices is disclosed herein. In one embodiment, the method comprises determining at least one electrical performance characteristic of a...
6784497 Semiconductor device  
A semiconductor device according to the invention of the present application comprises a first semiconductor layer, a first insulating layer formed over the first semiconductor layer, a second...
6781170 Integrated circuit base transistor structure and associated programmable cell library  
A base transistor structure and associated programmable cell library compatible with standard cell computer-aided design (CAD) tools are disclosed. In an illustrative embodiment of the invention,...
6781192 Low dielectric constant shallow trench isolation  
Techniques of shallow trench isolation and devices produced therefrom. The techniques of shallow trench isolation utilize foamed polymers, cured aerogels or air gaps as the insulation medium. Such...
Matches 351 - 400 out of 1124 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >