Matches 651 - 700 out of 1122 < 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 >
Match Document Document Title
6303412 Methods of forming semiconductor-on-insulator substrates and devices and structures formed thereby  
Methods of forming semiconductor-on-insulator field effect transistors include the steps of forming an insulated trench containing a semiconductor region therein and an insulating region mesa at a...
6303970 Semiconductor device with a plurality of fuses  
In the present invention, a semiconductor device includes a first insulation layer formed on a semiconductor substrate, an elevating pad formed on the first insulation layer, a second insulation...
6303964 Circuit device for protection against electrostatic discharge, immune to the latch-up phenomenon  
The present invention relates to a circuit device for protection against electrostatic discharge, and being immune to the latch-up phenomenon. The circuit device is of the integrated type in a...
6300649 Silicon-on-insulator transistors having improved current characteristics and reduced electrostatic discharge susceptibility  
An SOI MOSFET having improved electrical characteristics includes a low barrier body contact under the source region, and alternatively under the drain region, to facilitate collection and removal...
6291879 Integrated circuit chip with improved locations of overvoltage protection elements  
On a semiconductor integrated circuit chip, multiple equipotential power-line conductors are provided to supply power to circuit elements. First protecting elements are provided for interconnecting...
6288412 Thin film transistors for display devices having two polysilicon active layers of different thicknesses  
A method of manufacturing a polycrystalline silicon film having a particular field effect mobility is disclosed. A first polycrystalline silicon film is formed on a transparent insulation...
6288428 Semiconductor integrated circuit device for disk drive apparatus  
A semiconductor integrated circuit device for a magnetic drive apparatus has a driver for supplying an electric current to a motor including an inductance coil, a pad for receiving or outputting a...
6281554 Electrostatic discharge protection circuit  
A high-voltage electrostatic discharge protection circuit according to the invention has the following structure. A first high-voltage N-well region, a first high-voltage P-well region, a second...
6274908 Semiconductor device having input-output protection circuit  
A semiconductor device having a SOI structure in which an ESD resistance can be enhanced is obtained. The semiconductor device comprises PMOS transistors Q21 and Q22 which are brought into a...
6274910 ESD protection circuit for SOI technology  
An ESD protection circuit is fabricated on a semiconductor block on an insulating layer overlying a supporting substrate. The ESD protection circuit comprises a first N-type doped region, a first...
6274909 Guard ring structure with deep N well on ESD devices  
In this invention a deep N-type wall is created surrounding an area that contains an ESD device, or circuit. The ESD device, or circuit, is connected to a chip pad and is first surrounded by a P+...
6274885 Active matrix display device with TFTs of different refractive index  
In producing a semiconductor device by annealing with laser light irradiation, while a linear laser light is scanned in a direction perpendicular to a line, the annealing is performed for a...
6271567 Belowground and oversupply protection of junction isolated integrated circuits  
In a junction isolated integrated circuit including power DMOS transistors formed in respective well regions or in an isolated epitaxial region on a substrate of opposite type of conductivity,...
6268630 Silicon-on-insulator field effect transistor with improved body ties for rad-hard applications  
A silicon-on-insulator (SOI) field-effect transistor (FET) and a method for making the same are disclosed. The SOI FET is characterized by a source which extends only partially (e.g. about...
6268242 Method of forming vertical mosfet device having voltage clamped gate and self-aligned contact  
One or more diodes are connected in a conductive path between the source and gate of a vertical MOSFET to prevent the voltage between the gate and source from exceeding a predetermined level and...
6265251 Method to fabricate a thick oxide MOS transistor for electrostatic discharge protection in an STI process  
A new method of forming a thick oxide MOS transistor for electrostatic discharge protection in a standard sub-micron STI CMOS process for an integrated circuit device has been achieved. A first...
6265756 Electrostatic discharge protection device  
An electrostatic discharge protection device for reducing electrostatic discharge spikes on a signal line is disclosed. The electrostatic discharge protection device includes first and second...
6262454 Protection structure for high-voltage integrated electronic devices  
A protective structure having a plurality of protection regions extending along closed lines arranged inside each other. Each intermediate protective region is tangent to two different adjacent...
6259137 Defect induced buried oxide (DIBOX) for throughput SOI  
A method of fabricating a defect induced buried oxide (DIBOX) region in a semiconductor substrate utilizing a first low energy implantation step to create a stable defect region; a second low...
6259139 Embedded well diode MOS ESD protection circuit  
The present invention is related to a MOS ESD protection circuit with embedded well diodes. The proposed protection circuit comprises following basic components: a well locates in a substrate; some...
6259140 Silicide blocking process to form non-silicided regions on MOS devices  
A semiconductor device is formed on a substrate having an ESD region and an internal region. A protective layer is formed over a portion of the ESD region to be protected from formation of silicide...
6255696 Retrograde ESD protection apparatus  
A retrograde ESD (electrostatic discharge) protection apparatus is disclosed. In a MOSFET (metal-oxide-semiconductor field effect transistor) having a source region, a drain region, a gate region,...
6245600 Method and structure for SOI wafers to avoid electrostatic discharge  
A method of dissipating charge from a substrate of an SOI device is provided wherein a charge dissipation path is formed in the device so that it abuts the various layers thereof. Exemplary charge...
6246122 Electrostatic discharge protective schemes for integrated circuit packages  
An ESD protective device for protection of an integrated circuit (IC) package from electrostatic discharge damage. The ESD protective device protects the internal circuit of the IC connected to...
6236073 Electrostatic discharge device  
An electrostatic discharge protective circuit formed on a substrate is described. A gate electrode is formed over the substrate. A drain region is formed in the substrate at one side of the gate...
6236087 SCR cell for electrical overstress protection of electronic circuits  
An input protection device is provided for protecting a circuit structure which is coupled to a first node, the device comprising a first lightly-doped region of P-type material with a lightly...
6236086 ESD protection with buried diffusion  
An ESD protection circuit with buried diffusion and internal overlap coupling capacitance is used to lower trigger voltage and create a compact protection circuit area. This protection circuit can...
6236088 Semiconductor device gate structure for thermal overload protection  
An arrangement for providing thermal overload protection for a gated electrode power semiconductor device comprises connecting the gate electrode of the device in a series circuit between the gate...
6229181 Semiconductor device and method of forming a semiconductor structure to provide electrostatic discharge protection  
An improved semiconductor device is disclosed for protecting active and passive devices against electrostatic discharge (ESD). The device is an improved semiconductor diode having anode, injector...
6229182 Semiconductor device having protection against electrostatic discharge  
To improve the robustness of a protection against ESD, a transistor structure is proposed in which breakdown does not occur at the surface of the silicon body but in the bulk of the silicon at a...
6225665 Semiconductor device having multiple source regions  
In a region on the left hand of FIG. 1 with respect to the gate electrode (107), a first source region (103a), a body-potential drawing region (105) and a second source region (103b) are formed in...
6222237 Structure of electrostatic discharge protection device  
A structure of an ESD protection device located between a pad and an internal circuit. The structure comprises a transistor with a source and a drain connecting to the ground, and an N+ resistor...
6222234 Semiconductor device having partially and fully depleted SOI elements on a common substrate  
The invention provides a semiconductor device that has a fully depleted MOSFET and a partially depleted MOSFET having excellent characteristics on the same substrate without effecting control by...
6222235 Small geometry high voltage semiconductor device  
A semiconductor device including multiple high-voltage drive transistors in its output section is improved in electrostatic withstand voltage by connecting electrostatic protection transistors in...
6222236 Protection circuit and method for protecting a semiconductor device  
An electrostatic discharge (ESD) protection circuit (20) includes an active load circuit (22) connected to a Laterally Diffused Metal Oxide Semiconductor (LDMOS) transistor (21) having a Lightly...
6218704 ESD protection structure and method  
The preferred embodiment of the present invention overcomes the limitations of the prior art and provides a device and method to increase the robustness of electrostatic discharge (ESD) protection...
6218706 Integrated circuit with improved electrostatic discharge protection circuitry  
An MOS integrated circuit device with improved electrostatic protection capability includes high and low voltage rails for bringing externally-supplied power to points within the chip. Input...
6218694 Semiconductor memory device and method for manufacturing same  
In a semiconductor memory device has a first contact region that is provided with a plurality of contacts in the source/drain region on one side of a third interconnect, and a second contact region...
6218705 Semiconductor device having protective element to conduct current to substrate  
A semiconductor device includes a protective element which is formed on a semiconductor substrate and conducts current to the semiconductor substrate at a voltage lower than the breakdown voltage...
6215138 Semiconductor device and its fabrication method  
A source region 3 and a back-gate region 4 are alternately arranged along one side of a gate electrode 2 in a power MOSFET. The back-gate region 4 is formed so as not to substantially include the...
6215135 Integrated circuit provided with ESD protection means  
An integrated circuit provided with ESD protection means comprising a silicon-controlled rectifier whose n-well (WLL), if the substrate (SBSTR) of the integrated circuit is of the p-type, is...
6215157 Electrostatic discharge protection circuit for a semiconductor integrated circuit and layout thereof  
In accordance with the present invention, a semiconductor integrated circuit comprises an internal circuit, an output driver circuit connected to the internal circuit for amplifying an output...
6211553 Thin-film transistor, a method for manufacturing same, and a liquid crystal display device using the transistor  
A thin-film transistor comprises a semiconductor unit 60 constituted of a channel formation portion 61 and a source region 63 and a drain region 62 sandwiching the channel formation portion 61...
6211565 Apparatus for preventing electrostatic discharge in an integrated circuit  
An integrated circuit package includes a semiconductor chip, a plurality of wired pins, and at least one non-wired pin. The size of the non-wired pin is minimized, or the non-wired pin is...
6211533 Solid state imager including TFTs with variably doped contact layer system for reducing TFT leakage current and increasing mobility  
A TFT structure includes a variably doped contact layer system in order to reduce leakage current characteristics and increase mobility of the TFT. Such TFTs may be utilized in, for example, X-ray...
6207997 Thin film transistor for antistatic circuit and method for fabricating the same  
A thin film transistor for an antistatic circuit includes: wells formed on a silicon substrate; insulating layers for electrical isolation between electrodes formed within the wells; low density...
6204549 Overvoltage protection device  
The invention relates to an overvoltage protection device and to a method for fabricating such a device. A substrate (1) is provided with a first electrode layer (2), above which extends a second...
6204537 ESD protection scheme  
An integrated circuit device is provided comprising an integrated circuit pad, an internal integrated circuit, and an ESD protection circuit. The internal integrated circuit is conductively coupled...
6205500 System and method for electrically isolating a device from higher voltage devices  
An isolation system and method that electrically couples a device to a bus during cycles associated with or accessing the device, but otherwise isolates the device from the bus. The isolation...
6198135 Semiconductor device having electrostatic discharge protection element and manufacturing method thereof  
A semiconductor device having an ESD protection element with an improved ESD resistance is obtainable even if it is formed on the same substrate together with an internal circuit. An SiGe--P well...
Matches 651 - 700 out of 1122 < 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 >