Matches 351 - 400 out of 1848 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >
Match Document Document Title
7317226 Patterned SOI by oxygen implantation and annealing  
Methods for forming a patterned SOI region in a Si-containing substrate is provided which has geometries of about 0.25 μm or less. Specifically, one method includes the steps of: forming a...
7317209 Thin film transistor device and method of manufacturing the same, thin film transistor substrate and display having the same  
In a method for manufacturing a TFT device, a metal thin film is formed on a gate insulation film. Patterning is performed to remove the metal thin film on a semiconductor layer, and phosphorous...
7315064 Bonded wafer and method of producing bonded wafer  
The present invention provides a bonded wafer, wherein at least a silicon single crystal layer is formed on a silicon single crystal wafer, the silicon single crystal layer has a crystal plane...
7309949 Piezoelectric/electrostrictive porcelain composition, piezoelectric/electrostrictive ceramic and piezoelectric/electrostrictive film type device  
A piezoelectric/electrostrictive porcelain composition capable of being manufactured at a comparatively low firing temperature is provided, as well as a piezoelectric/electrostrictive ceramic or a...
7307281 Method of manufacturing substrate, method of manufacturing organic electroluminescent display device using the method, and organic electroluminescent display device  
A method of manufacturing an organic electroluminescent display device includes preparing an auxiliary substrate, which has a flat side; forming a first protective layer on the auxiliary substrate;...
7307317 Semiconductor device, CPU, image processing circuit and electronic device, and driving method of semiconductor device  
The invention provides a semiconductor device which consumes less power in pending. The invention further provides a semiconductor device in which a gate electrode is provided over both sides of a...
7306998 Formation of abrupt junctions in devices by using silicide growth dopant snowplow effect  
A method of forming an abrupt junction device with a semiconductor substrate is provided. A gate dielectric is formed on a semiconductor substrate, and a gate is formed on the gate dielectric. A...
7307467 Structure and method for implementing oxide leakage based voltage divider network for integrated circuit devices  
A voltage divider device includes a double gate field effect transistor (FET) having a first gate and a second gate disposed at opposite sides of a body region. An input voltage is coupled between...
7303950 Semiconductor device, method of manufacturing same and method of designing same  
A partial oxide film ( 31 ) with well regions formed therebeneath isolates transistor formation regions in an SOI layer ( 3 ) from each other. A p-type well region ( 11 ) is formed beneath part of...
7301211 Method of forming an oxide film  
A method of forming an oxide film and a method of manufacturing an electronic device utilizing the oxide film is disclosed. A silicon oxide film is formed on a substrate by sputtering. Therefore,...
7300846 Semiconductor device and method for manufacturing the same  
A semiconductor device and a method for manufacturing the same are disclosed, in which an insulating layer may be formed in a strained silicon layer under source/drain regions to substantially...
7301204 SOI component with increased dielectric strength and improved heat dissipation  
A semiconductor component arrangement comprises a semiconductor substrate of a first conduction type, an insulation layer arranged on the substrate, and a semiconductor layer arranged on the...
7298008 Electrostatic discharge protection device and method of fabricating same  
Disclosed are a silicon control rectifier, a method of making the silicon control rectifier and the use of the silicon control rectifier as an electrostatic discharge protection device of an...
7297584 Methods of fabricating semiconductor devices having a dual stress liner  
In a semiconductor device having a dual stress liner for improving electron mobility, the dual stress liner includes a first liner portion formed on a PMOSFET and a second liner portion formed on...
7294561 Internal gettering in SIMOX SOI silicon substrates  
The present invention provides methods for forming SOI wafers having internal gettering layers for sequestering metallic impurities. More particularly, in one embodiment of the invention, a...
7294887 Semiconductor device comprising thin film transistor  
TFTs arranged in various circuits have structures that are suited for circuit functions, in order to improve operation characteristics and reliability of the semiconductor device, to lower...
7291885 Thin film transistor and fabrication method thereof  
A thin film transistor is provided, including a substrate, a gate, a first dielectric layer, a channel layer, a source/drain and a second dielectric layer. The gate is disposed on the substrate,...
7291877 Integrated circuit arrangement with capacitor  
An integrated circuit arrangement contains an insulating region, which is part of a planar insulating layer, and a capacitor which contains: near and far electrode regions near and remote from the...
7288789 Semiconductor device having thin film transistor and light-shielding film  
A semiconductor device in which TFTs of suitable structures are arranged depending upon the performances of the circuits, and storage capacitors are formed occupying small areas, the semiconductor...
7288821 Structure and method of three dimensional hybrid orientation technology  
A method and device for increasing pFET performance without degradation of nFET performance. The method includes forming a first structure on a substrate using a first plane and direction and...
7288818 Organic thin film transistor with low gate overlap capacitance and flat panel display including the same  
Provided are an organic thin film transistor, a flat panel display device and methods of manufacturing these. The organic thin film transistor includes: source and drain electrodes and an organic...
7288447 Semiconductor device having trench isolation for differential stress and method therefor  
A semiconductor device has trenches for defining active regions. After a thin diffusion barrier is deposited in the trenches, some of the trenches are selectively etched to leave different areas in...
7288817 Reverse metal process for creating a metal silicide transistor gate structure  
The present invention teaches a method of forming a MOSFET transistor having a silicide gate which is not subject to problems produced by etching a metal containing layer when forming the gate...
7288443 Structures and methods for manufacturing p-type MOSFET with graded embedded silicon-germanium source-drain and/or extension  
P-type MOSFETs (PMOSFETs) are formed by encapsulating the gate with an insulator and depositing a germanium containing layer outside the sidewalls, then diffusing the germanium into the...
7288804 Electrically programmable π-shaped fuse structures and methods of fabrication thereof  
Electrically programmable fuse structures for an integrated circuit and methods of fabrication thereof are presented, wherein the electrically programmable fuse has a first terminal portion and a...
7285825 Element formation substrate for forming semiconductor device  
A support-side substrate having a thermal oxide film on the major surface is bonded to an active-layer-side substrate having a thermal oxide film on the major surface while making the major...
7282736 Light emitting structure including an exposed electrode overlapping a wiring or conductive layer  
(Object) In a light-emitting device, it is preferable that a surface of a film below a light-emitting element has flatness. Therefore, treatment such as planarization of a surface of a film is...
7282738 Fabrication of crystalline materials over substrates  
A method of forming crystalline or polycrystalline layers includes providing a substrate and a patterning over the substrate. The method also includes providing nucleation material and forming the...
7279750 Semiconductor device incorporating a semiconductor constructing body and an interconnecting layer which is connected to a ground layer via a vertical conducting portion  
A semiconductor device includes metal foil to which a ground potential is applied, at a semiconductor constructing body provided on the metal foil and having a semiconductor substrate and a...
7279749 Semiconductor device and semiconductor memory using the same  
Aspects of the invention can provide a semiconductor device and a semiconductor memory using the semiconductor device having a gate shape by which the width of the gate can be realized as designed...
7276765 Buried transistors for silicon on insulator technology  
A buried transistor particularly suitable for SOI technology, where the transistor is fabricated within a trench in a substrate and the resulting transistor incorporates completely isolated active...
7276763 Structure and method for forming the gate electrode in a multiple-gate transistor  
In a method of forming semiconductor device, a semiconductor fin is formed on a semiconductor-on-insulator substrate. A gate dielectric is formed over at least a portion of the semiconductor fin. A...
7274037 Thin film transistor and display device using the same  
A thin film transistor including an active layer formed on an insulating substrate and having channel, source, and drain regions formed therein, wherein a voltage is applied to the channel region...
7274072 Hybrid bulk-SOI 6T-SRAM cell for improved cell stability and performance  
The present invention provides a 6T-SRAM semiconducting structure including a substrate having an SOI region and a bulk-Si region, wherein the SOI region and the bulk-Si region have a same or...
7274038 Silicon nitride film, a semiconductor device, a display device and a method for manufacturing a silicon nitride film  
The present invention provides a method for forming by plasma CVD a silicon nitride film that can be formed over heat-sensitive elements as well as an electroluminescent element and that has...
7274073 Integrated circuit with bulk and SOI devices connected with an epitaxial region  
An integrated circuit having devices fabricated in both SOI regions and bulk regions, wherein the regions are connected by a trench filled with epitaxially deposited material. The filled trench...
7271455 Formation of fully silicided metal gate using dual self-aligned silicide process  
An advanced gate structure that includes a fully silicided metal gate and silicided source and drain regions in which the fully silicided metal gate has a thickness that is greater than the...
7271444 Wrap-around gate field effect transistor  
A field effect transistor is formed having wrap-around, vertically-aligned, dual gate electrodes. Starting with an silicon-on-insulator (SOI) structure having a buried silicon island, a vertical...
7271447 Semiconductor device  
A semiconductor substrate includes a first semiconductor layer that is formed on a semiconductor base substrate, a second semiconductor layer that is formed on the first semiconductor layer and...
7268396 Finfets having first and second gates of different resistivities  
A fin field effect transistor (FinFET) includes a first gate and a second gate. The first gate has a vertical part that is defined by sidewalls of a silicon fin and sidewalls of a capping pattern...
7268387 Semiconductor device and an electronic device  
The present invention provides a semiconductor nonvolatile memory in which writing or erasing of storing information can be carried out at a high speed with low consumption power and in which...
7265418 Semiconductor devices having field effect transistors  
A semiconductor device having a field effect transistor and a method of fabricating the same. In-situ doped epitaxial patterns are respectively formed at both sidewalls of a protruded channel...
7265393 Thin-film transistor with vertical channel region  
A vertical thin-film transistor (V-TFT) is provided along with a method for forming the V-TFT. The method comprises: providing a substrate made from a material such as Si, quartz, glass, or...
7265420 Semiconductor substrate layer configured for inducement of compressive or expansive force  
An integrated circuit (IC) utilizes a strained layer. The substrate can utilize trenches in a base layer to induce stress in a layer. The trenches define pillars on a back side of a bulk substrate...
7265419 Semiconductor memory device with cell transistors having electrically floating channel bodies to store data  
A semiconductor memory device includes: a semiconductor device base having an insulating substrate and a semiconductor layer overlying it; a cell array formed on the semiconductor device base with...
7265017 Method for manufacturing partial SOI substrates  
There is closed a semiconductor device which comprises a semiconductor substrate including an SOI region where a first insulating film is buried, and a non-SOI region, the semiconductor substrate...
7262464 Semiconductor device with single crystal semiconductor layer(s) bonded to insulating surface of substrate  
A semiconductor device includes a substrate with an insulating surface and a single crystal semiconductor layer, which is bonded to the insulating surface of the substrate. The device further...
7262486 SOI substrate and method for manufacturing the same  
The SOI substrate 1 has a supporting substrate 10 , an insulating layer 20 formed on the supporting substrate 10 and a silicon layer 30 formed on the insulating layer 20 . A through...
7262462 Vertical double-channel silicon-on-insulator transistor and method of manufacturing the same  
A vertical double channel silicon-on-insulator (SOI) field-effect-transistor (FET) includes a pair of two vertical semiconductor layers in contact with a pair of parallel shallow trench isolation...
7262466 Strained semiconductor-on-insulator structures and methods for making strained semiconductor-on-insulator structures  
The present invention relates to semiconductor-on-insulator structures having strained semiconductor layers. According to one embodiment of the invention, a semiconductor-on-insulator structure has...
Matches 351 - 400 out of 1848 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >