Matches 251 - 300 out of 1848 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >
Match Document Document Title
7425740 Method and structure for a 1T-RAM bit cell and macro  
A one transistor (1T-RAM) bit cell and method for manufacture are provided. A metal-insulator-metal (MIM) capacitor structure and method of manufacturing it in an integrated process that includes a...
7423323 Semiconductor device with raised segment  
A device having a raised segment, and a manufacturing method for same. An SOI wafer is provided having a substrate, an insulating layer disposed over the substrate, and a layer of semiconductor...
7423321 Double gate MOSFET device  
A method of fabricating a double gate MOSFET device is provided. The present invention overetches a silicon layer overlying a buried oxide layer using a hard mask of cap oxide on the silicon layer...
7423322 Thin film transistor and method of fabricating the same  
A bottom gate thin film transistor and method of fabricating the same are disclosed, in which a channel region is crystallized by a super grain silicon (SGS) crystallization method, including:...
7423324 Double-gate MOS transistor, double-gate CMOS transistor, and method for manufacturing the same  
In a double-gate MOS transistor, a substrate, an insulating layer, and a semiconductor layer are formed or laminated in that order, an opening extending to the insulating layer is formed in the...
7420248 Programmable random logic arrays using PN isolation  
Disclosed are a programmable, random logic device array, and a method of forming such a device. The device comprises a substrate, and a semiconductor layer above the substrate. That semiconductor...
7417297 Film or layer of semiconducting material, and process for producing the film or layer  
SOI wafers are manufactured to have very thin device layers of high surface quality. The layer is ≦20 nm in thickness, has an HF density of ≦0.1/cm 2 , and a surface roughness of 0.2 nm RMS.
7417286 Semiconductor integrated circuit devices having single crystalline thin film transistors and methods of fabricating the same  
Semiconductor integrated circuit devices having single crystalline thin film transistors and methods of fabricating the same are provided. The semiconductor integrated circuit devices include an...
7416957 Method for forming a strained Si-channel in a MOSFET structure  
Method for forming a strained Si layer on a substrate ( 1 ), including formation of: an epitaxial SiGe layer ( 4 ) on a Si surface, and of: the strained Si layer by epitaxial growth of the Si layer...
7417288 Substrate solution for back gate controlled SRAM with coexisting logic devices  
A semiconductor structure that includes at least one logic device region and at least one static random access memory (SRAM) device region wherein each device region includes a double gated field...
7414289 SOI Device with charging protection and methods of making same  
The present invention is directed to an SOI device with charging protection and methods of making the same. In one illustrative embodiment, a device is formed on an SOI substrate including a bulk...
7414288 Semiconductor device having display device  
A semiconductor integrated circuit having a high withstand voltage TFT and a TFT which is capable of operating at high speed in a circuit of thin film transistors (TFT) and methods for fabricating...
7411209 Field-effect transistor and method for manufacturing the same  
A method for manufacturing a field-effect transistor includes the steps of forming a source electrode and a drain electrode each containing hydrogen or deuterium; forming an oxide semiconductor...
7410839 Thin film transistor and manufacturing method thereof  
The present invention provides a thin film transistor in which a substantial length of a channel is shortened to miniaturize a semiconductor device and a manufacturing method thereof. In addition,...
7408190 Thin film transistor and method of forming the same  
A thin film transistor including a gate, a gate insulating layer, a semiconductor layer and a source/drain is provided. The gate is disposed over a substrate, wherein the gate comprises at least...
7405444 Micro-mechanically strained semiconductor film  
A semiconductor structure embodiment comprises a semiconductor membrane with local strained areas. The membrane with local strained areas is formed by a process including performing a local...
7405424 Electronic device and methods for fabricating an electronic device  
An electronic device and a method of fabricating the electronic device includes forming a first electrical contact, a dielectric layer and a second electrical contact wherein the dielectric layer...
7402875 Lateral undercut of metal gate in SOI device  
Embodiments of the invention provide a device with a metal gate, a high-k gate dielectric layer, source/drain extensions a distance beneath the metal gate, and lateral undercuts in the sides of the...
7404157 Evaluation device and circuit design method used for the same  
There is provided an evaluation apparatus capable of measuring the I-V characteristic in the MOSFET AC operation with a high accuracy. There are also provided a circuit design method and a circuit...
7402866 Backside contacts for MOS devices  
A semiconductor structure includes a semiconductor substrate having a first surface and a second surface opposite the first surface, a gate dielectric over the first surface of the semiconductor...
7402856 Non-planar microelectronic device having isolation element to mitigate fringe effects and method to fabricate same  
A non-planar microelectronic device, a method of fabricating the device, and a system including the device. The non-planar microelectronic device comprises: a substrate body including a substrate...
7402865 Semiconductor device including a contact connected to the body and method of manufacturing the same  
A Schottky junction is formed at the connection between an SOI layer and a contact (namely, under an element isolation insulating film) without forming a P + region with a high impurity...
7400031 Asymmetrically stressed CMOS FinFET  
A CMOS device comprising a FinFET comprises at least one fin structure comprising a source region; a drain region; and a channel region comprising silicon separating the source region from the...
7400015 Semiconductor structure with field shield and method of forming the structure  
Disclosed is semiconductor structure that incorporates a field shield below a semiconductor device (e.g., a field effect transistor (FET) or a diode). The field shield is sandwiched between upper...
7400030 Schottky diode with silver layer contacting the ZnO and MgxZn1−xO films  
In the present invention, there is provided semiconductor devices such as a Schottky UV photodetector fabricated on n-type ZnO and Mg x Zn 1-x O epitaxial films. The ZnO and Mg x Zn 1-x O films are...
7396707 Fabrication method of a semiconductor device  
A silicon nitride film and a silicon oxide film are formed on a glass substrate. On the silicon oxide film is formed a thin film transistor T including a source region, a drain region, a channel...
7396695 Wire structure, a thin film transistor substrate of using the wire structure and a method of manufacturing the same  
A thin film transistor array panel includes an insulating substrate, a gate wire formed on the insulating substrate. A gate insulating layer covers the gate wire. A semiconductor pattern is formed...
7397085 Thermal coupling of matched SOI device bodies  
Performance matching devices in SOI are improved by thermally isolating matched devices within a continuous body of active material. Matched devices are isolated by an insulating wall of silicon...
7397075 Method and apparatus providing CMOS imager device pixel with transistor having lower threshold voltage than other imager device transistors  
A transistor of a pixel cell for use in a CMOS imager with a low threshold voltage of about 0.3 V to less than about 0.7 V is disclosed. The transistor is provided with high dosage source and drain...
7397081 Sidewall semiconductor transistors  
A novel transistor structure and method for fabricating the same. The transistor structure comprises (a) a substrate and (b) a semiconductor region, a gate dielectric region, and a gate region on...
7397086 Top-gate thin-film transistor  
A thin-film transistor, such as a top-gate thin-film transistor, is provided herein. The thin-film transistor has a performance-enhancing layer, such as a performance-enhancing bottom layer,...
7396407 Trench-edge-defect-free recrystallization by edge-angle-optimized solid phase epitaxy: method and applications to hybrid orientation substrates  
The present invention discloses the use of edge-angle-optimized solid phase epitaxy for forming hybrid orientation substrates comprising changed-orientation Si device regions free of the...
7394130 Transistor and method for manufacturing the same  
In a process for manufacturing a thin film transistor having a semiconductor layer constituting source and drain regions and a channel forming region, by the semiconductor layer being made thinner...
7394116 Semiconductor device including a multi-channel fin field effect transistor including protruding active portions and method of fabricating the same  
In a semiconductor device, and a method of fabricating the same, the semiconductor device includes a semiconductor substrate having a cell region and a peripheral circuit region, a portion of the...
7394129 SOI wafer and method for producing it  
An SOI wafer is constructed from a carrier wafer and a monocrystalline silicon layer having a thickness of less than 500 nm, an excess of interstitial silicon atoms prevailing in the entire volume...
7394131 STI formation in semiconductor device including SOI and bulk silicon regions  
Methods for forming or etching silicon trench isolation (STI) in a silicon-on-insulator (SOI) region and a bulk silicon region, and a semiconductor device so formed, are disclosed. The STI can be...
7391055 Capacitor, semiconductor device and manufacturing method thereof  
A highly reliable capacitor, a semiconductor device having high operating performance and reliability, and a manufacturing method thereof are provided. A capacitor formed of a first conductive film...
7391047 System for forming a strained layer of semiconductor material  
A method for forming a strained layer of semiconductor material, e.g., silicon, germanium, Group III/V, silicon germanium alloy. The method includes providing a non-deformable surface region having...
7388259 Strained finFET CMOS device structures  
A semiconductor device structure, includes a PMOS device 200 and an NMOS device 300 disposed on a substrate 1,2 , the PMOS device including a compressive layer 6 stressing an active region...
7388257 Multi-gate device with high k dielectric for channel top surface  
A multi-gate device has a high-k dielectric layer for a top channel of the gate and a protective layer for use in a finFET device. The high-k dielectric layer is placed on the top surface of the...
7385251 Area-efficient gated diode structure and method of forming same  
An area-efficient gated diode includes a semiconductor layer of a first conductivity type, an active region of a second conductivity type formed in the semiconductor layer proximate an upper...
7381597 Method for fabricating a thin-film transistor  
A method for fabricating a thin-film transistor contains successively forming four thin films on a substrate and performing an etching process to pattern the four thin films, wherein the four thin...
7382022 Semiconductor device and boost circuit  
A semiconductor device includes a transistor that is used for a charge pump circuit, being configured with a fully depleted silicon-on-insulator transistor.
7378357 Multiple dielectric FinFET structure and method  
Disclosed is a method and structure for a fin-type field effect transistor (FinFET) structure that has different thickness gate dielectrics covering the fins extending from the substrate. These...
RE40339 Silicon-on-insulator chip having an isolation barrier for reliability  
An SOI chip having an isolation barrier. The SOI chip includes a substrate, an oxide layer deposited on the substrate, and a silicon layer deposited on the oxide layer. A gate is deposited above...
7378714 Semiconductor device and its manufacturing method  
In a complete depletion type SOI transistor, the roll-off of a threshold value is suppressed, independently from the formation of an SOI film to be thinner. As for a semiconductor device ( 1 ), the...
7378710 FinFET SRAM cell using inverted FinFET thin film transistors  
An integrated circuit, such as a SRAM cell ( 130 ), including an inverted FinFET transistor (P 2 ) and a FinFET transistor (N 3 ). The inverted FinFET transistor includes a first gate region ( 108...
7375397 Semiconductor device having an SOI structure and method for manufacturing the same  
There is provided a semiconductor device in which the characteristic variations of a transistor and the degradation of a gate oxide layer are reduced during a WP process and a method for...
7375396 Thin film transistor and method of fabricating the same  
The present invention discloses a thin film transistor and a method of fabricating the same. The thin film transistor includes an insulating substrate; and a semiconductor layer, a gate insulating...
7372107 SOI chip with recess-resistant buried insulator and method of manufacturing the same  
A semiconductor-on-insulator structure includes a substrate and a buried insulator stack overlying the substrate. The buried insulator stack includes a first dielectric layer and a recess-resistant...
Matches 251 - 300 out of 1848 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >