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7635856 |
Vertical nanotube field effect transistor
A self-aligned carbon-nanotube field effect transistor semiconductor device comprises a carbon-nanotube deposited on a substrate, a source and a drain formed at a first end and a second end of the...
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7633124 |
Semiconductor device and method of manufacturing thereof
A silicon nitride film having a thickness of 3 nm or less is formed on the surfaces of a P-well and N-well, as well as on the upper and side surfaces of a gate electrode, in which the silicon...
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7612414 |
Overlapped stressed liners for improved contacts
A semiconductor structure is provided which includes a first semiconductor device in a first active semiconductor region and a second semiconductor device in a second active semiconductor region. A...
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7605026 |
Self-aligned transparent metal oxide TFT on flexible substrate
A method of fabricating self-aligned metal oxide TFTs on transparent flexible substrates is disclosed and includes the steps of providing a transparent flexible substrate with at least an opaque...
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7598536 |
Semiconductor device having load resistor and method of fabricating the same
A semiconductor device includes a semiconductor substrate having a resistor region, an isolation layer disposed in the resistor region, the isolation layer defining active regions, first conductive...
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7579248 |
Resolving pattern-loading issues of SiGe stressor
A method for improving uniformity of stressors of MOS devices is provided. The method includes forming a gate dielectric over a semiconductor substrate, forming a gate electrode on the gate...
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7560776 |
Semiconductor device, electronic apparatus, method of manufacturing semiconductor device, and method of manufacturing electronic apparatus
A semiconductor device includes first and second electrodes disposed apart from each other on a substrate, a gate electrode disposed so as to face the first and second electrodes and to cover at...
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7560773 |
Semiconductor device
A vertical-type semiconductor device for controlling a current flowing between electrodes opposed against each other across a semiconductor substrate, including: a semiconductor substrate having...
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7511340 |
Semiconductor devices having gate structures and contact pads that are lower than the gate structures
Semiconductor devices have gate structures on a semiconductor substrate with first spacers on sidewalls of the respective gate structures. First contact pads are positioned between the gate...
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7492006 |
Semiconductor transistors having surface insulation layers and methods of fabricating such transistors
Semiconductor devices having a transistor and methods of fabricating such devices are disclosed. The device may include a gate pattern formed on a substrate, spacers formed on sidewalls of the gate...
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7485924 |
Lateral double-diffused field effect transistor and integrated circuit having same
In a lateral double-diffused field effect transistor of the present invention, a gate insulating film includes a first gate insulating film covering a source diffusion layer up to a region beyond...
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7436026 |
Semiconductor device comprising a superlattice channel vertically stepped above source and drain regions
A semiconductor device may include a semiconductor substrate and at least one metal oxide semiconductor field-effect transistor (MOSFET). The at least one MOSFET may include spaced apart source and...
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7420241 |
Semiconductor memory device and method of manufacturing the same
A semiconductor memory device includes a memory cell which includes a first gate insulation film provided on the semiconductor substrate; a floating gate electrode provided on the first gate...
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7355245 |
Structure for reducing overlap capacitance in field effect transistors
A field effect transistor (FET) device includes a gate conductor formed over a semiconductor substrate, a source region having a source extension that overlaps and extends under the gate conductor,...
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7348629 |
Metal gated ultra short MOSFET devices
MOSFET devices suitable for operation at gate lengths less than about 40 nm, and methods of their fabrication is being presented. The MOSFET devices include a ground plane formed of a...
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7345341 |
High voltage semiconductor devices and methods for fabricating the same
High voltage semiconductor devices and methods for fabricating the same are provided. An exemplary embodiment of a semiconductor device capable of high-voltage operation, comprising a substrate...
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7332775 |
Protruding spacers for self-aligned contacts
A protruding spacer that protrudes above the top surface of a gate electrode structure provides enhanced resistance to exposure of the gate electrode during the etch process used to form...
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7323726 |
Method and apparatus for coupling to a common line in an array
A method and apparatus for coupling to a common line in an array. Gate structures of an integrated circuit are formed. Source and drain regions adjacent to the gate structures are implanted. A...
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7288814 |
Selective post-doping of gate structures by means of selective oxide growth
A method for doping a polysilicon gate conductor, without implanting the substrate in a manner that would effect source/drain formation is provided. The inventive method comprises forming at least...
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7288817 |
Reverse metal process for creating a metal silicide transistor gate structure
The present invention teaches a method of forming a MOSFET transistor having a silicide gate which is not subject to problems produced by etching a metal containing layer when forming the gate...
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7221021 |
Method of forming high voltage devices with retrograde well
A high voltage device with retrograde well is disclosed. The device comprises a substrate, a gate region formed on the substrate, and a retrograde well placed in the substrate next to the gate...
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7176526 |
Semiconductor device, method for producing the same, and information processing apparatus
A semiconductor device 1910 comprises a semiconductor substrate 100 including an isolation region 101 and an active region 102 , a gate electrode 104 provided on the active region 102 ...
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7173306 |
Vertical semiconductor component having a drift zone having a field electrode, and method for fabricating such a drift zone
The invention relates to a method for fabricating a drift zone of a vertical semiconductor component and to a vertical semiconductor component having the following features:
a semiconductor...
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7157757 |
Semiconductor constructions
The invention includes semiconductor constructions, methods of forming gatelines, and methods of forming transistor structures. The invention can include, for example, a damascene method of forming...
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7154146 |
Dielectric plug in mosfets to suppress short-channel effects
The invention provides a technique to fabricate a dielectric plug in a MOSFET. The invention includes apparatus and systems that include one or more devices including a MOSFET having a dielectric...
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7091097 |
End-of-range defect minimization in semiconductor device
A method of fabricating a semiconductor device comprises forming a gate electrode over a substrate and forming deep amorphous regions within the substrate. And implanting dopants to form deep...
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7078769 |
Nonvolatile memory and manufacturing method thereof
Memory elements, switching elements, and peripheral circuits to constitute a nonvolatile memory are integrally formed on a substrate by using TFTs. Since semiconductor active layers of memory...
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7067880 |
Transistor gate structure
The present invention teaches a method of forming a MOSFET transistor having a silicide gate which is not subject to problems produced by etching a metal containing layer when forming the gate...
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7057236 |
Semiconductor device and manufacturing method thereof
After forming a gate electrode on a semiconductor substrate, ion implantation is performed on the semiconductor substrate by using the gate electrode as a mask to form low concentration impurity...
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7034368 |
Semiconductor memory device and fabrication method thereof using damascene gate and epitaxial growth
A semiconductor memory device and fabrication method of same includes the processes of forming sacrifice gates on a silicon substrate with the sacrifice gates apart from each other. A first...
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7022562 |
Field-effect transistor with horizontal self-aligned gates and the production method therefor
A field-effect transistor including: a support substrate, an active area forming a channel; a first active gate which is associated with a first face of the active area; source and drain areas...
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7012300 |
EL display device and manufacturing method thereof
Reducing the manufacturing cost of an EL display device and an electronic device furnished with the EL display device is taken as an objective. A textured structure in which projecting portions are...
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7002208 |
Semiconductor device and manufacturing method of the same
A semiconductor device and a method for manufacturing the semiconductor device capable of reducing a short channel effect are provided. The semiconductor device is made up of a pair of impurity...
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6977419 |
MOSFETs including a dielectric plug to suppress short-channel effects
The invention provides a technique to fabricate a dielectric plug in a MOSFET. The dielectric plug is fabricated by forming an oxide layer over exposed source and drain regions in the substrate...
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6974999 |
Semiconductor device and method of manufacturing the same
It is an object to suppress a change in a characteristic of a semiconductor device with a removal of a hard mask while making the most of an advantage of a gate electrode formed by using the hard...
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6969659 |
FinFETs (Fin Field Effect Transistors)
A FinFET structure that prevents parasitic electrical leakages between its gate region and its fin region and between its gate region and its epitaxial region (source/drain regions). The structure...
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6960808 |
Semiconductor device having a lower parasitic capacitance
A method for fabricating a semiconductor device is described. A gate dielectric layer is formed on a substrate, and several gate structures having a gate conductor, a cap layer and spacers are...
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6927448 |
NAND type dual bit nitride read only memory
A NAND type dual bit nitride read only memory and a method for fabricating thereof are provided. Firstly, a plurality of isolation layers, which are spaced and parallel to each other are formed in...
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6917085 |
Semiconductor transistor using L-shaped spacer
The present invention provides a semiconductor transistor using an L-shaped spacer. The semiconductor transistor includes a gate pattern formed on a semiconductor substrate and an L-shaped third...
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6906389 |
High-voltage, high-cutoff-frequency electronic MOS device
An MOS electronic device is formed to reduce drain/gate capacity and to increase cutoff frequency. The device includes a field insulating layer that covers a drain region, delimits an active area...
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6894350 |
LDMOS transistor capable of attaining high withstand voltage with low on-resistance and having a structure suitable for incorporation with other MOS transistors
A semiconductor device, methods for manufacturing the semiconductor device, and an integrated circuit including the semiconductor device are disclosed. The semiconductor device includes an LDMOS...
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6894356 |
SRAM system having very lightly doped SRAM load transistors for improving SRAM cell stability and method for making the same
A static random access memory (SRAM) cell is given increased stability and latch-up immunity by fabricating the PMOS load transistors of the SRAM cell to have a very low drain/source dopant...
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6891228 |
CMOS device on ultrathin SOI with a deposited raised source/drain, and a method of manufacture
A method and structure for a CMOS device comprises depositing a silicon over insulator (SOI) wafer over a buried oxide (BOX) substrate, wherein the SOI wafer has a predetermined thickness; forming...
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6881630 |
Methods for fabricating field effect transistors having elevated source/drain regions
Field effect transistors (FETs) include an integrated circuit substrate having a surface, and a gate on the surface. A pair of recessed regions in the substrate are located beneath the surface....
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6864533 |
MOS field effect transistor with reduced on-resistance
A semiconductor substrate includes a first principal plane and a second principal plane opposite this first principal plane. A first semiconductor region is formed on the first principal plane of...
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6847080 |
Semiconductor device with high and low breakdown voltage and its manufacturing method
The objective of this invention is to provide a semiconductor device and its manufacturing method with which the offset can be kept fixed even in high breakdown voltage MOS transistors, and that...
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6822291 |
Optimized gate implants for reducing dopant effects during gate etching
A method and apparatus thereof for fabricating an integrated circuit on a laminate having a gate electrode layer over a silicon dioxide layer. Detection of the gate etch endpoint signal is improved...
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6815772 |
Dual gate MOSFET
In a field effect type device having a thin film-like active layer, there is provided a thin film-like semiconductor device including a top side gate electrode on the active layer and a bottom side...
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6815765 |
Semiconductor device with function of modulating gain coefficient and semiconductor integrated circuit including the same
A semiconductor device has a structure in which an impurity diffusion region with an impurity concentration lower than an impurity concentration of a source and a drain is formed between the source...
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6787845 |
Metal source and drain mos transistor
MOS transistor comprising: a channel region ( 120 ) made of a semiconducting material above which there is a grid structure, the grid structure comprising a grid ( 110 ) and insulating spacers (...
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