Patents in Class 257/344

Matches 1 - 50 out of 790

Match	Document	Document Title
1	7619288	Thin film transistor substrate, liquid crystal display device provided with such thin film transistor substrate and method for manufacturing thin film transistor substrate A method for manufacturing a thin film transistor substrate includes a step of forming a plurality of island-like semiconductor films above an insulating transparent substrate; a step of forming a...
2	7615426	PMOS transistor with discontinuous CESL and method of fabrication A transistor having a discontinuous contact etch stop layer comprising: a substrate having a surface, a gate dielectric on said surface of said substrate, a gate electrode on said gate dielectric,...
3	7605038	Semiconductor device and manufacturing method thereof A high voltage semiconductor deice and a manufacturing method thereof are provided. The high voltage semiconductor device comprises: second conductive type drift regions disposed spaced from each...
4	7602019	Drive circuit and drain extended transistor for use therein A transistor comprises a source region of a first conductivity type and electrically communicating with a first semiconductor region. The transistor also comprises a drain region of the first...
5	7592669	Semiconductor device with MISFET that includes embedded insulating film arranged between source/drain regions and channel With the objective of suppressing or preventing a kink effect in the operation of a semiconductor device having a high breakdown voltage field effect transistor, n + type semiconductor regions,...
6	7589373	Semiconductor device The present invention provides a semiconductor device, which includes a substrate and a sensing memory device. The substrate includes a metal-oxide-semiconductor transistor having a gate. The...
7	7586153	Technique for forming recessed strained drain/source regions in NMOS and PMOS transistors By forming a strained semiconductor layer in a PMOS transistor, a corresponding compressively strained channel region may be achieved, while, on the other hand, a corresponding strain in the NMOS...
8	7569856	Semiconductor device and method for manufacturing the same A TFT formed on an insulating substrate source, drain and channel regions, a gate insulating film formed on at least the channel region and a gate electrode formed on the gate insulating film....
9	7560734	Semiconductor device and manufacturing method thereof In a semiconductor device, typically an active matrix display device, the structure of TFTs arranged in the respective circuits are made suitable in accordance with the function of the circuit, and...
10	7554156	Semiconductor device having a field effect transistor using a high dielectric constant gate insulating film and manufacturing method of the same In a method for manufacturing a semiconductor device having an N-channel field effect transistor, the N-channel field effect transistor is formed by a process including the steps of forming a high...
11	7544997	Multi-layer source/drain stressor A method for forming a semiconductor device includes forming a recess in a source region and a recess in a drain region of the semiconductor device. The method further includes forming a first...
12	7541653	Mask ROM devices of semiconductor devices and method of forming the same Disclosed are a mask ROM device and a method of forming the same. This device includes a plurality of cells. At least one among the plurality of cells is programmed. The programmed cell includes a...
13	7538387	Stack SiGe for short channel improvement A semiconductor structure includes a first compound layer including an element, and a first impurity having a first impurity concentration; and a second compound layer including the element and a...
14	7535058	Lateral DMOS structure A lateral DMOS structure includes a light doped p-type region beneath and near the gate at the drain side. The electric field on the surface near the gate is reduced. Thus the electric field near...
15	7531435	Semiconductor device and manufacturing method of the same In consideration of an optimum combination of impurities used for the purpose of forming an extension region ( 13 ) and a pocket region ( 11 ) and further inhibiting impurity diffusion in the...
16	7528445	Wing gate transistor for integrated circuits A system is provided for forming a semiconductor device. Layers of gate dielectric material, gate material, and cap material are formed on a semiconductor substrate. The cap material and a portion...
17	7525165	Light emitting device and manufacturing method thereof The light emitting device according to the present invention is characterized in that a gate electrode comprising a plurality of conductive films is formed, and concentrations of impurity regions...
18	7525150	High voltage double diffused drain MOS transistor with medium operation voltage A method of fabricating a high voltage MOS transistor with a medium operation voltage on a semiconductor wafer. The transistor has a double diffused drain (DDD) and a medium operation voltage such...
19	7514763	Semiconductor device and manufacturing method for the same A semiconductor device includes a first diffusion region including germanium atoms and first impurity atoms, provided on a surface layer of a semiconductor substrate, the first impurity atoms...
20	7514744	Semiconductor device including carrier accumulation layers A semiconductor device includes a gate structure on a channel region of a semiconductor substrate adjacent to a source/drain region therein and a surface insulation layer directly on the...
21	7511340	Semiconductor devices having gate structures and contact pads that are lower than the gate structures Semiconductor devices have gate structures on a semiconductor substrate with first spacers on sidewalls of the respective gate structures. First contact pads are positioned between the gate...
22	7507607	Method of forming a silicide bridged anti-fuse with a tungsten plug metalization process A silicide bridged anti-fuse and a method of forming the anti-fuse are disclosed. The silicide bridged anti-fuse can be formed with a tungsten plug metalization process that does not require any...
23	7495280	MOS devices with corner spacers A MOS device having corner spacers and a method for forming the same are provided. The method includes forming a gate structure overlying a substrate, forming a first dielectric layer over the gate...
24	7492029	Asymmetric field effect transistors (FETs) A semiconductor structure. The structure includes (a) a semiconductor channel region, (b) a semiconductor source block in direct physical contact with the semiconductor channel region; (c) a source...
25	7492006	Semiconductor transistors having surface insulation layers and methods of fabricating such transistors Semiconductor devices having a transistor and methods of fabricating such devices are disclosed. The device may include a gate pattern formed on a substrate, spacers formed on sidewalls of the gate...
26	7473976	Lateral power transistor with self-biasing electrodes A semiconductor power transistor includes a drift region of a first conductivity type and a well region of a second conductivity type in the drift region such that the well region and the drift...
27	7465978	Field effect transistor with a high breakdown voltage and method of manufacturing the same An electric field effect transistor of high breakdown voltage and a method of manufacturing the same are disclosed. A recessed portion is formed at the channel region and is filled by a protective...
28	7456430	Semiconductor device and method for fabricating the same The invention primarily provides gate electrodes and gate wirings permitting large-sized screens for active matrix-type display devices, wherein, in order to achieve this object, the construction...
29	7453120	Semiconductor structure A method for fabricating a semiconductor structure is described. A substrate is provided, having thereon a gate structure and a spacer on the sidewall of the gate structure and having therein an...
30	7446377	Transistors and manufacturing methods thereof Transistors and manufacturing methods thereof are disclosed. An example transistor includes a semiconductor substrate divided into device isolation regions and a device active region. The example...
31	7446375	Quasi-vertical LDMOS device having closed cell layout A low voltage power device includes a plurality of quasi-vertical LDMOS device cells. A conductive trench sinker is formed through the epitaxial layer and adjacent a selected one of the source and...
32	7442991	Display including casing and display unit This invention provides a semiconductor device having high operation performance and high reliability. An LDD region 707 overlapping with a gate wiring is arranged in an n-channel TFT 802 ...
33	7439124	Method of manufacturing a semiconductor device and semiconductor device Method of manufacturing a semiconductor device includes: forming a substrate protection film to cover an n-type FET forming region having a first gate electrode and a p-type FET forming region...
34	7436026	Semiconductor device comprising a superlattice channel vertically stepped above source and drain regions A semiconductor device may include a semiconductor substrate and at least one metal oxide semiconductor field-effect transistor (MOSFET). The at least one MOSFET may include spaced apart source and...
35	7429771	Semiconductor device having halo implanting regions A MIS-type semiconductor device includes a p-type semiconductor substrate, a gate insulating film formed on the semiconductor substrate, a gate electrode formed on the gate insulating film, and...
36	7429769	Recessed channel field effect transistor (FET) device A method for forming a field effect transistor device employs a self-aligned etching of a semiconductor substrate to form a recessed channel region in conjunction with a pair of raised source/drain...
37	RE40486	Self-aligned non-volatile memory cell Disclosed is a self-aligned non-volatile memory cell including a small sidewall spacer electrically coupled and being located next to a main floating gate region. Both the small sidewall spacer and...
38	7405458	Asymmetric field transistors (FETs) A semiconductor structure and a method for forming the same. The structure includes (a) a semiconductor channel region, (b) a semiconductor source block in direct physical contact with the...
39	7405450	Semiconductor devices having high conductivity gate electrodes with conductive line patterns thereon Semiconductor devices that include a semiconductor substrate and a gate line are provided. The gate line is on the semiconductor substrate and includes a gate insulation pattern and a gate...
40	7400018	End of range (EOR) secondary defect engineering using chemical vapor deposition (CVD) substitutional carbon doping A method for incorporating carbon into a wafer at the interstitial a-c silicon interface of the halo doping profile is achieved. A bulk silicon substrate is provided. A carbon-doped silicon layer...
41	7396717	Method of forming a MOS transistor A method of forming a MOS transistor, in which a co-implantation is performed to implant an implant into a source region and a drain region or a halo implanted region to effectively prevent dopants...
42	7388228	Display device and method of manufacturing the same Thin film transistors for a display device each include a semiconductor layer made of polysilicon having a channel region, drain and source regions at both sides of the channel region and doped...
43	7382021	Insulated gate field-effect transistor having III-VI source/drain layer(s) A transistor includes one or more channel taps containing a stack consisting at least in part of a semiconductor an interfacial III-VI layered compound and a conductor. The III-VI compound consists...
44	7365390	Method of fabricating recess transistor in integrated circuit device and recess transistor in integrated circuit device fabricated by the same Provided is a method of fabricating a recess transistor in an integrated circuit device. In the provided method, a device isolation region, which contacts to the sidewall of a gate trench and a...
45	7355245	Structure for reducing overlap capacitance in field effect transistors A field effect transistor (FET) device includes a gate conductor formed over a semiconductor substrate, a source region having a source extension that overlaps and extends under the gate conductor,...
46	7348631	Thin film transistor substrate and manufacturing method for the same A thin film transistor substrate is provided whose structure allows for the formation of (i) a thick gate insulating film, (ii) a high pressure resistance TFT having a LDD region of a GOLD...
47	7339234	Semiconductor device and fabrication process thereof, and application thereof An LDMOS transistor includes a gate insulation film formed on a semiconductor substrate, a gate electrode formed on the gate insulation film, a drain well of a first conductivity type formed in the...
48	7339230	Structure and method for making high density mosfet circuits with different height contact lines Embodiments herein present a structure, method, etc. for making high density MOSFET circuits with different height contact lines. The MOSFET circuits include a contact line, a first gate layer...
49	7329571	Technique for providing multiple stress sources in NMOS and PMOS transistors By combining a plurality of stress inducing mechanisms in each of different types of transistors, a significant performance gain may be obtained, thereby providing enhanced flexibility in adjusting...
50	7326975	Buried channel type transistor having a trench gate and method of manufacturing the same In a method of manufacturing a buried channel type transistor, a trench is formed at a surface portion of a substrate. A first and a second threshold voltage control regions are formed at portions...

Matches 1 - 50 out of 790

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