Patents in Class 257/336

Matches 1 - 50 out of 613

Match	Document	Document Title
1	7615822	Diffused drain transistor A transistor has a source that includes a first impurity region with a first volume and a first surface area on a surface of the transistor. The transistor also has a drain that includes a second...
2	7615426	PMOS transistor with discontinuous CESL and method of fabrication A transistor having a discontinuous contact etch stop layer comprising: a substrate having a surface, a gate dielectric on said surface of said substrate, a gate electrode on said gate dielectric,...
3	7608895	Modular CMOS analog integrated circuit and power technology A family of semiconductor devices is formed in a substrate that contains no epitaxial layer. In one embodiment the family includes a 5V CMOS pair, a 12V CMOS pair, a 5V NPN, a 5V PNP, several forms...
4	7605428	High-voltage depletion mode MOSFET All low-temperature processes are used to fabricate a variety of semiconductor devices in a substrate the does not include an epitaxial layer. The devices include a non-isolated lateral DMOS, a...
5	7602016	Semiconductor apparatus and method of manufacturing the same A semiconductor apparatus is disclosed. The semiconductor apparatus comprises a gate electrode formed on a surface of a semiconductor substrate with a gate insulating film provided therebetween....
6	7598568	Semiconductor apparatus and method of manufacturing the same A semiconductor apparatus is disclosed. The semiconductor apparatus comprises a gate electrode formed on a surface of a semiconductor substrate with a gate insulating film provided therebetween....
7	7579651	Semiconductor device In a semiconductor device of the present invention, a thin gate oxide film is formed on a P-type diffusion layer. On the gate oxide film, a gate electrode is formed. N-type diffusion layers are...
8	7576391	High-voltage lateral trench MOSFET All low-temperature processes are used to fabricate a variety of semiconductor devices in a substrate the does not include an epitaxial layer. The devices include a non-isolated lateral DMOS, a...
9	7573099	Semiconductor device layout and channeling implant process A device structure and method for forming graded junction using a implant process. Embodiments of the invention comprise implanting ions into said silicon substrate to form doped regions adjacent...
10	7569884	LDMOS transistor A lateral DMOS transistor having a uniform distribution of channel impurity concentration includes a drift region of a first conductivity; a body of a second conductivity, the body being disposed...
11	7560772	Semiconductor integrated circuit device and manufacturing method thereof After silicon oxide film ( 9 ) is formed on the surface of a semiconductor substrate ( 1 ), the silicon oxide film ( 9 ) in a region in which a gate insulation film having a small effective...
12	7550803	Vertical double-diffusion metal-oxide-semiconductor transistor device A vertical double-diffusion metal-oxide-semiconductor (VDMOS) transistor device includes a first conductive type semiconductor substrate, a gate structure formed in a first trench in the first...
13	7545003	Defect-free source/drain extensions for MOSFETS having germanium based channel regions A process for forming defect-free source and drain extensions for a MOSFET built on a germanium based channel region deposits a first silicon germanium layer on a semiconductor substrate, deposits...
14	7544996	Methods of fabricating a semiconductor device having a metal gate pattern A method of fabricating a semiconductor device having a metal gate pattern is provided in which capping layers are used to control the relative oxidation rates of portions of the metal gate pattern...
15	7544995	Power converter employing a micromagnetic device A power converter including a power train, a controller and a driver. In one embodiment, the power train includes a switch that conducts for a duty cycle and provides a regulated output...
16	7541653	Mask ROM devices of semiconductor devices and method of forming the same Disclosed are a mask ROM device and a method of forming the same. This device includes a plurality of cells. At least one among the plurality of cells is programmed. The programmed cell includes a...
17	7538387	Stack SiGe for short channel improvement A semiconductor structure includes a first compound layer including an element, and a first impurity having a first impurity concentration; and a second compound layer including the element and a...
18	7535058	Lateral DMOS structure A lateral DMOS structure includes a light doped p-type region beneath and near the gate at the drain side. The electric field on the surface near the gate is reduced. Thus the electric field near...
19	7528442	Semiconductor device and manufacturing method thereof In this invention, the semiconductor device is provided with a gate electrode formed on a gate insulating film in a region sectioned by an element isolation formed on a semiconductor layer of the...
20	7525150	High voltage double diffused drain MOS transistor with medium operation voltage A method of fabricating a high voltage MOS transistor with a medium operation voltage on a semiconductor wafer. The transistor has a double diffused drain (DDD) and a medium operation voltage such...
21	7521758	DMOS device of small dimensions and manufacturing process thereof In a body of semiconductor material, a field region separates a first active area and a second active area. A drain region is formed in the first active area; a body region is formed in the second...
22	7521756	DMOS transistor with optimized periphery structure A lateral DMOS transistor is disclosed that includes a first region of a first conductivity type, which is surrounded on the sides by a second region of a second conductivity type, whereby a...
23	7514758	Dual-oxide transistors for the improvement of reliability and off-state leakage The invention provides a transistor having low leakage currents and methods of fabricating the transistor on a semiconductor substrate. The transistor has a gate and a nonuniform gate oxide under...
24	7511340	Semiconductor devices having gate structures and contact pads that are lower than the gate structures Semiconductor devices have gate structures on a semiconductor substrate with first spacers on sidewalls of the respective gate structures. First contact pads are positioned between the gate...
25	7504692	High-voltage field-effect transistor High-voltage field-effect transistor is provided that includes a drain terminal, a source terminal, a body terminal, and a gate terminal. A gate oxide and a gate electrode, adjacent to the gate...
26	7489007	High-voltage lateral DMOS device All low-temperature processes are used to fabricate a variety of semiconductor devices in a substrate the does not include an epitaxial layer. The devices include a non-isolated lateral DMOS, a...
27	7485925	High voltage metal oxide semiconductor transistor and fabricating method thereof A high voltage MOS transistor including a substrate, a well, a gate insulation layer, a gate, two drift regions, a channel region, a source/drain region and an isolation structure is provided. The...
28	7485923	SOI semiconductor device with improved halo region and manufacturing method of the same A semiconductor device includes a first insulating layer, a semiconductor layer formed on the first insulating layer, a second insulating layer on a part of the semiconductor layer, and a gate...
29	7473976	Lateral power transistor with self-biasing electrodes A semiconductor power transistor includes a drift region of a first conductivity type and a well region of a second conductivity type in the drift region such that the well region and the drift...
30	7473965	Structure of a high breakdown voltage element for use in high power applications The relationship between a distance Ls between a base layer and an n type buffer layer formed on the surface of a drift layer and the thickness t of a semiconductor substrate in contact with the...
31	7473964	Semiconductor device A semiconductor device includes: an insulating layer; a semiconductor fin protruding from the insulating layer, extending in a first direction parallel to a major surface of the insulating layer,...
32	7465978	Field effect transistor with a high breakdown voltage and method of manufacturing the same An electric field effect transistor of high breakdown voltage and a method of manufacturing the same are disclosed. A recessed portion is formed at the channel region and is filled by a protective...
33	7456448	Semiconductor device and method for producing the same A semiconductor device, including a first MIS-type transistor formed in a first region of a semiconductor region, the first region being of a first conductivity type, the first MIS-type transistor...
34	7453120	Semiconductor structure A method for fabricating a semiconductor structure is described. A substrate is provided, having thereon a gate structure and a spacer on the sidewall of the gate structure and having therein an...
35	7446375	Quasi-vertical LDMOS device having closed cell layout A low voltage power device includes a plurality of quasi-vertical LDMOS device cells. A conductive trench sinker is formed through the epitaxial layer and adjacent a selected one of the source and...
36	7439183	Method of manufacturing a semiconductor device, and a semiconductor substrate A method of manufacturing a semiconductor device. In the method, a thin film is formed on an Si substrate having face orientation ( 100 ), that part of the thin film, which lies on an...
37	7436024	Semiconductor device and method of manufacturing the same A lateral MOSFET and a method of forming thereof includes a p-type semiconductor substrate, a first n-type well in the surface portion of the semiconductor substrate, an n + -type drain region in...
38	7427795	Drain-extended MOS transistors and methods for making the same Drain-extended MOS transistors (T 1 , T 2 ) and semiconductor devices ( 102 ) are described, as well as fabrication methods ( 202 ) therefor, in which a p-buried layer ( 130 ) is formed prior to...
39	RE40486	Self-aligned non-volatile memory cell Disclosed is a self-aligned non-volatile memory cell including a small sidewall spacer electrically coupled and being located next to a main floating gate region. Both the small sidewall spacer and...
40	7420247	Power LDMOS transistor A LDMOS transistor comprises a trench formed through the epitaxial layer at least to the top surface of the substrate, the trench having a bottom surface and a sidewall contacting the source region...
41	7417277	Semiconductor integrated circuit and method of manufacturing the same Conventional capacitors constituted of a FET incur degradation in frequency response. A semiconductor integrated circuit includes a semiconductor substrate, an N-type FET, a P-type FET, and...
42	7408234	Semiconductor device and method for manufacturing the same An object of the present invention is to provide a semiconductor device that is able to realize a low on-resistance maintaining a high drain-to-source breakdown voltage, and a method for...
43	7405450	Semiconductor devices having high conductivity gate electrodes with conductive line patterns thereon Semiconductor devices that include a semiconductor substrate and a gate line are provided. The gate line is on the semiconductor substrate and includes a gate insulation pattern and a gate...
44	7405443	Dual gate lateral double-diffused MOSFET (LDMOS) transistor Method and apparatus for providing a lateral double-diffused MOSFET (LDMOS) transistor having a dual gate. The dual gate includes a first gate and a second gate. The first gate includes a first...
45	7391080	LDMOS transistor device employing spacer structure gates An integrated LDMOS transistor comprises a semiconductor substrate ( 11 ), an LDMOS gate region ( 17 ), LDMOS source ( 14 ) and drain ( 15 ) regions, and a channel region ( 13 ) arranged beneath...
46	7381621	Methods of fabricating high voltage MOSFET having doped buried layer A MOSFET includes an insulated gate electrode on a surface of a semiconductor substrate having an impurity region of first conductivity type therein that extends to the surface. Source and drain...
47	7378323	Silicide process utilizing pre-amorphization implant and second spacer A gate electrode is formed on a substrate with a gate insulating layer therebetween. A liner is then deposited on sidewalls of the gate electrode. Source/drain extensions are implanted into the...
48	7372105	Semiconductor device with power supply impurity region A semiconductor device in which by fixing a well at a predetermined potential via a contact within a memory cell, latch-up immunity is improved without accompanying increase in the area of the...
49	7372104	High voltage CMOS devices A transistor suitable for high-voltage applications is provided. The transistor is formed on a substrate having a deep well of a first conductivity type. A first well of the first conductivity type...
50	7372083	Embedded silicon-controlled rectifier (SCR) for HVPMOS ESD protection A high voltage p-type metal oxide semiconductor (HVPMOS) device having electrostatic discharge (ESD) protection functions and a method of forming the same are provided. The HVPMOS includes a PMOS...

Matches 1 - 50 out of 613

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