Matches 1 - 50 out of 411 1 2 3 4 5 6 7 8 9 >
Match Document Document Title
7629643 Independent n-tips for multi-gate transistors  
Independent n-tips for multi-gate transistors are generally described. In one example, an apparatus includes a semiconductor fin, one or more multi-gate pull down (PD) devices coupled with the...
7626220 Semiconductor scheme for reduced circuit area in a simplified process  
An apparatus and method are disclosed for an improved semiconductor interconnect scheme using a simplified process. In an embodiment of the apparatus, a polysilicon shape is formed on a silicon...
7619287 Method of forming a low capacitance semiconductor device and structure therefor  
In one embodiment a transistor is formed with a gate structure having an opening in the gate structure. An insulator is formed on at least sidewalls of the opening and a conductor is formed on the...
7598566 Trench gate field effect devices  
The present invention provides a technique for accumulating minority carriers in the body region, that is, the intermediate region interposed between the top region and the deep region, and thus...
7592653 Stress relaxation for top of transistor gate  
An improved way to apply tensile or compressive stress to one or more transistors on a semiconductor device is described. A portion of the tensile or compressive stress liner may be removed or...
7586147 Butted source contact and well strap  
A butted contact structure forming a source contact electrically connecting a voltage node and a well region and method for forming the same, the butted contact structure including an active region...
7557406 Segmented pillar layout for a high-voltage vertical transistor  
In one embodiment, a transistor fabricated on a semiconductor die includes a first section of transistor segments disposed in a first area of the semiconductor die, and a second section of...
7544994 Semiconductor structure with multiple fins having different channel region heights and method of forming the semiconductor structure  
Disclosed are embodiments of a semiconductor structure with fins that are positioned on the same planar surface of a wafer and that have channel regions with different heights. In one embodiment...
7541653 Mask ROM devices of semiconductor devices and method of forming the same  
Disclosed are a mask ROM device and a method of forming the same. This device includes a plurality of cells. At least one among the plurality of cells is programmed. The programmed cell includes a...
7538387 Stack SiGe for short channel improvement  
A semiconductor structure includes a first compound layer including an element, and a first impurity having a first impurity concentration; and a second compound layer including the element and a...
7538386 MOS transistor having protruded-shape channel and method of fabricating the same  
A MOS transistor that has a protruding portion with a favorable vertical profile and a protruded-shape channel that requires no additional photolithography process, and a method of fabricating the...
7528439 Vertical wrap-around-gate field-effect-transistor for high density, low voltage logic and memory array  
A vertical transistor having a wrap-around-gate and a method of fabricating such a transistor. The wrap-around-gate (WAG) vertical transistors are fabricated by a process in which source, drain and...
7518184 DRAM access transistor  
Self-aligned recessed gate structures and method of formation are disclosed. Field oxide areas for isolation are first formed in a semiconductor substrate. A plurality of columns are defined in an...
7511340 Semiconductor devices having gate structures and contact pads that are lower than the gate structures  
Semiconductor devices have gate structures on a semiconductor substrate with first spacers on sidewalls of the respective gate structures. First contact pads are positioned between the gate...
7511319 Methods and apparatus for a stepped-drift MOSFET  
A power metal-oxide-semiconductor field effect transistor (MOSFET)( 100 ) incorporates a stepped drift region including a shallow trench insulator (STI)( 112 ) partially overlapped by the gate (...
7492006 Semiconductor transistors having surface insulation layers and methods of fabricating such transistors  
Semiconductor devices having a transistor and methods of fabricating such devices are disclosed. The device may include a gate pattern formed on a substrate, spacers formed on sidewalls of the gate...
7485923 SOI semiconductor device with improved halo region and manufacturing method of the same  
A semiconductor device includes a first insulating layer, a semiconductor layer formed on the first insulating layer, a second insulating layer on a part of the semiconductor layer, and a gate...
7485555 Methods for forming a P-type polysilicon layer in a semiconductor device  
A P-type polysilicon layer having a stable and desired resistivity is formed by alternately depositing a plurality of silicon atom layers and a plurality of group IIIA element atom layers on a...
7482210 Method of fabricating semiconductor device having junction isolation insulating layer  
A semiconductor device and a method for fabricating the same are provided. The provided semiconductor device includes a field oxide layer formed in a semiconductor substrate to define an active...
7482671 MOS semiconductor device isolated by a device isolation film  
A MOS semiconductor device isolated by a trench device isolation region includes a p-channel MOS field effect transistor having a source/drain region with a length in the channel direction that is...
7476930 Multi-gate FET with multi-layer channel  
The invention concerns a field-effect transistor with a drain, a source, a channel in electrical contact with the source and the drain, and at least one gate, so as to apply an electric field to...
7473964 Semiconductor device  
A semiconductor device includes: an insulating layer; a semiconductor fin protruding from the insulating layer, extending in a first direction parallel to a major surface of the insulating layer,...
7470952 Power IGBT with increased robustness  
A power IGBT includes a semiconductor body having an emitter zone of a first conduction type and a drift zone of a second conduction type proximate to the emitter zone. The IGBT further includes a...
7470951 Hybrid-FET and its application as SRAM  
A semiconductor device ( 51 ) is provided herein. The semiconductor device comprises (a) a substrate ( 57 ), a semiconductor layer ( 53 ) disposed on said substrate and comprising a horizontal...
7459752 Ultra thin body fully-depleted SOI MOSFETs  
Ultra thin body fully-depleted silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect-transistors (MOSFETs) in which the SOI thickness changes with gate-length variations thereby...
7446375 Quasi-vertical LDMOS device having closed cell layout  
A low voltage power device includes a plurality of quasi-vertical LDMOS device cells. A conductive trench sinker is formed through the epitaxial layer and adjacent a selected one of the source and...
7446373 Semiconductor component and method for producing it  
A semiconductor component and also a method for producing it are disclosed. In one embodiment, the semiconductor component includes a surface region or a modified doping region is provided...
7439578 Semiconductor device  
A semiconductor device includes a trench formed in a surface of a semiconductor substrate. A conductor is embedded in the trench. A conductive layer is arranged adjacent to the trench on the...
7436029 High performance CMOS device structures and method of manufacture  
A semiconductor device structure includes at least two field effect transistors formed on same substrate, the first field effect transistor includes a spacer having a first width, the second field...
7432563 Method for producing a semiconductor component and semiconductor component produced by the same  
A method for producing a gate head which can be precisely scaled and for reducing parasitic capacities, for a semiconductor component comprising an at least approximately T-shaped electrode.
7432541 Metal oxide semiconductor field effect transistor  
A metal oxide semiconductor field effect transistor (MOSFET) is disclosed. The MOSFET includes a semiconductor substrate, a germanium layer formed by implanting germanium (Ge) ions into the...
RE40486 Self-aligned non-volatile memory cell  
Disclosed is a self-aligned non-volatile memory cell including a small sidewall spacer electrically coupled and being located next to a main floating gate region. Both the small sidewall spacer and...
7411248 Vertical unipolar component periphery  
A vertical unipolar component formed in a semiconductor substrate, comprising vertical fingers made of a conductive material surrounded with silicon oxide, portions of the substrate being present...
7408222 Charge trapping device and method of producing the charge trapping device  
A charge-trapping device includes a field effect transistor, which has source and drain regions. The source and drain regions have a dopant concentration profile, which has a gradient each in a...
7405450 Semiconductor devices having high conductivity gate electrodes with conductive line patterns thereon  
Semiconductor devices that include a semiconductor substrate and a gate line are provided. The gate line is on the semiconductor substrate and includes a gate insulation pattern and a gate...
7402856 Non-planar microelectronic device having isolation element to mitigate fringe effects and method to fabricate same  
A non-planar microelectronic device, a method of fabricating the device, and a system including the device. The non-planar microelectronic device comprises: a substrate body including a substrate...
7402859 Field effect semiconductor switch and method for fabricating it  
A field effect semiconductor comprises a semiconductor layer having a surface, a first and a second semiconductor region in the semiconductor layer, which are arranged next to one another at the...
7400523 8T SRAM cell with higher voltage on the read WL  
The present invention provides circuitry for writing to and reading from an SRAM cell core, an SRAM cell, and an SRAM device. In one aspect, the circuitry includes a write circuit coupled to the...
7394117 Fin field effect transistors including epitaxial fins  
A method of forming a fin field effect transistor on a semiconductor substrate includes forming an active region in the substrate, forming an epitaxial layer on the active region, and removing a...
7391078 Non-volatile memory and manufacturing and operating method thereof  
A non-volatile memory is provided. A substrate having a plurality of trenches and a plurality of select gates is provided. The trenches are arranged in parallel and extend in a first direction....
7388258 Sectional field effect devices  
A field effect device is disclosed which has a body formed of a crystalline semiconductor material and has at least one vertically oriented section and at least one horizontally oriented section....
7385246 Depletable cathode low charge storage diode  
An integrated circuit device comprising a diode and a method of making an integrated circuit device comprising a diode are provided. The diode can comprise an island of a first conductivity type, a...
7378714 Semiconductor device and its manufacturing method  
In a complete depletion type SOI transistor, the roll-off of a threshold value is suppressed, independently from the formation of an SOI film to be thinner. As for a semiconductor device ( 1 ), the...
7372099 Semiconductor device and its manufacturing method  
A semiconductor device, which can use silicon-germanium for a source/drain extension of pMOS, form a silicide layer on the source/drain, and realize a high-speed operation, is provided by...
7365390 Method of fabricating recess transistor in integrated circuit device and recess transistor in integrated circuit device fabricated by the same  
Provided is a method of fabricating a recess transistor in an integrated circuit device. In the provided method, a device isolation region, which contacts to the sidewall of a gate trench and a...
7361953 Semiconductor apparatus having a column region with differing impurity concentrations  
A semiconductor apparatus comprises a gate electrode, a gate insulating layer, a drift region of a first conductivity type formed over a semiconductor substrate of the first conductivity type, a...
7352037 Semiconductor device and random access memory having single gate electrode corresponding to a pair of channel regions  
A semiconductor device may include at least one pair of fins on a semiconductor substrate. A channel region may be formed in each fin. The semiconductor device may further include a gate electrode...
7345340 Semiconductor integrated circuit and a semiconductor device  
A semiconductor integrated circuit that has a quick response to changes in source/drain electrode voltage having an LDMOS transistor. The transistor has a second conduction type first well region...
7345337 Semiconductor apparatus having a divided column region  
A semiconductor apparatus comprises a gate electrode, a gate insulating layer, a drift region of a first conductivity type formed over a semiconductor substrate of the first conductivity type, a...
7339230 Structure and method for making high density mosfet circuits with different height contact lines  
Embodiments herein present a structure, method, etc. for making high density MOSFET circuits with different height contact lines. The MOSFET circuits include a contact line, a first gate layer...
Matches 1 - 50 out of 411 1 2 3 4 5 6 7 8 9 >