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7615821 |
Charge trap memory with avalanche generation inducing layer
The present invention discloses a charge trap flash memory cell with multi-doped layers at the active region, a memory array using of the memory cell, and an operating method of the same. The...
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7615438 |
Lanthanide yttrium aluminum oxide dielectric films
Electronic apparatus and methods of forming the electronic apparatus include a lanthanide yttrium aluminum oxide dielectric film on a substrate for use in a variety of electronic systems. The...
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7612403 |
Low power non-volatile memory and gate stack
Non-volatile memory devices and arrays are described that facilitate the use of band-gap engineered gate stacks with asymmetric tunnel barriers in reverse and normal mode floating node memory cells...
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7608886 |
Systems and methods for a high density, compact memory array
A memory array comprising vertical memory cells does not require any isolation layers between cells. Thus, a very compact, high density memory array can be achieved. Each memory cell in the memory...
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7608883 |
Transistor for non volatile memory devices having a carbon nanotube channel and electrically floating quantum dots in its gate dielectric
A transistor is described having a source electrode and a drain electrode. The transistor has at least one semiconducting carbon nanotube that is electrically coupled between the source and drain...
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7608882 |
Split-gate non-volatile memory
A split-gate non-volatile memory cell is described, including a substrate, a charge-trapping layer on the substrate, a split gate on the charge-trapping layer, and a source/drain in the substrate...
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7605422 |
Semiconductor device
A semiconductor device capable of realizing low-voltage drivability and large storage capacity (miniaturization) by achieving large threshold voltage shifts and long retention time while at the...
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7602026 |
Memory cell, semiconductor memory device, and method of manufacturing the same
A memory cell in a semiconductor memory device comprises a variable resistor element configured so that a variable resistor body is sandwiched between a first electrode and a second electrode, and...
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7602012 |
Semiconductor memory devices with charge traps
A memory cell in a semiconductor memory device has a pair of charge traps formed on opposite sides of a control electrode, above variable resistance regions in the semiconductor substrate. Each...
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7602011 |
Semiconductor memory device having charge storage layer and method of manufacturing the same
The semiconductor memory device according to the present invention includes a charge storage layer 26 formed over a semiconductor substrate 10 and including a plurality of particles 16 as...
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7602010 |
Multi-bit multi-level non-volatile memory device and methods of operating and fabricating the same
In a non-volatile memory device allowing multi-bit and/or multi-level operations, and methods of operating and fabricating the same, the non-volatile memory device comprises, in one embodiment: a...
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7602009 |
Erasable non-volatile memory device using hole trapping in high-K dielectrics
A non-volatile memory is described having memory cells with a gate dielectric. The gate dielectric is a multilayer charge trapping dielectric between a control gate and a channel region of a...
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7598575 |
Semiconductor die with reduced RF attenuation
The attenuation of an RF signal on a metal trace in a semiconductor die is substantially reduced by utilizing a number of RF blocking structures that lie on the surface of the substrate directly...
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7592666 |
Semiconductor memory
A semiconductor memory having an electrically writable/erasable memory cell includes a first gate insulating layer made from a compound containing silicon and oxygen; a first charge-storage layer...
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7586159 |
Semiconductor devices having different gate dielectrics and methods for manufacturing the same
A semiconductor device includes first and second transistor devices. The first device includes a first substrate region, a first gate electrode, and a first gate dielectric. The first gate...
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7586145 |
EEPROM flash memory device with jagged edge floating gate
An EEPROM flash memory device having a floating gate electrode enabling a reduced erase voltage and method for forming the same, the floating gate electrode including an outer edge portion...
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7586137 |
Non-volatile memory device and method of fabricating the same
A non-volatile memory device having an asymmetric channel structure is provided. The non-volatile memory device includes a semiconductor substrate, a source region and a drain region which are...
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7585724 |
FLASH memory device and method of manufacture
A FLASH memory device is provided including a plurality of first floating gates formed over a gate oxide layer formed over a substrate, the first group of floating gates being formed using a...
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7579647 |
Non-volatile semiconductor memory device having memory cell array suitable for high density and high integration
First and second semiconductor regions are formed apart from each other on a semiconductor body. A stacked gate is formed on the semiconductor body between the first and second semiconductor...
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7579242 |
High performance multi-level non-volatile memory device
Non-volatile memory devices and arrays are described that utilize band engineered gate-stacks and multiple charge trapping layers allowing a multiple trapping site gate-insulator stack memory cell...
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7576386 |
Non-volatile memory semiconductor device having an oxide-nitride-oxide (ONO) top dielectric layer
A non-volatile memory (NVM) cell includes a silicon substrate having a main surface, a source region in a portion of the silicon substrate, a drain region in a portion of the silicon substrate, and...
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7576385 |
Method for improving erase saturation in non-volatile memory devices and devices obtained thereof
Non-volatile memory devices are disclosed. In a first example non-volatile memory device, programming and erasing of the memory device is performed through the same insulating barrier without the...
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7573094 |
Random number generating element
Random number generating element comprises source region, drain region, semiconductor channel provided between source region and drain region and having portion of width W and length L, width W and...
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7573091 |
Semiconductor device and method of manufacturing the same
The present invention relates to a semiconductor device that includes a semiconductor substrate ( 10 ) having source/drain diffusion regions ( 14 ) formed therein and control gates ( 20 ) formed...
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7569882 |
Non-volatile multibit memory cell and method of manufacturing thereof
One embodiment of the invention comprises a first semiconductor structure in electrical contact with a first contact region, a second semiconductor structure in electrical contact with a second...
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7564094 |
Non-volatile memory devices and methods of manufacturing the same
Non-volatile memory devices include a tunnel insulating layer on a channel region of a substrate, a charge-trapping layer pattern on the tunnel insulating layer and a first blocking layer pattern...
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7560394 |
Nanodots formed on silicon oxide and method of manufacturing the same
A nanodot material including nanodots formed on silicon oxide, and a method of manufacturing the same, is provided. The nanodot material includes a substrate, a silicon oxide layer, and a plurality...
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7557404 |
Nonvolatile memory devices and methods of forming the same
In a nonvolatile memory device and a method of fabricating the same, the nonvolatile memory device may include a semiconductor substrate having a device isolation layer defining an active region, a...
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7550802 |
Nonvolatile semiconductor memory device and manufacturing process of the same
A nonvolatile semiconductor memory device which can shorten data writing and erasing time, significantly improve the endurance characteristic and be activated with low power consumption includes an...
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7550800 |
Method and apparatus transporting charges in semiconductor device and semiconductor memory device
A conductor-filter system, a conductor-insulator system, and a charge-injection system are provided. The conductor-filter system provides band-pass filtering function, charge-filtering function,...
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7547942 |
Nonvolatile memory devices and methods of fabricating the same
A nonvolatile memory device includes a semiconductor substrate including a cell region and a peripheral circuit region, a cell gate on the cell region, and a peripheral circuit gate on the...
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7547601 |
Low power electrically alterable nonvolatile memory cells and arrays
A method of providing a memory cell includes providing a body of a semiconductor material having a first conductivity type, arranging a filter of a conductor-filter system in contact with a first...
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7544993 |
Semiconductor storage device and portable electronic equipment
A semiconductor storage device has memory function bodies ( 261, 262 ) having a function to retain electric charges, which are formed on opposite sides of a single gate electrode ( 217 ) provided...
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7541639 |
Memory device and method of fabricating the same
A memory device and a method of fabricating the same. The memory device includes a substrate and a first gate electrode overlying the substrate. Overlying a top surface of the first gate electrode,...
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7541242 |
NROM memory cell, memory array, related devices and methods
An array of memory cells configured to store at least one bit per one F 2 includes substantially vertical structures providing an electronic memory function spaced apart a distance equal to one...
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7538385 |
Memory device and fabrication method thereof
A method of forming a memory device, where a first insulator layer and a charge trapping layer may be formed on a substrate, and at least one of the first insulator layer and charge trapping layer...
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7538384 |
Non-volatile memory array structure
A memory array having a smaller active area pitch is provided. In accordance with embodiments of the present invention, active regions are formed in a substrate and transistors are formed between...
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7535060 |
Charge storage structure formation in transistor with vertical channel region
A semiconductor device includes a semiconductor structure having a first sidewall. A vertical channel region is formed in the semiconductor structure along the first sidewall between a first...
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7535054 |
Trench corner effect bidirectional flash memory cell
A non-volatile memory cell structure that is capable of holding two data bits. The structure includes a trench in a substrate with two sides of the trench being lined with a trapping material. The...
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7535051 |
Memory device and method of manufacturing the same
A example embodiment may provide a memory device that may include an active pattern on a semiconductor substrate, a first charge trapping layer pattern on the active pattern, a first gate electrode...
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7531870 |
SONOS memory device having nano-sized trap elements
A silicon-oxide-nitride-oxide-silicon (SONOS) memory device includes a memory type transistor including a gate with a SONOS structure on a semiconductor substrate. The gate is formed by...
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7531869 |
Lanthanum aluminum oxynitride dielectric films
Electronic apparatus and methods of forming the electronic apparatus include a lanthanum aluminum oxynitride film on a substrate for use in a variety of electronic systems. The lanthanum aluminum...
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7531868 |
Non-volatile semiconductor memory device
In a non-volatile semiconductor memory device typically of a MONOS type storing data by trapping charge in a multilayer film composed of a plurality of insulating films, which includes: source and...
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7531867 |
Method for forming an integrated memory device and memory device
The invention in one of the embodiments refers to a method for forming an integrated memory device, the method including a forming a plurality of bitlines, wherein forming the plurality of bitlines...
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7531866 |
Non-volatile semiconductor memory device, drive method and manufacturing method
A MONOS type non-volatile semiconductor memory device has a memory cell array. The memory cell array includes a plurality of pairs of bit line and control line. These bit line-control line pairs...
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7531411 |
Apparatus and method for a non-volatile memory structure comprising a multi-layer silicon-rich, silicon nitride trapping layer
A non-volatile memory structure comprises a trapping layer that includes a plurality of silicon-rich, silicon nitride layers. Each of the plurality of silicon-rich, silicon nitride layers can trap...
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7525149 |
Combined volatile and non-volatile memory device with graded composition insulator stack
A memory device is fabricated with a graded composition tunnel insulator layer. This layer is formed over a substrate with a drain and a source region. The tunnel insulator is comprised of a graded...
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7521751 |
Nonvolatile memory device
To provide a nonvolatile memory device suppressing a reduction of a data retention characteristic even if charges injected and stored into a local area of a nitride film is redistributed to achieve...
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7518181 |
Semiconductor memory device and methods of manufacturing and operating the same
A semiconductor memory device and methods of manufacturing and operating the same may be provided. The semiconductor memory device may include a substrate, at least a pair of fins protruding from...
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7514744 |
Semiconductor device including carrier accumulation layers
A semiconductor device includes a gate structure on a channel region of a semiconductor substrate adjacent to a source/drain region therein and a surface insulation layer directly on the...
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