Match Document Document Title
7172937 Method of manufacturing a non-volatile memory cell  
The present invention relates to a method of manufacturing a non-volatile memory cell. The method comprises forming an ONO stack and a mask formed on the ONO stack, providing a first etching...
7170129 Non-volatile memory, fabrication method thereof and operation method thereof  
A method of fabrication a non-volatile memory is provided. A stacked structure is formed on a substrate, the stacked structure including a gate dielectric layer and a control gate. Then, a first...
7164178 Semiconductor device and method for manufacturing the same  
A semiconductor device includes a gate insulating film formed on a semiconductor substrate, and a gate electrode formed on the gate insulating film. Nitrogen is introduced into the gate insulating...
7161207 Computer system, memory structure and structure for providing storage of data  
A computer system comprising: (A) a CPU; (B) a memory arrangement comprising: (i) a side-wall memory array including a plurality of side-wall memory transistors; (ii) a charge pump; (iii) a...
7157773 Nonvolatile semiconductor memory device  
A memory cell of a nonvolatile semiconductor memory device is formed on a silicon layer formed on a silicon substrate through an ONO film. The memory cell has a source region and a drain region...
7158420 Inversion bit line, charge trapping non-volatile memory and method of operating same  
A charge trapping memory device in which a field induced inversion layer is used to replace the source and drain implants. The memory cell are adapted to store two bits, one on the left side and...
7157771 Vertical device 4F2 EEPROM memory  
EEPROM memory devices and arrays are described that facilitate the use of vertical floating gate memory cells and select gates in NOR or NAND high density memory architectures. Memory embodiments...
7154143 Non-volatile memory devices and methods of fabricating the same  
Non-volatile memory devices and methods of fabricating the same are disclosed. A disclosed non-volatile memory device includes: a tunnel oxide layer formed on a semiconductor substrate and having...
7153746 Capacitors, methods of forming capacitors, and methods of forming capacitor dielectric layers  
A method of forming a capacitor includes forming first and second capacitor electrodes over a substrate. A capacitor dielectric region is formed intermediate the first and second capacitor...
7151293 SONOS memory with inversion bit-lines  
A SONOS memory cell, formed within a semiconductor substrate, includes a bottom dielectric disposed on the semiconductor substrate, a charge trapping material disposed on the bottom dielectric, and...
7144777 Non-volatile memory and manufacturing method thereof  
A non-volatile memory comprising a substrate, a stacked gate structure, a conductive spacer, an oxide/nitride/oxide layer, buried doping regions, a control gate and an insulating layer. The stacked...
7141838 Buried word line memory integrated circuit system  
An integrated circuit system includes providing a semiconductor substrate and forming buried word lines in the semiconductor substrate with the buried word lines including vertical charge-trapping...
7141848 Memory device and dissimilar capacitors formed on same substrate  
A semiconductor device has a split-gate type memory transistor, a capacitor element, and another capacitor element formed on the same chip, in which the capacitor values of the capacitor element...
7141850 Gated semiconductor assemblies and methods of forming gated semiconductor assemblies  
In one aspect, the invention includes a method of forming a gated semiconductor assembly, comprising: a) forming a silicon nitride layer over and against a floating gate; and b) forming a control...
7141849 Semiconductor storage device having a function to convert changes of an electric charge amount to a current amount  
In a semiconductor storage device, a gate insulating film and a gate electrode are laid on a first conductivity type semiconductor substrate, and charge holding portions are formed on both sides of...
7138681 High density stepped, non-planar nitride read only memory  
A non-planar, stepped NROM array is comprised of cells formed in trenches and on pillars that are etched into a substrate. Each cell has a plurality of charge storage regions in its nitride layer...
7136301 Semiconductor memory device and driving method thereof  
First active regions and second active regions intersecting the first active regions at a right angle are defined on the surface of a semiconductor substrate, and diffusion regions are formed in...
7129539 Semiconductor storage device and manufacturing method therefor, semiconductor device, portable electronic equipment and IC card  
A semiconductor storage device includes a field effect transistor which has a gate insulator, a gate electrode and a pair of source/drain diffusion regions on a semiconductor substrate. The device...
7126172 Integration of multiple gate dielectrics by surface protection  
A multiple gate oxidation process is provided. The process comprises the steps of (a) providing a silicon substrate ( 203 ) having a sacrificial oxide layer ( 207 ) thereon; (b) depositing and...
7126185 Charge trap insulator memory device  
A charge trap insulator memory device comprises a plurality of memory cells connected serially, a first switching device, and a second switching device. In the plurality of memory cells, data...
7119394 Nonvolatile memory device and method for fabricating the same  
A structure of non-volatile memory has a plurality of buried bit lines in a substrate, extending along a first direction. Selection gate structure lines are located between the buried bit lines. A...
7119396 NROM device  
A method of forming a memory device (and the resulting device) by forming an electron trapping dielectric material over a substrate, forming conductive material over the dielectric material,...
7119393 Transistor having fully-depleted junctions to reduce capacitance and increase radiation immunity in an integrated circuit  
A floating-gate transistor for an integrated circuit is formed on a p-type substrate. An n-type region is disposed over the p-type substrate. A p-type region is disposed over the n-type region....
7115943 Nonvolatile semiconductor memory device and manufacturing method thereof  
A MONOS nonvolatile memory of a split gate structure, wherein writing and erasing are performed by hot electrons and hot holes respectively, is prone to cause electrons not to be erased and to...
7115939 Floating gate transistor with horizontal gate layers stacked next to vertical body  
Vertical body transistors with adjacent horizontal gate layers are used to form a memory array in a high density flash electrically erasable and programmable read only memory (EEPROM) or a logic...
7106630 Semiconductor storage device, mobile electronic apparatus, method for controlling erase operation, and method for controlling program operation  
A semiconductor storage device is provided, which comprises a memory array comprising a plurality of memory elements, a section for performing an erase or program operation with respect to the...
7105889 Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high k dielectrics  
A method of forming a CMOS structure, and the device produced therefrom, having improved threshold voltage and flatband voltage stability. The inventive method includes the steps of providing a...
7105888 Nonvolatile semiconductor memory device and method of manufacturing same  
A first insulating layer, a second insulating layer, a third insulating layer, a first conductive layer, and an oxidation inhibitor film are successively deposited on a surface of a semiconductor...
7102192 Semiconductor nonvolatile memory cell array  
A semiconductor nonvolatile memory cell array includes a plurality of semiconductor nonvolatile memory cells. Each memory cell has a control electrode ( 30 ); a pair of impurity diffusion regions (...
7098505 Memory device with multiple memory layers of local charge storage  
A multiple memory layer device has a plurality of stacked memory layers. Each of the memory layers has: a charge generating layer of p-type semiconductor material with a plurality of n-type...
7095078 Charge trapping memory cell  
In a charge trapping memory cell, programming occurs by trapping hot electrons from the channel region in a storage layer. The erasure occurs by Fowler-Nordheim tunneling of the electrons through...
7095077 Semiconductor memory having two charge storage sections  
A semiconductor memory includes: a p-type semiconductor (p-type semiconductor film on a substrate, a p-type well region in a semiconductor substrate, or an insulator); a gate insulating film formed...
7091566 Dual gate FinFet  
A field effect transistor (FET), integrated circuit (IC) chip including the FETs and a method of forming the FETS. Each FET includes a device gate along one side of a semiconductor (e.g., silicon)...
7091551 Four-bit FinFET NVRAM memory device  
A four-bit FinFET memory cell, method of fabricating four-bit FinFET memory cell and an NVRAM formed of four-bit FINFET memory cells. The four-bit memory cell including two charge storage regions...
7091130 Method of forming a nanocluster charge storage device  
A plurality of memory cell devices is formed by using an intermediate dual polysilicon-nitride control electrode stack overlying nanoclusters. The stack includes a first-formed polysilicon-nitride...
7087955 Semiconductor device and a method of manufacturing the same  
A semiconductor device has a nonvolatile memory employing a split-gate type memory cell structure, using a nitride film as a charge storage layer. An n-type semiconductor region is formed in a main...
7084454 Nonvolatile integrated semiconductor memory  
A nonvolatile integrated semiconductor memory has an arrangement of layers with a tunnel barrier layer and a charge-storing level. The charge-storing level has a dielectric material which stores...
7084030 Method of forming a non-volatile memory device having floating trap type memory cell  
A non-volatile memory device includes a cell region having a memory gate pattern with a charge storage layer, and a peripheral region having a high-voltage-type gate pattern, a low-voltage-type...
7081651 Non-volatile memory device with protruding charge storage layer and method of fabricating the same  
A non-volatile memory device includes a tunnel oxide layer, a charge storage layer, a blocking insulating layer, and a gate electrode that are sequentially stacked, as well as an impurity diffusion...
7081381 Flash memory cell and the method of making separate sidewall oxidation  
A process and product for making integrated circuits with dense logic and/or linear regions and dense memory regions is disclosed. On a common substrate, a dual hard mask process separately forms...
7075146 4F2 EEPROM NROM memory arrays with vertical devices  
NROM EEPROM memory devices and arrays are described that facilitate the use of vertical NROM memory cells and select gates in NOR or NAND high density memory architectures. Memory embodiments of...
7075144 Non-volatile memory device  
The present invention includes a method of fabricating a non-volatile memory device having two transistors for two-bit operations to improve electron trapping efficiency and integration degree of...
7075143 Apparatus and method for high sensitivity read operation  
A nonvolatile semiconductor memory device enabling a high sensitivity read operation by a low voltage, provided with a gate insulating film comprised of a bottom insulating film, a charge storing...
7071512 Non-volatile semiconductor memory device  
A non-volatile semiconductor memory device includes a substrate, a first insulating film formed on the substrate, a second insulating film formed on the first insulating film, a plurality of...
7067369 Flash memory cell transistor and method for fabricating the same  
A flash memory cell transistor and a method for fabricating the same compensates a work function difference of a pMOS and a nMOS with a triple gate insualting film by using electron density trapped...
7064382 Nonvolatile memory and nonvolatile memory manufacturing method  
A nonvolatile memory device includes source and drain regions formed in a semiconductor substrate, and an insulating film formed on a channel region between the source region and the drain region...
7064383 Non-volatile memory device  
A non-volatile memory including a semiconductor substrate, and a SONOS electrode on the semiconductor substrate, where the SONOS electrode has a channel area defined underneath. The memory also...
7061046 Non-volatile semiconductor memory device  
Bitline conductor tracks are arranged parallel to one another and electrically insulated from a substrate provided with a basic doping. A memory layer sequence, especially a charge-trapping layer...
7061043 Non-volatile semiconductor memory device and method of manufacturing the same  
A non-volatile semiconductor memory device with a small layout area, having a memory cell array including a plurality of memory cells arranged in a column direction and a row direction, wherein:...
7057234 Scalable nano-transistor and memory using back-side trapping  
According to an aspect of the invention, a device structure is provided where charging and discharging occur in a trapping region formed by a stack of films that is placed on the back of a thin...