Matches 101 - 150 out of 715 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >
Match Document Document Title
7439576 Ultra-thin body vertical tunneling transistor  
A vertical tunneling, ultra-thin body transistor is formed on a substrate out of a vertical oxide pillar having active regions of opposing conductivity on opposite ends of the pillar. In one...
7433237 Memory utilizing oxide nanolaminates  
One transistor embodiment includes a first source/drain region, a second source/drain region, and a channel region therebetween. A gate is separated from the channel region by a gate insulator. The...
7432547 Non-volatile memory device with improved data retention and method therefor  
A semiconductor device ( 30 ) comprises an underlying insulating layer ( 34 ), an overlying insulating layer ( 42 ) and a charge storage layer ( 36 ) between the insulating layers ( 34, 42 ). The...
7429767 High performance multi-level non-volatile memory device  
Non-volatile memory devices and arrays are described that utilize band engineered gate-stacks and multiple charge trapping layers allowing a multiple trapping site gate-insulator stack memory cell...
7423326 Integrated circuits with composite gate dielectric  
CMOS gate dielectric made of high-k metal silicates by passivating a silicon surface with nitrogen compounds prior to high-k dielectric deposition. Optionally, a silicon dioxide monolayer may be...
7420256 Nonvolatile semiconductor memory device having a gate stack and method of manufacturing the same  
A nonvolatile semiconductor memory device includes a semiconductor substrate having a source region and a drain region, and a gate stack formed on the semiconductor substrate between and in contact...
7414280 Systems and methods for memory structure comprising embedded flash memory  
A memory structure that combines multiple embedded flash memory. The flash memory can be used, e.g., as air replacement cells or back up memory, or additional memory cells. In one aspect, the flash...
7410857 Semiconductor memory device and manufacturing method thereof  
After an ONO film in which a silicon nitride film ( 22 ) formed by a plasma nitriding method using a plasma processor having a radial line slot antenna is sandwiched by silicon oxide films ( 21 ),...
7411836 Method of operating non-volatile memory  
A method of operating a non-volatile memory comprising a substrate, a gate, a charge-trapping layer, a source region and a drain region is provided. The charge-trapping layer close to the source...
7411247 Twin insulator charge storage device operation and its fabrication method  
The invention proposes am improved twin MONOS memory device and its fabrication. The ONO layer is self-aligned to the control gate horizontally. The vertical insulator between the control gate and...
7408236 Method for non-damaging charge injection and system thereof  
A method and system for injecting charge includes providing a first material on a second material and injecting charge into the first material to trap charge at an interface between the first and...
7405441 Semiconductor memory  
A non-volatile semiconductor memory ( 30 ) comprising a semiconductor substrate ( 1 ) and a plurality of memory cells ( 19 ) and methods for manufacturing such a memory is provided. Each memory...
7405974 Semiconductor memory device, page buffer resource assigning method and circuit therefor, computer system and mobile electronic device  
A semiconductor memory device includes a page buffer circuit and an arrangement of memory elements each including: a gate electrode provided on a semiconductor layer with an intervening gate...
7402862 Multi-bit non-volatile memory device having a dual-gate and method of manufacturing the same, and method of multi-bit cell operation  
The present invention relates to a multi-bit non-volatile memory device having a dual gate employing local charge trap and method of manufacturing the same, and an operating method for a multi-bit...
7400012 Scalable Flash/NV structures and devices with extended endurance  
Devices and methods are provided with respect to a gate stack for a nonvolatile structure. According to one aspect, a gate stack is provided. One embodiment of the gate stack includes a tunnel...
7394127 Non-volatile memory device having a charge storage oxide layer and operation thereof  
A non-volatile memory device includes a pair of source/drain regions disposed in a semiconductor substrate, having a channel region between them. A charge storage oxide layer is disposed on the...
7394128 Semiconductor memory device with channel regions along sidewalls of fins  
A semiconductor memory ( 26 ) having a plurality of memory cells ( 25 ), the semiconductor memory ( 26 ) having a substrate ( 1 ), at least one wordline ( 2 ) and first ( 3 ) and second lines ( 4...
7391075 Non-volatile semiconductor memory device with alternative metal gate material  
A non-volatile semiconductor memory device comprises a substrate including a source region, a drain region and a channel region provided between the source region and the drain region with a gate...
7391078 Non-volatile memory and manufacturing and operating method thereof  
A non-volatile memory is provided. A substrate having a plurality of trenches and a plurality of select gates is provided. The trenches are arranged in parallel and extend in a first direction....
7388253 Nonvolatile memory  
Source diffusion layers and drain diffusion layers are alternately formed in lateral device forming regions separated by device isolation regions. Control gate electrodes are formed on both sides...
7388246 Lanthanide doped TiOx dielectric films  
A dielectric film containing lanthanide doped TiO x and a method of fabricating such a dielectric film produce a reliable dielectric layer having an equivalent oxide thickness thinner than...
7382015 Semiconductor device including an element isolation portion having a recess  
A non-volatile semiconductor memory device, which is intended to prevent data destruction by movements of electric charges between floating gates and thereby improve the reliability, includes...
7375394 Fringing field induced localized charge trapping memory  
The present invention includes a semiconductor layer formed over an insulation layer and a substrate. Doped regions are formed in a portion of the semiconductor layer. A gate dielectric and a gate...
7371642 Multi-state NROM device  
An array of NROM flash memory cells configured to store at least two bits per four F 2 . Split vertical channels are generated along each side of adjacent pillars. A single control gate is formed...
7372095 Integrated semiconductor circuit comprising a transistor and a strip conductor  
An integrated semiconductor circuit includes a transistor and a strip conductor ( 11 ). The transistor includes a first ( 1 ) and a second source/drain region ( 2 ) and a gate electrode. The strip...
7372112 Semiconductor device, process for producing the same and process for producing metal compound thin film  
A high dielectric gate insulating film having the structure that a high-nitrogen layer, a low-nitrogen layer, and a high-nitrogen layer are layered in this order from a silicon-substrate side.
7368782 Dual-bit non-volatile memory cell and method of making the same  
A non-volatile memory cell having a local silicon nitride layer to control dispersion of hot electrons is disclosed. The dual-bit non-volatile memory cell has a stack of layers including silicon on...
7365389 Memory cell having enhanced high-K dielectric  
A semiconductor memory device may include an intergate dielectric layer of a high-K, high barrier height dielectric material interposed between a charge storage layer and a control gate. With this...
7365388 Embedded trap direct tunnel non-volatile memory  
The cell comprises a substrate having a drain region and a source region. An oxynitride layer is formed over the substrate. An embedded trap layer is formed over the oxynitride layer. An injector...
7361554 Multi-bit non-volatile memory device, method of operating the same, and method of manufacturing the multi-bit non-volatile memory device  
Disclosed are a multi-bit non-volatile memory device, a method of operating the same, and a method of manufacturing the multi-bit non-volatile memory device. A unit cell of the multi-bit...
7358562 NROM flash memory devices on ultrathin silicon  
An NROM flash memory cell is implemented in an ultra-thin silicon-on-insulator structure. In a planar device, the channel between the source/drain areas is normally fully depleted. An oxide layer...
7358559 Bi-directional read/program non-volatile floating gate memory array, and method of formation  
A bi-directional read/program non-volatile memory cell and array is capable of achieving high density. Each memory cell has two spaced floating gates for storage of charges thereon. The cell has...
7352024 Semiconductor storage device and semiconductor integrated circuit  
There is provided a semiconductor storage device capable of high integration. On a top surface of a semiconductor substrate, a plurality of device isolation regions ( 16 ) each extending and...
7352033 Twin MONOS array for high speed application  
The invention provides a metal bit structure of Twin MONOS memory cell with large channel width and its operational method for high-speed applications using a metal bit array.
7348282 Forming method of gate insulating layer and nitrogen density measuring method thereof  
A method of forming a gate insulating layer and nitrogen density measuring method thereof, by which a transistor having enhanced electric characteristics can be fabricated without employing...
7345336 Semiconductor memory device having self-aligned charge trapping layer  
A semiconductor memory device having a self-aligned charge trapping layer and a method of manufacturing the same in which a consistent length of an ONO layer is ensured. Here, an insulating stacked...
7345335 Semiconductor integrated circuit, booster circuitry, and non-volatile semiconductor memory device  
In a capacitor-containing semiconductor integrated circuit, a portion in which a plurality of capacitors are serially connected together is arranged so that at least part of the capacitors is...
7342277 Transistor for non volatile memory devices having a carbon nanotube channel and electrically floating quantum dots in its gate dielectric  
A transistor is described having a source electrode and a drain electrode. The transistor has at least one semiconducting carbon nanotube that is electrically coupled between the source and drain...
7342280 Non-volatile memory and method of fabricating the same  
An electrically erasable programmable read-only memory (EEPROM) comprises trench isolation regions whose upper surfaces are recessed compared with an upper surface of the semiconductor substrate,...
7339233 Nonvolatile semiconductor memory device and manufacturing method thereof  
A nonvolatile semiconductor memory device includes nonvolatile semiconductor memory elements and a first conductor. Each nonvolatile semiconductor memory element includes a gate insulating film...
7335939 Semiconductor memory device and method of production  
An array of charge-trapping memory cells and pluralities of parallel wordlines and parallel bitlines running transversely to the wordlines are arranged on a substrate surface. Gate electrodes are...
7335943 Ultrascalable vertical MOS transistor with planar contacts  
A doped silicon block or island, formed above a drain electrode in substrate of a die or chip, has a height corresponding to the desired length of a channel. A source electrode is formed above the...
7335941 Uniform channel programmable erasable flash EEPROM  
A new method to form a split gate for a flash device in the manufacture of an integrated circuit device is achieved. The method comprises providing a substrate. A film is deposited overlying the...
7332768 Non-volatile memory devices  
Non-volatile memory devices are disclosed. In a first example non-volatile memory device, programming and erasing of the memory device is performed through the same insulating barrier without the...
7332773 Vertical device 4F2 EEPROM memory  
EEPROM memory devices and arrays are described that facilitate the use of vertical floating gate memory cells and select gates in NOR or NAND high density memory architectures. Memory embodiments...
7329919 Non-volatile memory device and method of manufacturing the same  
A non-volatile memory device and a method of manufacturing the same where the non-volatile memory device is easily applicable to higher integration of a semiconductor device by reducing a cell size...
7326992 Nonvolatile memory cell with multiple floating gates formed after the select gate  
In a memory cell ( 110 ) having multiple floating gates ( 160 ), the select gate ( 140 ) is formed before the floating gates. In some embodiments, the memory cell also has control gates ( 170 )...
7326980 Devices with HfSiON dielectric films which are Hf-O rich  
A dielectric film containing atomic layer deposited HfSiON and a method of fabricating such a dielectric film produce a reliable dielectric layer having an equivalent oxide thickness thinner than...
7323744 Semiconductor device and fabrication method therefor  
A semiconductor device includes an ONO film ( 17 ) formed on a semiconductor substrate ( 15 ), a first gate ( 14 ), the first gate ( 14 ) formed on the ONO film ( 17 ), a source ( 10 ) and a drain...
7317222 Memory cell using a dielectric having non-uniform thickness  
A memory cell is programmed by injecting charge into a charge storage layer of the memory cell. A desired programmed charge results in the charge storage layer over an edge portion of a channel...
Matches 101 - 150 out of 715 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >