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6372581 Process for nitriding the gate oxide layer of a semiconductor device and device obtained  
A method of nitriding the gate oxide layer of a semiconductor device includes the chemical growth on a silicon substrate of a native silicon oxide layer ≦1 nm thick; treating said substrate...
6335554 Semiconductor Memory  
The present invention discloses the new structure with regard to a nonvolatile semiconductor memory which can store therein an information corresponding to a plurality of bits. The nonvolatile...
6313503 MNOS-type memory using single electron transistor and driving method thereof  
A metal nitride oxide semiconductor (MNOS) type memory using a threshold voltage variation (ΔVth) due to charging of a single electron when the width of a channel of the memory is set to be...
6313496 Capacitor and method of forming a capacitor  
The invention comprises capacitors and methods of forming capacitors. In one implementation, a method of forming a capacitor includes forming a first capacitor electrode. An Si 3 N 4 comprising...
6291866 Zirconium and/or hafnium oxynitride gate dielectric  
A field effect semiconductor device comprising a high permittivity zirconium (or hafnium) oxynitride gate dielectric and a method of forming the same are disclosed herein. The device comprises a...
6291867 Zirconium and/or hafnium silicon-oxynitride gate dielectric  
A field effect semiconductor device comprising a high permittivity zirconium (or hafnium) silicon-oxynitride gate dielectric and a method of forming the same are disclosed herein. The device...
6279602 Valve with improved piston with elastomer O-ring  
A piston type valve includes a piston moving in a cylindrical seat. The piston is fastened to an operating rod extending along the axis of the cylindrical seat. The perimeter of the piston carries...
6281541 Metal-oxide-metal capacitor for analog devices  
A method for fabricating a metal-oxide-metal capacitor is described. A first insulating layer is provided overlying a semiconductor substrate. A conducting line is formed on the surface of said...
6274902 Nonvolatile floating gate memory with improved interpoly dielectric  
A floating memory device utilizing a composite oxide/oxynitride or oxide/oxynitride/oxide interpoly dielectric.
6274903 Memory device having a storage region is constructed with a plurality of dispersed particulates  
A memory device, a manufacturing method thereof, and an integrated circuit thereof are provided for storing information over a long period of time even if the memory device is manufactured at low...
6259131 Poly tip and self aligned source for split-gate flash cell  
A novel method of forming a polysilicon gate tip (poly tip) for enhanced F-N tunneling in split-gate flash memory cells is disclosed. The poly tip is further enhanced by forming a notched nitride...
6252270 Increased cycle specification for floating-gate and method of manufacture thereof  
A programmable semiconductor device and a method of manufacturing the same. The device includes: (1) a substrate composed at least in part of silicon, (2) a dielectric layer located over the...
6249022 Trench flash memory with nitride spacers for electron trapping  
A method for fabricating a flash memory cell is described. A conformal ultra thin oxide layer is formed on a substrate having a trench formed therein, followed by forming silicon nitride spacers on...
6238977 Method for fabricating a nonvolatile memory including implanting the source region, forming the first spacers, implanting the drain regions, forming the second spacers, and forming a source line on the source and second spacers  
A method for fabricating in a non-volatile memory is provided. The method includes providing a substrate having a memory region. A stacked gate structure is formed on the substrate at the memory...
6229176 Split gate flash with step poly to improve program speed  
A method is provided for forming a split-gate flash memory cell having a step poly supporting an interpoly oxide of varying thickness for the purposes of improving the over-all performance of the...
6221708 Field effect transistor assemblies, integrated circuitry, and methods of forming field effect transistors and integrated circuitry  
The invention encompasses integrated circuitry which includes a semiconductive material substrate and a first field effect transistor supported by the substrate. The first field effect transistor...
6218700 Remanent memory device  
A remanent, electrically programmable and erasable, memory device comprises of a MOS type transistor whose gate insulator contains charged mobile species is disclosed. The gate insulator is...
6211548 Metal-gate non-volatile memory cell  
In producing a metal-gate non-volatile memory cell, a layer of oxide is formed over a silicon substrate. A floating gate is then formed over the oxide. Source and drain regions are then formed in...
6207999 Double coding mask read only memory (mask ROM) for minimizing band-to-band leakage  
The present invention provides a mask ROM memory to minimize band-to-band leakage. The substrate includes a normal NMOS device region and a NMOS cell region for coding. An isolation region is...
6191450 Semiconductor device with field shield electrode  
An FS upper nitride film (15) is formed on the upper surface of an FS electrode (5). Therefore, the upper surface of the FS electrode (5) is not exposed even when an FS upper oxide film (41) is...
6166958 Semiconductor memory device, method for manufacturing the same, and method for controlling the same  
There is disclosed a memory cell which has a diffusion layers constituting source/drain areas formed on a p-type silicon substrate surface, and a channel area formed between the diffusion layers....
6166410 MONOS flash memory for multi-level logic and method thereof  
The present invention provides a structure and method of manufacturing split gate MONOS multi-level logic memory device. The memory device has a poly stacked gate transistor 20A in series with a...
6163050 Semiconductor device having insulation film whose breakdown voltage is improved and its manufacturing method  
In a silicon substrate, impurity diffusion layers, serving as source and drain regions, are formed to be separated from each other. A gate insulation film is formed on the silicon substrate between...
6159797 Method of fabricating a flash memory with a planarized topography  
A method of fabricating a flash memory includes successive formation of a first polysilicon layer, a first dielectric layer and a hard material layer on a substrate with a tunnelling oxide layer....
6160287 Flash memory  
A flash memory. A tunnel oxide layer covers a part of a substrate. The tunnel oxide layer is covered by a floating gate. A first inter-poly dielectric layer is on the floating gate. A controlling...
6156610 Process for manufacturing an EEPROM having a peripheral transistor with thick oxide  
A process for manufacturing an integrated circuit provides for the formation of a matrix of floating-gate non-volatile memory cells having dual polysilicon levels, with the two polysilicon levels...
6144064 Split-gate EEPROM device having floating gate with double polysilicon layer  
Methods of forming EEPROM memory cells having uniformly thick tunneling oxide layers include the steps of forming a preliminary field oxide isolation region of first thickness at a face of a...
6137718 Method for operating a non-volatile memory cell arrangement  
In order to increase the storage density, in a memory cell arrangement having MOS transistors as memory cells which has as gate dielectric, a dielectric triple layer having a first silicon oxide...
6133601 Non-volatile semiconductor memory device with inter-layer insulation film  
In the semiconductor substrate, an insulation film designed for the element separation is formed. A gate insulation film and a floating gate electrode are formed in the element region surrounded by...
6133605 Semiconductor nonvolatile memory transistor and method of fabricating the same  
A MONOS nonvatile memory transistor includes a semiconductor substrate, a memory insulator film on the semiconductor substrate composed of a tunnel insulator film, a memory nitride film and a top...
6124622 MIS transistor with a three-layer device isolation film surrounding the MIS transistor  
A device isolation film is formed on one major surface of a semiconductor substrate so as to surround a device formation region. The device isolation film consists of a first layer made of silicon...
6121654 Memory device having a crested tunnel barrier  
A nonvolatile, high-speed, bit-addressable memory device is disclosed. A tunnel barrier layer is disposed between a charge supply medium and a charge storage medium, with the tunnel barrier layer...
6091100 High density NAND structure nonvolatile memories  
The present invention includes pad oxides that are separated from each other and on a substrate. First isolations are formed on the pad oxides. Second isolations are formed on the substrate,...
6087230 Method of fabricating an SOI device having a channel with variable thickness  
A semiconductor device is provided by forming an insulating film on a supporting substrate and a semiconductor layer on the insulating film, forming an MOS semiconductor component having a source,...
6087229 Composite semiconductor gate dielectrics  
Provided are methods for fabricating hardened composite thin layer gate dielectrics. According to preferred embodiments of the present invention, composite gate dielectrics may be produced as...
6084260 Semiconductor storage device and method for manufacturing the same  
An Si oxide film, an oriented paraelectric oxide thin film and an oriented ferroelectric thin film are laminated on an Si single crystal substrate having a region for a source and a drain. A...
6078074 Semiconductor device having multilayer metal interconnection  
An n-type diffused layer is formed in a p-type semiconductor substrate. A control gate electrode of a memory cell MC is connected with a metal interconnect of a first layer and the metal...
6069381 Ferroelectric memory transistor with resistively coupled floating gate  
The present invention proposes a new type of single-transistor memory device, which stores information using the polarization of a ferroelectric material. The device is a floating-gate FET, with a...
6057570 Solid-state image device  
A solid-state image device includes a peripheral having a non-volatile memory transistor 4, which is a transistor of the MNOS type, MONOS type or floating gate type, with a structure in which...
6054732 Single polysilicon flash EEPROM with low positive programming and erasing voltage and small cell size  
A single polysilicon memory cell (10) provides a positive low programming and erase voltage together with a small cell size and includes P substrate (12) and P-well (14) formed within P substrate...
6054366 Two-layered gate structure for a semiconductor device and method for producing the same  
In order to avoid any concentration of an electric field to gate edges of a two-layered structure and to improve an accumulation performance of charge, a semiconductor device includes a...
6040995 Method of operating a storage cell arrangement  
For the operation of a memory cell arrangement with MOS transistors as memory cells that comprise a dielectric triple layer (5) with a first silicon oxide layer (51), a silicon nitride layer (52)...
6037627 MOS semiconductor device  
A MOS semiconductor device comprises a semiconductor substrate having source and drain regions, a first insulating film disposed over the substrate in a space overlapping opposed edges of the...
6031264 Nitride spacer technology for flash EPROM  
A flash EPROM device includes a floating gate electrode with a top surface and sidewalls is formed on a gate oxide layer covering a semiconductor substrate. A polyoxide cap layer is formed on the...
6020606 Structure of a memory cell  
A structure of a memory cell in a memory device is taking an interface between a silicon nitride layer and a oxide layer. The memory cell includes: a polysilicon layer on a substrate, a silicon...
6018184 Semiconductor structure useful in a self-aligned contact having multiple insulation layers of non-uniform thickness  
A semiconductor processing method is provided for making contact openings. It includes depositing several insulative layers and performing an anisotropic etch. One layer is a conformal oxide...
6002151 Non-volatile trench semiconductor device  
A non-volatile memory device is formed in a substrate, thereby enabling increased densification. Embodiments include forming a trench in a substrate, forming a substantially U-shaped tunnel...
5986302 Semiconductor memory device  
A floating gate of a semiconductor memory device has a gate bird beak on an end portion thereof. Further, a positional relationship between the floating gate and a drain is controlled such that a...
5981993 Flash memory device and method of fabricating the same  
A semiconductor memory device and method of fabricating the same includes a first insulation layer and a first conductive layer formed on a substrate; conductive sidewall spacers protruding...
5973358 SOI device having a channel with variable thickness  
A semiconductor device is provided by forming an insulating film on a supporting substrate and a semiconductor layer on the insulating film, forming an MOS semiconductor component having a source,...
Matches 451 - 500 out of 716 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >