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Match Document Document Title
6841444 Nonvolatile semiconductor memory device and manufacturing method thereof  
A nonvolatile semiconductor memory device that can be miniaturized is provided. A method of manufacturing the nonvolatile semiconductor memory device includes the steps of: forming an interlayer...
6838320 Method for manufacturing a semiconductor integrated circuit device  
In a semiconductor integrated circuit device having a system-on-chip structure in which a DRAM and a logic integrated circuit are mixedly mounted on a chip, a silicide layer is formed on the...
6835970 Semiconductor device having self-aligned contact pads and method for manufacturing the same  
A semiconductor device having self-aligned contact pads and a method for manufacturing the same are provided. The semiconductor device includes a semiconductor substrate and an isolation layer...
6833292 Reducing dopant losses during annealing processes  
A method of reducing dopant losses is provided. The method includes providing a transistor structure having a first region, implanting a dopant into the first region, depositing a control layer...
6831325 Multi-level memory cell with lateral floating spacers  
A multi-level non-volatile memory transistor is formed in a semiconductor substrate. A conductive polysilicon control gate having opposed sidewalls is insulatively spaced just above the substrate....
6831310 Integrated circuit having multiple memory types and method of formation  
A transistor ( 10 ) is formed having three separately controllable gates ( 44, 42, 18 ). The three gate regions may be electrically biased differently and the gate regions may have different...
6828624 Nonvolatile semiconductor memory device covered with insulating film which is hard for an oxidizing agent to pass therethrough  
A nonvolatile semiconductor memory device includes comprises: an element isolation region being in contact with a first element region, an insulating film covering a memory cell, a peripheral...
6828622 Nonvolatile semiconductor memory device and its manufacturing method  
Memory cells each having a floating gate ( 4 ), control gate ( 6 ), and source and drain diffusion layers ( 7 a, 7 b ) are formed on a silicon substrate ( 1 ). A silicon nitride film ( 10 ) by...
6828623 Floating gate memory device with homogeneous oxynitride tunneling dielectric  
A memory device with homogeneous oxynitride tunneling dielectric. Specifically, the present invention describes a flash memory cell that includes a tunnel oxide dielectric layer including...
6828618 Split-gate thin-film storage NVM cell  
A semiconductor nonvolatile memory cell ( 30 ) comprising a split-gate FET device having a charge-storage transistor ( 38 ) in series with a select transistor ( 39 ). A multilayered charge-storage...
6828627 Semiconductor device  
A semiconductor device exhibits a stable driving force and high performance reliability. The semiconductor device has at least one transistor having a gate insulating film formed on a element...
6825523 Process for manufacturing a dual charge storage location memory cell  
A process for manufacturing a dual charge storage location electrically programmable memory cell that includes the steps of forming a central insulated gate over a semiconductor substrate; forming...
6825524 Semiconductor integrated circuit device  
A semiconductor integrated circuit device includes: a substrate; a first conductivity type of semiconductor layers arranged above the substrate as being insulated from the substrate and insulated...
6822926 Non-volatile semiconductor memory device  
A non-volatile semiconductor memory device having a memory cell array region in which a plurality of memory cells, each having first and second MONOS memory cells controlled by a word gate and...
6822284 ONO dielectric for memory cells  
A method of fabricating a semiconductor device includes providing a wafer substrate, forming a first oxide layer over the wafer substrate using a single wafer low pressure chemical vapor deposition...
6822287 Array of integrated circuit units with strapping lines to prevent punch through  
An array of non-volatile memory cells is arranged in a plurality of rows and columns where each cell has a first region and a second region spaced apart from one another with a channel region...
6818943 Semiconductor device having a shield plate for applying electric potential to the semiconductor substrate  
A semiconductor device of this invention is a single-layer gate nonvolatile semiconductor memory in which a floating gate having a predetermined shape is formed on a semiconductor substrate. This...
6818512 Split-gate flash with source/drain multi-sharing  
A multi-bit split-gate (MSG) flash cell with multi-shared source/drain and making of the same are disclosed. The MSG is formed with N+1 stacked gates comprising floating gates and control gates,...
6818936 Scaled EEPROM cell by metal-insulator-metal (MIM) coupling  
A single-poly EEPROM cell is disclosed with a vertically formed metal-insulator-metal (MIM) coupling capacitor, which serves as a control gate in place of a laterally buried control gate thereby...
6818948 Split gate flash memory device and method of fabricating the same  
A split gate flash memory device and method of fabricating the same. A cell of the split gate flash memory device in accordance with the invention is disposed in a cell trench within a substrate to...
6818956 Non-volatile memory device and fabrication method thereof  
A nonvolatile read-only memory device, wherein a word line is on a substrate and the word line includes a metal layer and a polysilicon line. A trapping layer is further located between the word...
6818942 Non-volatile semiconductor storage device having conductive layer surrounding floating gate  
In a non-volatile semiconductor storage device, a barrier layer is disposed, via an interlayer isolating film, in an area surrounding a floating gate, including an area adjoining a connecting part...
6815761 Semiconductor integrated circuit device  
In the semiconductor integrated circuit device, an AND-type flash memory is formed on a substrate in which stripe-like element separation regions 5 are formed and active regions L sandwiched...
6815756 Structure for split flash memory cells containing a programming injector and a method for fabricating the structure  
A split gate structure is disclosed for improved programming and erasing efficiency. Source/drain regions are equally spaced along the active regions and are electrically connected by source/drain...
6815759 Semiconductor memory with floating gate type FET  
A tunneling insulating film is formed on the partial surface area of a semiconductor substrate. A floating gate electrode is formed on the tunneling insulating film. A gate insulating film covers...
6812515 Polysilicon layers structure and method of forming same  
A non-volatile memory cell includes a first insulating layer over a substrate region, and a floating gate. The floating gate includes a first polysilicon layer over the first insulating layer and a...
6812521 Method and apparatus for improved performance of flash memory cell devices  
Dopant of an n-type is deposited in the channel area of a p-type well of isolated gate floating gate NMOS transistors forming the memory cells of a memory device array connected in a NAND gate...
6809372 Flash memory structure using sidewall floating gate  
A flash memory and a method of forming a flash memory, includes forming a polysilicon wordline on a substrate, the wordline having first and second sidewalls, the first sidewall being tapered, with...
6808169 Non-volatile memory with crown electrode to increase capacitance between control gate and floating gate  
A non-volatile memory (NVM) system includes a NVM cell having: a semiconductor region having a first conductivity type; a gate dielectric layer located over the semiconductor region; a gate...
6809374 Nonvolatile memory device  
To match where electrons are injected when writing and where holes are injected when erasing in a MONOS-type nonvolatile memory device, two control gates are formed between a word gate on...
6809373 Non-volatile semiconductor memory device, method for manufacturing same and method for controlling same  
A 2-bit cell is made up by first and second diffusion regions provided in a substrate surface in separation from each other, first and second dielectric films provided on the substrate adjacent to...
6806517 Flash memory having local SONOS structure using notched gate and manufacturing method thereof  
A notched gate SONOS transistor includes: a substrate having source/drain regions; a gate insulator layer on the substrate between the source/drain regions; a notched gate structure, on the gate...
6806155 Method and system for scaling nonvolatile memory cells  
A method and system for providing a semiconductor device are described. The method and system include providing a plurality of gate stacks and a first source drain halo implant. The first source...
6806525 Semiconductor device and operation method thereof  
A semiconductor device with a non-volatile memory, having: first to fourth memory cells arranged in a first direction; a first bit line extending over the first memory cell in a second direction...
6806529 Memory cell with a capacitive structure as a control gate and method of forming the memory cell  
In an electrically programmable non-volatile memory cell, the first terminal of a high density capacitive structure is electrically connected to a conductive structure to form a floating gate/first...
6806532 Nonvolatile semiconductor device  
A nonvolatile semiconductor memory device is formed in which data in the form of electrons trapped in the silicon layers directly on the source and the drain respectively can hardly be lost or...
6803625 Method with trench source to increase the coupling of source to floating gate in split gate flash  
A split-gate flash memory cell having improved programming and erasing speed with a tilted trench source, and also a method of forming the same are provided. This is accomplished by forming two...
6800894 Semiconductor devices, circuit substrates and electronic devices  
Certain embodiments include a semiconductor device capable of preventing a retardation of signal transmission between the smallest units, a method for the manufacture thereof, a circuit substrate...
6800893 Semiconductor circuit configuration and associated fabrication method  
The invention relates to a semiconductor circuit configuration and to an associated fabrication method, in which a semiconductor substrate has a plurality of word lines and a plurality of bit lines...
6800885 Asymmetrical double gate or all-around gate MOSFET devices and methods for making same  
An asymmetric double gate metal-oxide semiconductor field-effect transistor (MOSFET) includes a first fin formed on a substrate; a second fin formed on the substrate; a first gate formed adjacent...
6800895 Vertical split gate flash memory cell and method for fabricating the same  
A vertical split gate flash memory cell. The memory cell includes a substrate, a floating gate, a control gate, a tunnel layer, a first doping region, and a second doping region. The floating gate...
6798013 Vertically integrated flash memory cell and method of fabricating a vertically integrated flash memory cell  
A unique cell structure for use in flash memory cell and a method of fabricating the memory cell. More particularly, a vertically integrated transistor having a pair of floating gates is fabricated...
6798014 Semiconductor memory cell and semiconductor component as well as manufacturing methods therefore  
A semiconductor memory cell with a storage transistor, a selection transistor and a layer structure is provided. The layer structure is formed of at least two semiconductor layers separated from...
6794711 Non-volatile memory device having select transistor structure and SONOS cell structure and method for fabricating the device  
Non-volatile memory devices according to embodiments of the invention can include, for example, a semiconductor substrate, a source region, a drain region, an impurity region, a vertical structure,...
6791141 Semiconductor constructions comprising stacks with floating gates therein  
Floating gate transistors and methods of forming the same are described. In one implementation, a floating gate is formed over a substrate. The floating gate has an inner first portion and an outer...
6791140 Memory transistor structure  
A method of forming a memory transistor includes providing a substrate comprising semiconductive material and forming spaced-apart source/drain structures. At least one of the source/drain...
6791863 Ferroelectric memory device and method of manufacturing the same  
A ferroelectric memory device includes a memory cell array and a peripheral circuit section. The memory cell array, in which memory cells are arranged in a matrix, includes first signal electrodes,...
6791142 Stacked-gate flash memory and the method of making the same  
A method for manufacturing a flash memory comprises forming a first dielectric layer on a semiconductor substrate as a tunneling dielectric and forming a first conductive layer on the first...
6787842 Method for operating a stacked gate field effect transistor (FET) device  
Within a stacked gate field effect transistor (FET) device, as well as a method for fabrication thereof and a method for operation thereof, there is provided a stacked gate field effect transistor...
6787397 Semiconductor device protective overcoat with enhanced adhesion to polymeric materials and method of fabrication  
An integrated circuit device with a low stress, thin film, protective overcoat having enhanced adhesion both to polymeric materials used in packaging-semiconductor devices, and within the...
Matches 551 - 600 out of 1553 < 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 >