Matches 651 - 700 out of 1643 < 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 >
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6924527 Split gate flash memory cell structure and method of manufacturing the same  
A non-volatile memory cell that includes a semiconductor substrate, a well region implanted with a first-type dopant formed in the semiconductor substrate, a first doped region implanted with a...
6921960 Capacitor element with an opening portion formed in a peripheral circuit  
A semiconductor device includes a structure in which a first electrode layer, an inter-electrode insulating film and a second electrode layer are laminated in a main circuit in this order, and...
6921694 Method for fabricating floating gate  
A method for fabricating a floating gate with multiple tips. A semiconductor substrate is provided, on which an insulating layer and a patterned hard mask layer are sequentially formed. The...
6921936 pn Varactor  
An object of this invention is to provide a pn-varactor having a small resistance and capable of coinciding with incorporation of a circuit employing LC resonance into an integrated circuit. A...
6919596 Structure of a capacitive element of a booster circuit included in a semiconductor device and method of manufacturing such a structure  
A lower electrode in a capacitive element area is formed on a field oxide film in self-alignment with trenches, so that the lower electrode and floating gate electrodes in a memory cell area can...
6917070 Single-poly EPROM and method for forming the same  
A single-poly EPROM and method for forming the same. The single-poly EPROM has an isolation region disposed in a substrate to define a striped active area. A deep n-well is located under the...
6914277 Merged FinFET P-channel/N-channel pair  
A semiconductor device includes an N-channel device and a P-channel device. The N-channel device includes a first source region, a first drain region, a first fin structure, and a gate. The...
6914289 Hourglass ram  
An integrated circuit having a non-volatile HGRAM cell includes a first section having impurity materials implanted into a substrate to form NPN transistor regions and a second section having a...
6914288 EEPROM and EEPROM manufacturing method  
A memory transistor of an EEPROM has a floating gate electrode of a shape such that it covers the entirety of a tunnel film and a channel region and does not cover a region between the channel...
6914293 Nonvolatile semiconductor memory device and method for manufacturing same  
Nonvolatile semiconductor memory devices and methods for manufacturing thereof, which provide inhibiting the shortcutting of the channel due to the creation of the bird's beak to promote the...
6911690 Flash memory cell, flash memory cell array and manufacturing method thereof  
A flash memory cell array comprises a substrate, a string of memory cell structures and source region/drain region. Each of memory cell structures includes a stack gate structure including a select...
6912158 Transistor with nanocrystalline silicon gate structure  
A memory is described which has memory cells that store data using hot electron injection. The data is erased through electron tunneling. The memory cells are described as floating gate transistors...
6911691 Nonvolatile semiconductor memory device  
To propose a new channel structure suitable for high efficiency source side injection, and provide a non-volatile semiconductor memory device and a charge injection method using the same. The...
6911704 Memory cell array with staggered local inter-connect structure  
A memory cell array comprises a two dimensional array of memory cells fabricated on a semiconductor substrate. The memory cells are arranged in a plurality of rows and a plurality columns. Each...
6909138 P-channel dynamic flash memory cells with ultrathin tunnel oxides  
Structures and methods involve dynamic enhancement mode p-channel flash memories with ultrathin tunnel oxide thicknesses. Both write and erase operations are performed by tunneling. The p-channel...
6909140 Flash memory with protruded floating gate  
A method of forming a flash memory with a protruded floating gate. A substrate is provided. An isolation area and a plurality of patterned conductive layers are sequentially formed on the...
6908803 Methods for forming wordlines, transistor gates, and conductive interconnects, and wordline, transistor gate, and conductive interconnect structures  
The invention encompasses stacked semiconductor devices including gate stacks, wordlines, PROMs, conductive interconnecting lines, and methods for forming such structures. The invention also...
6906376 EEPROM cell structure and array architecture  
An EEPROM cell device on a substrate is achieved. The device comprises, first, a selection transistor having gate, drain, source, and channel. The drain is defined as a cell bit line. An isolation...
6906378 Non-volatile semiconductor memory device and method of fabricating the same  
There is provided a non-volatile semiconductor memory device exhibiting excellent electrical characteristics and a method of fabricating the same. The semiconductor device includes a semiconductor...
6906377 Flash memory cell and fabrication thereof  
A flash memory cell is described, including at least a substrate, a tunnel oxide layer, a floating gate, an insulating layer, a control gate and an inter-gate dielectric layer. The tunnel oxide...
6906390 Nonvolatile semiconductor storage and method for manufacturing the same  
The memory device has a plurality of dielectric films including charge storage layers CS having a charge holding capability therein and stacked on an active region of a semiconductor SUB and...
6903405 Semiconductor memory device with a pair of floating gates  
A floating gate is provided in the form of two separated parts in one memory cell to allow each of the floating gates to be individually programmable, thereby enabling the integration to be doubled...
6903406 Cells of nonvolatile memory device with high inter-layer dielectric constant  
This disclosure provides cells of nonvolatile memory devices with floating gates and methods for fabricating the same. The cell of the nonvolatile memory device includes device isolation layers in...
6903407 Non volatile charge trapping dielectric memory cell structure with gate hole injection erase  
A dielectric memory cell comprises a substrate which includes a source region, a drain region, and a channel region positioned there between. A multilevel charge trapping dielectric is positioned...
6897517 Multibit non-volatile memory and method  
A memory is described having a semiconductor substrate of a first conductivity type, a first and a second junction region of a second conductivity type, whereby said first and said second junction...
6897518 Flash memory cell having reduced leakage current  
A flash memory cell of the present invention comprises a floating gate, having a charge trapping region and a fin region. A source region and a drain region is formed proximate the floating gate. A...
6897516 Flash memory array structure and method of forming  
A method of forming a flash memory array structure includes forming a first dielectric layer outwardly from a semiconductor substrate, removing a portion of the first dielectric layer and the...
6897506 Systems and methods using non-volatile memory cells  
Described in this disclosure is a non-volatile memory cell. The non-volatile memory cell generally includes a short-range atomic order substrate, a dielectric positioned adjacent to the substrate,...
6897515 Semiconductor memory and semiconductor device  
A semiconductor memory capable of attaining a low voltage, a high-speed operation, low power consumption and a high degree of integration is obtained. This semiconductor memory comprises a floating...
6897519 Tunneling floating gate APS pixel  
A floating gate pixel is described which is formed by forming an N well in a P type silicon substrate. A P well is formed in the N well A gate is formed over a thin gate oxide, about 25 Angstroms...
6893919 Floating gate and fabricating method of the same  
A floating gate and a fabricating method of the same. A semiconductor substrate is provided. A gate dielectric layer and a conducting layer are sequentially formed on the semiconductor substrate. A...
6894341 Semiconductor device and manufacturing method  
A semiconductor device comprises a memory cell array portion and peripheral circuit portion, wherein a first insulation film including elements as main components other than nitrogen fills between...
6894343 Floating gate memory cells utilizing substrate trenches to scale down their size  
Several embodiments of flash EEPROM split-channel cell arrays are described that position the channels of cell select transistors along sidewalls of trenches in the substrate, thereby reducing the...
6894340 Non-volatile semiconductor memory cell utilizing poly-edge discharge  
A process and structure for fabricating a non-volatile memory cell through the formation of a source and drain region and a charge trapping layer located therebetween is presented. E-fields for...
6891220 Method of programming electrons onto a floating gate of a non-volatile memory cell  
A memory cell has a trench formed into a surface of a semiconductor substrate, and spaced apart source and drain regions with a channel region formed therebetween. The source region is formed...
6890820 Method of fabricating FLASH memory devices  
A method of fabricating split gate type FLASH memory device comprises forming trench device isolation layers in a substrate to define a plurality of parallel first active regions. A gate insulation...
6888191 Semiconductor device and fabrication process therefor  
A semiconductor device comprises: a semiconductor substrate of a first conductivity type; a first electrode provided on the semiconductor substrate with the intervention of a gate insulation film;...
6887758 Non-volatile memory device and method for forming  
A semiconductor device ( 10 ) has a highly doped layer ( 26 ) having a first conductivity type uniformly implanted into the semiconductor substrate ( 20 ). An oxide-nitride-oxide structure ( 36,...
6888190 EEPROM with source line voltage stabilization mechanism  
A low-voltage nonvolatile memory array includes an N type semiconductor substrate having a memory region. A deep P well is formed in the semiconductor substrate. A cell N well is located within the...
6888192 Mirror image non-volatile memory cell transistor pairs with single poly layer  
An arrangement of non-volatile memory transistors constructed in symmetric pairs within the space defined by intersecting pairs of word and bit lines of a memory array. The transistors have spaced...
6885059 Nonvolatile memory and semiconductor device  
A nonvolatile memory transistor with multi values being capable of suppressing a short channel effect is provided. In an active region of a memory transistor, stripe-shaped impurity regions...
6882001 Electrically-programmable non-volatile memory cell  
An electrically-programmable memory cell programmed by means of injection of channel hot electrons into a charge-storage element capacitively coupled to a memory cell channel for modulating a...
6882572 Method of operating a semiconductor memory array of floating gate memory cells with horizontally oriented edges  
A self aligned method of forming an array of floating gate memory cells, and an array formed thereby, wherein each memory cell includes a trench formed into a surface of a semiconductor substrate,...
6882011 ESD protection device having reduced trigger voltage  
An ESD protection device having reduced trigger voltage is disclosed. A first MOS transistor includes a first gate, a first heavily doped region at one side of the first gate, and a second heavily...
6878589 Method and system for improving short channel effect on a floating gate device  
A method and system for improving short channel effect on a floating gate device is disclosed. In one embodiment, a p-type implant is applied to a source side of the floating gate device. In...
6878984 Non-volatile flash memory having a specific difference between source/floating gate and drain/floating gate overlapped portions  
A structure of a non-volatile flash memory, in which a punch-through current is suppressed and the area of a memory cell is reduced, is provided. The non-volatile flash memory being a NOR type...
6878985 Nonvolatile semiconductor memory device having a memory cell that includes a floating gate electrode and control gate electrode  
Element isolation insulating layers have an STI structure, and their upper surfaces are flat. A floating gate electrode is formed in a recess which is formed by projections of the element isolation...
6878986 Embedded flash memory cell having improved programming and erasing efficiency  
A memory cell including a substrate having a source region; a floating gate structure disposed over the substrate and associated with the source region; and a source coupling enhancement structure...
6878987 Split gate memory device  
A split gate memory device and fabricating method thereof, wherein gate insulating and polysilicon layers are sequentially formed on a substrate. The polysilicon layer is patterned and a capping...
6876032 Flash with finger-like floating gate  
A finger-like floating gate structure in flash memory cells is disclosed. Raised isolation regions within a semiconductor region separate parallel active regions. A gate dielectric layer is...
Matches 651 - 700 out of 1643 < 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 >