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7115901 Non-volatile electromechanical field effect devices and circuits using same and methods of forming same  
Non-volatile field effect devices and circuits using same. A non-volatile field effect device includes a source, drain and gate with a field-modulatable channel between the source and drain. Each...
7115939 Floating gate transistor with horizontal gate layers stacked next to vertical body  
Vertical body transistors with adjacent horizontal gate layers are used to form a memory array in a high density flash electrically erasable and programmable read only memory (EEPROM) or a logic...
7115949 Method of forming a semiconductor device in a semiconductor layer and structure thereof  
In some embodiments, non-volatile memory (NVM) devices are formed on a silicon-on-insulator (SOI) substrate ( 12 ) by forming elevated sources and drains ( 56 ) in contact with extensions ( 46 )...
7112511 CMOS image sensor having prism and method for fabricating the same  
A method for fabricating a CMOS image sensor with a prism includes the steps of: forming a plurality of photodiodes corresponding to respective unit pixels on a substrate; sequentially forming an...
7112815 Multi-layer memory arrays  
Multi-layer memory arrays and methods are provided. A memory array has two or more layers of memory material, each layer of memory material having an array of memory cells. A first contact...
7112841 Graded composition metal oxide tunnel barrier interpoly insulators  
Structures and methods for programmable array type logic and/or memory devices with graded composition metal oxide tunnel barrier intergate insulators are provided. The programmable array type...
7109101 Capping layer for reducing amorphous carbon contamination of photoresist in semiconductor device manufacture; and process for making same  
In the fabrication of semiconductor devices using the PECVD process to deposit hardmask material such as amorphous carbon, structure and process are described for reducing migration of species from...
7109548 Operating a memory device  
A floating gate transistor has a reduced barrier energy at an interface with an adjacent gate insulator, allowing faster charge transfer across the gate insulator at lower voltages. Data is stored...
7109549 Semiconductor device and method of manufacturing the same  
Disclosed is a semiconductor device having a plurality of memory cells arranged in a first direction and a second direction perpendicular to the first direction, each memory cell comprising a first...
7105887 Memory cell structures including a gap filling layer and methods of fabricating the same  
Memory cell structures and methods of fabricating the same are disclosed. An illustrated fabrication method comprises: forming spacers to isolate and protect a gate area (including a floating gate...
7105406 Self aligned non-volatile memory cell and process for fabrication  
Floating gate structures are disclosed that have a projection that extends away from the surface of a substrate. This projection may provide the floating gate with increased surface area for...
7102190 Flash memory cell with a unique split programming channel and reading channel  
A structure for flash memory cells is disclosed, Isolation regions are formed in a semiconductor region separating cells and also separating programming bit line channel regions of a cell from...
7102191 Memory device with high dielectric constant gate dielectrics and metal floating gates  
A memory cell transistor includes a high dielectric constant tunnel insulator, a metal floating gate, and a high dielectric constant inter-gate insulator comprising a metal oxide formed over a...
7101749 Non-volatile semiconductor memory device  
A non-volatile semiconductor memory device according to the present invention has a semiconductor substrate and a memory cell having a floating gate provided through a tunnel insulating layer on...
7098096 Method of fabricating multi-bit flash memory  
A method of fabricating a multi-bit flash memory, having a control gate, a floating gate, a source region, a drain region and a channel region. An isolation region is formed in the floating gate to...
7098499 Electrically alterable non-volatile memory cell  
A nonvolatile memory cell is provided. The memory cell includes a storage transistor and an injector in a well of an n-type conductivity. The well is formed in a semiconductor substrate of a p-type...
7098504 Nonvolatile semiconductor storage device and production method therefor  
There is provided a nonvolatile semiconductor storage device less subject to variances of electric characteristics among memory cells. A floating gate electrode provided on a substrate is made of...
7095075 Apparatus and method for split transistor memory having improved endurance  
The present invention includes floating gate transistor structures used in non-volatile memory devices such as flash memory devices. In one embodiment, a system includes a CPU and a memory device...
7095074 Semiconductor device with reduced memory leakage current  
Defects in element forming regions on which memory cells of a non-volatile memory are formed are to be diminished to reduce leakage current. End portions of element forming regions with...
7095085 Nonvolatile semiconductor memory device and method for manufacturing the same  
A nonvolatile semiconductor memory device includes erasable and programmable memory cell transistors, a selection transistor, a peripheral transistor, first post-oxidation films each provided on a...
7095077 Semiconductor memory having two charge storage sections  
A semiconductor memory includes: a p-type semiconductor (p-type semiconductor film on a substrate, a p-type well region in a semiconductor substrate, or an insulator); a gate insulating film formed...
7091549 Programmable memory devices supported by semiconductor substrates  
The invention includes a memory device supported by a semiconductor substrate and comprising in ascending order from the substrate: a floating gate, a dielectric material, a layer consisting...
7087952 Dual function FinFET, finmemory and method of manufacture  
A non-volatile storage cell in a Fin Field Effect Transistor (FinFET) and a method of forming an Integrated Circuit (IC) chip including the non-volatile storage cell. Each FET includes a control...
7087500 Charge trapping memory cell  
A memory cell includes a channel region between source/drain regions at the top side of a semiconductor body and is provided, transversely with respect to the longitudinal direction, with a bulge...
7087955 Semiconductor device and a method of manufacturing the same  
A semiconductor device has a nonvolatile memory employing a split-gate type memory cell structure, using a nitride film as a charge storage layer. An n-type semiconductor region is formed in a main...
7087953 Unified non-volatile memory device and method for integrating NOR and NAND-type flash memory and EEPROM device on a single substrate  
A method for making a unified non-volatile memory (NVM) comprised of a NOR-type flash memory, a NAND-type flash memory, and a 3-transistor EEPROM integrated on the same chip is achieved. This...
7087950 Flash memory cell, flash memory device and manufacturing method thereof  
The present invention relates to a flash memory cell comprising a silicon substrate having an active region comprising a channel region and source-/drain-regions, the active region comprising a...
7084452 Semiconductor device having one-time programmable ROM and method of fabricating the same  
A semiconductor device with a one-time programmable (OTP) ROM disposed over a semiconductor substrate including a memory cell area and a peripheral circuit area includes a MOS transistor and an OTP...
7084440 Integrated circuit layout and a semiconductor device manufactured using the same  
An integrated circuit layout and a semiconductor device manufactured using the same are provided. According to one embodiment, a semiconductor device has a substrate and a plurality of bar type...
7084453 Method of forming different oxide thickness for high voltage transistor and memory cell tunnel dielectric  
A semiconductor memory device and method for making the same, where a memory cell and high voltage MOS transistor are formed on the same substrate. An insulating layer is formed having a first...
7084028 Semiconductor device and method of manufacturing a semiconductor device  
A semiconductor device comprises a semiconductor substrate having a cavity region inside; a first insulation film formed on the inner wall of the cavity region; a first electrode formed on the...
7078769 Nonvolatile memory and manufacturing method thereof  
Memory elements, switching elements, and peripheral circuits to constitute a nonvolatile memory are integrally formed on a substrate by using TFTs. Since semiconductor active layers of memory...
7078761 Nonvolatile memory solution using single-poly pFlash technology  
A single-poly two-transistor PMOS memory cell for multiple-time programming applications includes a PMOS floating gate transistor sharing a drain/source P+ diffusion region with a PMOS select gate...
7074671 Gate electrode of a semiconductor device and method of forming the same  
Disclosed are an electrode of a semiconductor device and a method of forming the same. A polysilicon layer is formed on a semiconductor substrate. An amorphous silicon capping layer is then formed...
7075139 Method of manufacturing semiconductor device  
Described is a semiconductor device having a silicon oxide (SiO 2 ) film into which nitrogen atoms, in a range between approximately 2×10 20 atoms/cm 3 or more and 2×10 21 atoms/cm 3 or less,...
7075142 Cell arrays of memory devices having extended source strapping regions  
A cell array of a flash memory device includes extended source strapping regions. The cell array includes a device isolation layer and active regions. The device isolation layer is formed in a...
7075144 Non-volatile memory device  
The present invention includes a method of fabricating a non-volatile memory device having two transistors for two-bit operations to improve electron trapping efficiency and integration degree of...
7075127 Single-poly 2-transistor based fuse element  
An electrically programmable transistor fuse having a double-gate arrangement disposed in a single layer of polysilicon in which a first gate is disposed overlapping a portion of a source region...
7075140 Low voltage EEPROM memory arrays  
A non-volatile memory array includes memory cells connected in a common source arrangement and formed in columns of isolated well regions so that Fowler-Nordheim tunneling is used for both write...
7075143 Apparatus and method for high sensitivity read operation  
A nonvolatile semiconductor memory device enabling a high sensitivity read operation by a low voltage, provided with a gate insulating film comprised of a bottom insulating film, a charge storing...
7071511 Nonvolatile semiconductor memory device having adjacent selection transistors connected together  
A semiconductor memory device comprising a semiconductor substrate, a plurality of cell transistors provided on the substrate, a plurality of selection gates provided on the substrate, and...
7071512 Non-volatile semiconductor memory device  
A non-volatile semiconductor memory device includes a substrate, a first insulating film formed on the substrate, a second insulating film formed on the first insulating film, a plurality of...
7067871 Stacked gate semiconductor memory  
A semiconductor memory embraces a plurality of memory cell transistors, and each of the memory cell transistors encompasses a substrate; a gate insulator stacked on the substrate, configured to...
7064377 Flash memory cell with buried floating gate and method for operating such a flash memory cell  
A programmable read-only memory cell and method of operating the programmable read-only memory cell. In one embodiment, the programmable read-only memory cell comprises a floating gate arranged in...
7064381 Non-volatile memory device having upper and lower trenches and method for fabricating the same  
Non-volatile memory device, and method for fabricating the same are disclosed. By forming floating gate trenches in memory regions and filling the trenches with floating gate material, a step...
7064376 High performance embedded semiconductor memory devices with multiple dimension first-level bit-lines  
A dynamic random access memory solves long-existing tight pitch layout problems using a multiple-dimensional bit line structure. Improvement in decoder design further reduces total area of this...
7061041 Memory device  
A memory device is provided. The memory device comprises a substrate, first isolation structures, stacked device structures, and second isolation structures. The substrate comprises a memory cell...
7061042 Double-cell memory device  
A memory array device has a plurality of gate structure lines, adjacently disposed over a substrate along a direction, wherein at least a portion of the gate structure lines have memory function. A...
7061808 Semiconductor memory device, driving method thereof, and portable electronic apparatus  
A semiconductor memory device includes a memory array; a storage section that receives a maximum pulse value from a user of the semiconductor memory device; a control section that executes a...
7061044 Non-volatile memory device  
A non-volatile memory device comprises a gate line that includes a gate dielectric layer, a bottom gate pattern, an inter-gate dielectric and a top gate pattern, which are sequentially stacked. The...