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7358559 |
Bi-directional read/program non-volatile floating gate memory array, and method of formation
A bi-directional read/program non-volatile memory cell and array is capable of achieving high density. Each memory cell has two spaced floating gates for storage of charges thereon. The cell has...
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7355237 |
Shield plate for limiting cross coupling between floating gates
A memory system is disclosed that includes a set of non-volatile storage elements. Each of said non-volatile storage elements includes source/drain regions at opposite sides of a channel in a...
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7355238 |
Nonvolatile semiconductor memory device having nanoparticles for charge retention
A nonvolatile semiconductor memory device including a source region and a drain region formed on a surface of a semiconductor substrate, a channel-forming region formed so as to connect the source...
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7355239 |
Fabrication of semiconductor device exhibiting reduced dielectric loss in isolation trenches
Improved methods of manufacturing semiconductor devices are provided to reduce dielectric loss in isolation trenches of the devices. In one example, a method of manufacturing a semiconductor device...
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7352024 |
Semiconductor storage device and semiconductor integrated circuit
There is provided a semiconductor storage device capable of high integration. On a top surface of a semiconductor substrate, a plurality of device isolation regions ( 16 ) each extending and...
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7352025 |
Semiconductor memory device with increased node capacitance
An integrated circuit semiconductor memory device having the BOX layer removed from under the gate of a storage transistor to increase the gate-to-substrate capacitance and reduce the soft error...
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7351636 |
Methods of forming split-gate non-volatile memory cells including raised oxide layers on field oxide regions
A method of forming a split-gate non-volatile memory cell can include forming first and second adjacent floating gates self-aligned to a field oxide region therebetween. An oxide layer is formed...
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7348237 |
NOR flash memory cell with high storage density
Structures and methods for NOR flash memory cells, arrays and systems are provided. The NOR flash memory cell includes a vertical floating gate transistor extending outwardly from a substrate. The...
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7345336 |
Semiconductor memory device having self-aligned charge trapping layer
A semiconductor memory device having a self-aligned charge trapping layer and a method of manufacturing the same in which a consistent length of an ONO layer is ensured. Here, an insulating stacked...
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7345335 |
Semiconductor integrated circuit, booster circuitry, and non-volatile semiconductor memory device
In a capacitor-containing semiconductor integrated circuit, a portion in which a plurality of capacitors are serially connected together is arranged so that at least part of the capacitors is...
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7342277 |
Transistor for non volatile memory devices having a carbon nanotube channel and electrically floating quantum dots in its gate dielectric
A transistor is described having a source electrode and a drain electrode. The transistor has at least one semiconducting carbon nanotube that is electrically coupled between the source and drain...
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7339230 |
Structure and method for making high density mosfet circuits with different height contact lines
Embodiments herein present a structure, method, etc. for making high density MOSFET circuits with different height contact lines. The MOSFET circuits include a contact line, a first gate layer...
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7339226 |
Dual-level stacked flash memory cell with a MOSFET storage transistor
The present invention is a dual-level flash memory cell design that stores 3 or more bits of information per transistor. The dual-level memory cell stores two lower bits in a first level and stores...
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7339231 |
Semiconductor device and an integrated circuit card
There is provided a technology capable of enhancing reliability in rewrite of storage information in a nonvolatile memory while checking an increase in area of a memory array thereof. With a memory...
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7338859 |
Non-volatile memory cells having floating gate and method of forming the same
A non-volatile memory cell having a floating gate and a method of forming the same. The non-volatile memory cell includes a device isolation layer that is formed in a semiconductor substrate and...
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7335939 |
Semiconductor memory device and method of production
An array of charge-trapping memory cells and pluralities of parallel wordlines and parallel bitlines running transversely to the wordlines are arranged on a substrate surface. Gate electrodes are...
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7335937 |
Nonvolatile semiconductor memory
In an EEPROM consisting of a NAND cell in which a plurality of memory cells are connected in series, the control gate voltage V read of the memory cell in a block selected by the data read...
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7332765 |
Variable resistance functional body and storage device
A variable resistance functional body has an insulator interposed between a first electrode and a second electrode and interposed between a third electrode and a fourth electrode. The insulator...
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7332766 |
Semiconductor integrated circuit device with a stacked gate including a floating gate and a control gate
A semiconductor integrated circuit device includes first and second nonvolatile semiconductor memories. The first memory has first and second select transistors and first memory cell transistors....
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7332789 |
Isolation trenches for memory devices
Methods and apparatus are provided. A first dielectric plug is formed in a portion of a trench that extends into a substrate of a memory device so that an upper surface of the first dielectric plug...
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7329919 |
Non-volatile memory device and method of manufacturing the same
A non-volatile memory device and a method of manufacturing the same where the non-volatile memory device is easily applicable to higher integration of a semiconductor device by reducing a cell size...
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7326992 |
Nonvolatile memory cell with multiple floating gates formed after the select gate
In a memory cell ( 110 ) having multiple floating gates ( 160 ), the select gate ( 140 ) is formed before the floating gates. In some embodiments, the memory cell also has control gates ( 170 )...
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7326991 |
Nonvolatile semiconductor memory and method of operating the same
A nonvolatile semiconductor memory having a memory cell comprises: a semiconductor substrate having a pair of trenches formed on a surface thereof; first electrodes formed in a pair of trenches...
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7317222 |
Memory cell using a dielectric having non-uniform thickness
A memory cell is programmed by injecting charge into a charge storage layer of the memory cell. A desired programmed charge results in the charge storage layer over an edge portion of a channel...
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7315056 |
Semiconductor memory array of floating gate memory cells with program/erase and select gates
A memory device, and method of making and operating the same, including a substrate of semiconductor material of a first conductivity type, first and second spaced apart regions in the substrate of...
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7315058 |
Semiconductor memory device having a floating gate
To prevent the extraction of electrons from the floating gate during a read operation. A semiconductor memory device comprises a selection gate 3 a provided in a first region on a substrate 1 ...
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7315055 |
Silicon-oxide-nitride-oxide-silicon (SONOS) memory devices having recessed channels
Unit cells of silicon-oxide-nitride-oxide-silicon (SONOS) memory devices are provided. The unit cells include an integrated circuit substrate and a SONOS memory cell on the integrated circuit...
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7312495 |
Split gate multi-bit memory cell
A multi-bit memory cell ( 200 ) with a control gate ( 220 ) for controlling a middle portion of a channel region ( 208 ) provides improved operation including faster programming at smaller voltages...
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7312491 |
Charge trapping semiconductor memory element with improved trapping dielectric
A semiconductor memory element, which can be controlled via field effect, includes a semiconductor substrate of a first conduction type, a first doping region of a second conduction type provided...
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7309892 |
Semiconductor element and semiconductor memory device using the same
A field-effect semiconductor element implemented with a fewer number of elements and a reduced area and capable of storing data by itself without need for cooling at a cryogenic temperature, and a...
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7309891 |
Non-volatile and memory semiconductor integrated circuit
A semiconductor integrated circuit device includes first, second gate electrodes, first, second diffusion layers, contact electrodes electrically connected to the first diffusion layers, a first...
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7304343 |
Semiconductor memory device and manufacturing method for the same
The present invention provides a semiconductor memory device including: a semiconductor substrate of a first conductivity type; and a memory cell including: (i) a columnar semiconductor portion...
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7301195 |
Semiconductor memory device for storing data as state of majority carriers accumulated in channel body and method of manufacturing the same
A semiconductor memory device comprises a substrate; a semiconductor layer of a first conductive type isolated from the substrate by an insulator layer; a memory transistor having a gate electrode,...
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7301198 |
Semiconductor device having logic circuitry and memory circuitry on the same substrate, and its use in portable electronic equipment and IC card
A semiconductor switching element and a semiconductor storage element each have a gate electrode, a pair of source/drain regions and a channel forming region. Memory function bodies having a...
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7298005 |
Nonvolatile semiconductor memory and fabrication method for the same
A nonvolatile semiconductor memory includes a first and a second active area configured to extend in the column direction in parallel; an element isolating region configured to electrically...
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7298003 |
Nonvolatile memory device having STI structure
A nonvolatile semiconductor device includes trench isolation layers formed in a semiconductor substrate, each trench isolation layer having a protruding portion having a height that is higher than...
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7294880 |
Semiconductor non-volatile memory cell with a plurality of charge storage regions
For providing a cheap semiconductor memory device with improving reliability by level of a cell, in the place of escaping from defects on memory cells electrically, through such as ECC, and further...
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7294881 |
Nonvolatile semiconductor memory having a charge accumulation layer connected to a gate
At least either above or below a memory transistor formed on an insulating substrate, a shielding layer which has an area larger than that of the semiconductor layer of the memory transistor and...
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7291881 |
Bit line structure and method of fabrication
The invention relates to a bit line structure having a surface bit line (DLx) and a buried bit line (SLx), the buried bit line (SLx) being formed in a trench with a trench insulation layer ( 6 )...
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7288809 |
Flash memory with buried bit lines
A memory cell and a method of forming the same are described. The memory cell is formed on a substrate. The memory cell includes a floating gate that is formed at least in part within the...
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7288455 |
Method of forming non-volatile memory cell array having discontinuous source and drain diffusions contacted by continuous bit line conductors
Rows of memory cells are electrically isolated from one another by trenches formed in the substrate between the rows that are filled with a dielectric, commonly called “shallow trench...
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7285815 |
EEPROM device having selecting transistors and method of fabricating the same
An EEPROM includes a device isolation layer for defining a plurality of active regions, a pair of control gates extending across the active regions and a pair of selection gates patterns that...
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7279738 |
Semiconductor device with an analog capacitor
A method for manufacturing a semiconductor device that comprises forming an oxide layer over a substrate. A polysilicon layer is disposed outwardly from the oxide layer, wherein the polysilicon...
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7279734 |
MOS transistor
The present invention relates to a MOS transistor which is capable of compensating the shortcomings of the conventional MOS transistor having three gate electrodes. In order to achieve the object...
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7276755 |
Integrated circuit and method of manufacture
An integrated circuit having a plurality of active areas separated from each other by a field region and a method for manufacturing the integrated circuit. A first polysilicon finger is formed over...
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7276756 |
Memory cell arrays
The invention includes a method of forming an array of memory cells. A series of capacitor constructions is formed, with the individual capacitor constructions having storage nodes. The capacitor...
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7274068 |
Ballistic direct injection NROM cell on strained silicon structures
A nitride read only memory cell comprising a silicon-germanium layer with a pair of source/drain regions. A strained silicon layer is formed overlying the silicon-germanium layer such that the pair...
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7274062 |
Non-volatile memory and fabricating method and operating method thereof
A non-volatile memory is provided. A substrate has at least two isolation structures therein to define an active area. A well is located in the substrate. A shallow doped region is located in the...
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7271437 |
Non-volatile memory with hole trapping barrier
A non-volatile memory is described having memory cells with a gate dielectric. The gate dielectric is a multilayer charge trapping dielectric between a control gate and a channel region of a...
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7271408 |
Semiconductor device test patterns and related methods for precisely measuring leakage currents in semiconductor cell transistors
Semiconductor device test patterns are provided that include a word line on a semiconductor substrate and an active region having a first impurity doped region and a second impurity doped region in...
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