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Match Document Document Title
7635887 Integrated circuit arrangement with capacitor in an interconnect layer and method  
An integrated circuit arrangement includes an undulating capacitor in a conductive structure layer. The surface area of the capacitor is enlarged in comparison with an even capacitor. The capacitor...
7633112 Metal-insulator-metal capacitor and method of manufacturing the same  
A metal-insulator-metal capacitor includes a first electrode in a first wiring level, a second electrode above the first wiring level and extending into a first portion of the first electrode that...
7621041 Methods for forming multilayer structures  
The present invention relates to methods of forming multilayer structures and the structures themselves. In one embodiment, a method of forming a multilayer structure comprises: providing a...
7592686 Semiconductor device having a junction extended by a selective epitaxial growth (SEG) layer and method of fabricating the same  
In a semiconductor device, and a method of fabricating the same, the semiconductor device includes a protrusion extending from a substrate and a selective epitaxial growth (SEG) layer surrounding...
7579643 Capacitor having high electrostatic capacity, integrated circuit device including the capacitor and method of fabricating the same  
A capacitor may include a first electrode, a second electrode, a low dielectric layer, and/or a high dielectric layer. The first electrode may include at least one first electrode branch. The...
7576383 Capacitor having tapered cylindrical storage node and method for manufacturing the same  
A capacitor is made by forming a buffer oxide layer, an etching stop layer, and a mold insulation layer over a semiconductor substrate having a storage node contact plug. The mold insulation layer...
7547607 Methods of fabricating integrated circuit capacitors using a dry etching process  
A method of fabricating an integrated circuit capacitor includes forming a first metal layer on a conductive plug in an interlayer insulating layer on a substrate. At least a portion of the first...
7541616 Semiconductor device  
A semiconductor integrated circuit device, such as a memory device or radiation detector, is disclosed, in which data storage cells are formed on a substrate. Each of the data storage cells...
7541254 Method of manufacturing thin film capacitor  
A first electrode layer having protrusions and depressions on its surface are formed on a lower insulating layer on a semiconductor substrate, and a sacrificial layer is formed on the first...
7528433 Capacitor structure  
A capacitor structure with a cross-coupling design is provided. In the capacitor structure, conductive lines or electrode plates are coupled together by cross coupling an electrode above or below...
7508022 Semiconductor device including a TCAM having a storage element formed with a DRAM  
In order to improve the discharging speed of potential from a match line, a semiconductor device includes a capacitor, a memory transistor having a source/drain region connected to a storage node...
7485914 Interdigitized capacitor  
An interdigitized capacitor comprising first and second electrodes. The first electrode comprises two combs symmetrical to a first mirror plane. The fingers of the combs extend toward the first...
7485915 Semiconductor device and method having capacitor and capacitor insulating film that includes preset metal element  
A semiconductor device includes a capacitor which includes a capacitor insulating film at least including a first insulating film and a ferroelectric film formed in contact with the first...
7485913 Semiconductor memory device and method for fabricating the same  
A semiconductor memory device includes a memory cell and a dummy cell. The amount of leakage current per unit area in a capacitor in the dummy cell is larger than that in a capacitor in the memory...
7476924 Semiconductor device having recessed landing pad and its method of fabrication  
A semiconductor device having a recessed landing pad includes a semiconductor substrate and a lower interlayer dielectric layer disposed on the semiconductor substrate. A first landing pad is...
7473955 Fabricated cylinder capacitor for a digital-to-analog converter  
A fabricated cylinder capacitor having two or more layers is provided, each layer having a bottom plate and top plate portions. A first set of vias connect the bottom plate portions and a second...
7473952 Memory cell array and method of manufacturing the same  
A memory cell array includes a plurality of active areas in which a plurality of memory cells are formed. A memory cell includes a storage capacitor, a transistor at least partially formed in a...
7456459 Design of low inductance embedded capacitor layer connections  
The present invention discloses capacitors having via connections and electrodes designed such that they provide a low inductance path, thus reducing needed capacitance, while enabling the use of...
7456463 Capacitor having electrodes at different depths to reduce parasitic capacitance  
Capacitors are disclosed having reduced parasitic capacitance. In one embodiment, the capacitor includes a first set of electrodes, each electrode of the first set extending through at least one of...
7456462 Fabricated U-shaped capacitor for a digital-to-analog converter  
A layered capacitor having top and bottom plates formed from multiple layers. The capacitor has a bottom layer comprising a bottom plate portion and at least one upper layer, each upper layer...
7456094 LDMOS transistor  
A semiconductor device comprises a semiconductor substrate, an insulating layer on top of the substrate, a lateral field effect transistor comprising a drain region and a source region arranged in...
7453114 Segmented end electrode capacitor and method of segmenting an end electrode of a capacitor  
An exemplary embodiment providing one or more improvements includes a capacitor with a segmented end electrode and methods for segmenting an end electrode of a capacitor for reducing or eliminating...
7449739 Storage capacitor for semiconductor memory cells and method of manufacturing a storage capacitor  
A capacitor for a dynamic semiconductor memory cell, a memory and method of making a memory is disclosed. In one embodiment, a storage electrode of the capacitor has a pad-shaped lower section and...
7446365 Fabricated layered capacitor for a digital-to-analog converter  
A fabricated layered capacitor having three layers is provided. The first bottom layer comprises a first bottom plate portion, the second middle layer comprises a first top plate portion, and the...
7442981 Capacitor of semiconductor device and method of fabricating the same  
Provided is a capacitor of a semiconductor device and a method of fabricating the same. In one embodiment, the capacitor includes a lower electrode formed on a semiconductor substrate; a dielectric...
7439569 Semiconductor device manufacturing method and semiconductor device  
A technique is provided which makes it possible to achieve both of a reduction in contact resistance in a memory device and a reduction in contact resistance in a logic device even when oxidation...
7423310 Charge-trapping memory cell and charge-trapping memory device  
The memory cell is arranged in a ridge of semiconductor material forming a fin with sidewalls and a channel region between source and drain regions. Memory layer sequences provided for...
7417275 Capacitor pair structure for increasing the match thereof  
A capacitor pair structure for increasing the match thereof has two finger electrode structures interlacing with each other in parallel and a common electrode being between the two finger electrode...
7413951 Stacked capacitor and method for producing stacked capacitors for dynamic memory cells  
A method produces stacked capacitors for dynamic memory cells, in which a number of trenches ( 48 ) are formed in the masking layer ( 40 ), each trench ( 48 ) being arranged above a respective...
7388243 Self-Aligned buried contact pair  
A self-aligned buried contact (BC) pair includes a substrate having diffusion regions; an oxide layer exposing a pair of diffusion regions formed on the substrate; bit lines formed between adjacent...
7385241 Vertical-type capacitor structure  
Disclosed are a vertical-type capacitor and a formation method thereof. The capacitor includes a first electrode wall and a second electrode wall perpendicular to a semiconductor substrate, and at...
7382014 Semiconductor device with capacitor suppressing leak current  
A semiconductor device with a capacitor includes a lower electrode, a dielectric and an upper electrode on the dielectric layer. The dielectric layer including more than one polycrystalline...
7378739 Capacitor and light emitting display using the same  
A capacitor including a polysilicon layer doped with impurities to be conductive, a first dielectric layer formed on the polysilicon layer, a first conductive layer formed on the first dielectric...
7375376 Semiconductor display device and method of manufacturing the same  
A semiconductor display device with an interlayer insulating film in which surface levelness is ensured with a limited film formation time, heat treatment for removing moisture does not take long,...
7361950 Integration of a MIM capacitor with a plate formed in a well region and with a high-k dielectric  
A MIM capacitor is formed on a semiconductor substrate having a top surface and including regions formed in the surface selected from a Shallow Trench Isolation (STI) region and a doped well having...
7355233 Apparatus and method for multiple-gate semiconductor device with angled sidewalls  
A multiple-gate transistor has an active region with a side that forms an interior angle with the base of the active region of less than 80°. A process for fabricating a FinFET includes the steps...
7355234 Semiconductor device including a stacked capacitor  
A stacked capacitor formed in a capacitor hole includes a bottom electrode, capacitor insulation film and a top electrode. The bottom electrode includes a plurality of islands formed on an...
7342314 Device having a useful structure and an auxiliary structure  
The present invention provides a device having a useful structure which is arranged on a substrate and has a useful structure side edge. In addition, an auxiliary structure is arranged on the...
7319254 Semiconductor memory device having resistor and method of fabricating the same  
A semiconductor device having resistors in a peripheral area and fabrication method thereof are provided. A mold layer is formed on a semiconductor substrate. The mold layer is patterned to form...
7298001 Three-dimensional capacitor structure  
A three-dimensional capacitor structure has a first conductive layer, a second conductive layer disposed above the first conductive layer, and a plug layer disposed therebetween. The first...
7265405 Method for fabricating contacts for integrated circuits, and semiconductor component having such contacts  
One (or more) contacts are produced on one or more active areas of a semiconductor wafer, it being possible for one or more isolated control lines to be arranged on the active areas with which...
7247902 Semiconductor device and method of manufacturing the same  
A semiconductor device comprises a first metal layer, which comprises a buried metal layer connected to a diffusion layer within a substrate or to a lower-layer wiring. A first metal wiring layer,...
7244982 Semiconductor device using a conductive film and method of manufacturing the same  
A semiconductor device has a capacitive element including a first conductive film formed on the bottom and wall surfaces of an opening formed in an insulating film on a substrate, a dielectric film...
7227215 Semiconductor device having a capacitor with a stepped cylindrical structure and method of manufacturing same  
According to some embodiments, a capacitor includes a storage conductive pattern, a storage electrode having a complementary member enclosing a storage conductive pattern so as to complement an...
7227183 Polysilicon conductor width measurement for 3-dimensional FETs  
An apparatus and method is disclosed for determining polysilicon conductor width for 3-dimensional field effect transistors (FinFETs). Two or more resistors are constructed using a topology in...
7224015 Method for making a stack of capacitors, in particular for dynamic random access memory [DRAM]  
The invention concerns a method which consists in forming on a substrate ( 1 ) coated with a dielectric material layer ( 3 ) provided with a window ( 3 a ), a stack of successive layers alternately...
7221013 Semiconductor device  
A semiconductor device includes: an insulating underlying layer of which surface portion has a concave portion; a lower electrode formed on the underlying layer along the inner face of the concave...
7221015 Semiconductor device and method of manufacturing the same  
There are contained first and second conductive plugs formed in first insulating layer, an island-like oxygen-barrier metal layer for covering the first conductive plug, an oxidation-preventing...
7214981 Semiconductor devices having double-sided hemispherical silicon grain electrodes  
Semiconductor devices are provided with double-sided hemispherical silicon grain (HSG) electrodes for container capacitors. In an embodiment, container capacitors for a semiconductor device have a...
7199419 Memory structure for reduced floating body effect  
Methods of reducing the floating body effect in vertical transistors are disclosed. The floating body effect occurs when an active region in a pillar is cut off from the substrate by a depletion...
Matches 1 - 50 out of 321 1 2 3 4 5 6 7 >