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7615817 Methods of manufacturing semiconductor devices and semiconductor devices manufactured using such a method  
A method of manufacturing a semiconductor device includes forming a pillar-shaped active region by etching a portion of a semiconductor substrate, forming a blocking film selectively exposing a...
7608876 Merged MOS-bipolar capacitor memory cell  
A high density vertical merged MOS-bipolar-capacitor gain cell is realized for DRAM operation. The gain cell includes a vertical MOS transistor having a source region, a drain region, and a...
7608867 Vertical IMOS transistor having a PIN diode formed within  
A vertical IMOS-type transistor including: a stack of a first semiconductor portion doped with dopant elements of a first type, of a second substantially undoped intrinsic semiconductor portion,...
7605423 Semiconductor device  
A semiconductor device includes: a semiconductor layer of a first conductivity type; a first semiconductor pillar region of the first conductivity type and a second semiconductor pillar region of a...
7598517 Superjunction trench device and method  
Semiconductor structures and methods are provided for a semiconductor device ( 40 ) employing a superjunction structure ( 41 ) and overlying trench ( 91 ) with embedded control gate ( 48 ). The...
7595524 Power device with trenches having wider upper portion than lower portion  
A field effect transistor includes a plurality of trenches extending into a silicon layer. Each trench has upper sidewalls that fan out. Contact openings extend into the silicon layer between...
7595523 Gate pullback at ends of high-voltage vertical transistor structure  
In one embodiment, a transistor includes a pillar of semiconductor material arranged in a racetrack-shaped layout having a substantially linear section that extends in a first lateral direction and...
7586130 Vertical field effect transistor using linear structure as a channel region and method for fabricating the same  
A vertical field effect transistor includes: an active region with a bundle of linear structures functioning as a channel region; a lower electrode, functioning as one of source and drain regions;...
7582924 Semiconductor devices having polymetal gate electrodes  
Semiconductor devices and methods of fabricating the same are provided. A gate insulating film is provided on a semiconductor substrate. A polymetal gate electrode is provided on the gate...
7579648 Semiconductor device having a channel pattern and method of manufacturing the same  
A semiconductor device may include a tubular channel pattern vertically extending from a semiconductor substrate. A gate insulation layer may be provided on faces exposed through the channel...
7576440 Semiconductor chip having bond pads and multi-chip package  
A semiconductor chip comprises a semiconductor substrate having integrated circuits formed on a cell region and a peripheral circuit region adjacent to each other. A bond pad-wiring pattern is...
7569878 Fabricating a memory cell array  
A DRAM memory cell array is fabricated such that, for each memory cell of the array, the gate electrode is initially produced such that it is insulated from all the other gate electrodes assigned...
7569876 DRAM arrays, vertical transistor structures, and methods of forming transistor structures and DRAM arrays  
The invention includes a method of forming a semiconductor construction. Dopant is implanted into the upper surface of a monocrystalline silicon substrate. The substrate is etched to form a...
7569450 Semiconductor capacitors in hot (hybrid orientation technology) substrates  
A semiconductor structure and a method for forming the same. The semiconductor structure includes a semiconductor substrate. The semiconductor structure further includes an electrically insulating...
7566619 Methods of forming integrated circuit devices having field effect transistors of different types in different device regions  
A method of forming an integrated circuit device includes forming a non-planar field-effect transistor in a cell array portion of a semiconductor substrate and forming a planar field-effect...
7564084 Dual-gate dynamic random access memory device having vertical channel transistors and method of fabricating the same  
A dynamic random access memory (DRAM) device has dual-gate vertical channel transistors. The device is comprised of pillar-shaped active patterns including source regions contacting with a...
7563669 Integrated circuit with a trench capacitor structure and method of manufacture  
An integrated circuit device having a capacitor structure. In one form of the invention, an integrated circuit device includes a capacitor structure formed along a surface of a semiconductor layer....
7548447 Semiconductor memory device and methods thereof  
A semiconductor memory device and methods thereof. The example semiconductor memory device may include a semiconductor substrate, a first source line and a second source line oriented in a first...
7547977 Semiconductor chip having bond pads  
In one embodiment, a semiconductor chip has one or more peripheral bond pads. The semiconductor chip comprises a semiconductor substrate having a cell region and a peripheral circuit region...
7544994 Semiconductor structure with multiple fins having different channel region heights and method of forming the semiconductor structure  
Disclosed are embodiments of a semiconductor structure with fins that are positioned on the same planar surface of a wafer and that have channel regions with different heights. In one embodiment...
7531861 Trench capacitors with insulating layer collars in undercut regions  
Trench capacitors that have insulating layer collars in undercut regions and methods of fabricating such trench capacitors are provided. Some methods of fabricating a trench capacitor include...
7528440 Vertical gain cell  
A vertical cell is realized. The cell includes a first vertical metal oxide semiconductor (MOS) transistor having a body between a drain region and a source region and a second vertical MOS...
7521752 Fin-type channel transistor and method of manufacturing the same  
It is possible to reliably implant an impurity into an impurity forming region, and to form a self-aligned silicides on the entire portion of the source and drain regions. There are provided: a...
7521747 Vertical transistor and a semiconductor integrated circuit apparatus having the same  
AMOS transistor comprises: a first conduction type region; a second conduction type drain region formed on the outermost layer portion of the first conduction type region; a second conduction type...
7521740 Semiconductor device comprising extensions produced from material with a low melting point  
A semiconductor device comprises a gate electrode ( 1 ) and a gate insulating layer ( 2 ) both surrounded by a spacer ( 3 ) and produced on a surface (S) of a substrate ( 100 ) of a first...
7518174 Memory cell and method for forming the same  
A semiconductor memory cell structure having 4F 2 dimensions and method for forming the same. The memory cell is formed on a surface of a substrate and includes an active region formed in the...
7510954 Memory array with surrounding gate access transistors and capacitors with global and staggered local bit lines  
A memory array with staggered local data/bit lines extending generally in a first direction formed in an upper surface of a substrate and memory cell access transistors extending generally upward...
7489003 Semiconductor device having a channel extending vertically  
In a semiconductor device, the semiconductor device includes a conductive structure, first insulating layers and first conductive layer patterns. The conductive structure includes a first portion,...
7485910 Simplified vertical array device DRAM/eDRAM integration: method and structure  
The present invention provides a semiconductor structure that includes an active wordline located above a semiconductor memory device and a passive wordline located adjacent to said active wordline...
7485525 Method of manufacturing a multiple port memory having a plurality of parallel connected trench capacitors in a cell  
An integrated circuit is provided which includes a memory having multiple ports per memory cell for accessing a data bit within each of a plurality of the memory cells. Such memory includes an...
7482650 Method of manufacturing a semiconductor integrated circuit device having a columnar laminate  
For improving the filling properties between vertical MISFETs constituting a SRAM memory cell, the vertical MISFETs are formed over horizontal drive MISFETs and transfer MISFETs, and they are...
7482649 Multi-bit nonvolatile memory devices  
Multi-bit nonvolatile memory devices and related methods of manufacturing the same are described. In some multi-bit nonvolatile memory devices, a semiconductor substrate has a recessed region...
7476923 Memory device and fabrication thereof  
A semiconductor memory device. A trench capacitor disposed at a lower portion of a trench in a substrate, in which the trench capacitor comprises a filling electrode layer and a collar dielectric...
7468536 Gate metal routing for transistor with checkerboarded layout  
In one embodiment, a transistor fabricated on a semiconductor die is arranged into sections of elongated transistor segments. The sections are arranged in rows and columns substantially across the...
7462902 Nonvolatile memory  
A nonvolatile memory is provided. The memory includes a select transistor and a trench transistor. The select transistor is formed on the substrate. The select transistor includes a first gate...
7462901 Field effect transistor  
A field effect transistor is provided. The field effect transistor includes a channel region, electrically conductive channel connection regions, and a control region. The electrically conductive...
7459744 Hot carrier injection programmable structure including discontinuous storage elements and spacer control gates in a trench and a method of using the same  
A programmable storage device includes a first diffusion region underlying a portion of a first trench defined in a semiconductor substrate and a second diffusion region occupying an upper portion...
7457184 Dielectric relaxation memory  
A capacitor structure having a dielectric layer disposed between two conductive electrodes, wherein the dielectric layer contains at least one charge trap site corresponding to a specific energy...
7456459 Design of low inductance embedded capacitor layer connections  
The present invention discloses capacitors having via connections and electrodes designed such that they provide a low inductance path, thus reducing needed capacitance, while enabling the use of...
7453112 Integrated circuit memory cells and methods of forming  
An integrated circuit memory cell includes a combined first capacitor electrode and first transistor source/drain, a second capacitor electrode, a capacitor dielectric between the first and second...
7453103 Semiconductor constructions  
The invention includes semiconductor structures having buried silicide-containing bitlines. Vertical surround gate transistor structures can be formed over the bitlines. The surround gate...
7442980 Anti-punch-through semiconductor device  
An anti-punch-through semiconductor device is provided. The anti-punch-through semiconductor device includes a substrate, at least an isolation region and a plurality of trench devices. The trench...
7439565 Active devices array substrate and repairing method thereof  
An active device array substrate including a substrate, a plurality of active devices, a plurality of the first lead lines, a plurality of the second lead lines and a first floating light-shielding...
7436069 Semiconductor device, having a through electrode semiconductor module employing thereof and method for manufacturing semiconductor device having a through electrode  
The layout density of the through electrodes in the horizontal plane of the substrate is enhanced. Through holes 103 extending through the silicon substrate 101 is provided. An insulating film ...
7427792 Power transistor including a leadframe and a semiconductor chip arranged on the leadframe  
A power transistor includes a leadframe and a semiconductor chip arranged on the leadframe. The top side of the semiconductor chip has a drain contact-making layer, and the underside of the...
7420245 Semiconductor device and method of manufacturing the same  
A first semiconductor pillar layer of a first conductivity type is formed on a main surface of a semiconductor substrate of the first conductivity type. A second semiconductor pillar layer of a...
7420230 MOSFET-type semiconductor device, and method of manufacturing the same  
A MOSFET-type semiconductor device includes a monocrystalline semiconductor layer formed in a shape of a thin wall on a insulating film, a gate electrode straddling over the semiconductor layer...
7416952 Method for producing a dielectric interlayer and storage capacitor with such a dielectric interlayer  
A dielectric interlayer, especially for a storage capacitor, is formed from a layer sequence subjected to a temperature process, wherein the layer sequence has at least a first metal oxide layer...
7412896 Filter change indicator  
A fluid system pressure indicator is adapted for use in fluid systems having a filter element. The fluid system force indicator includes a housing partitioned to be exposed to the fluid system to...
7408215 Dynamic random access memory  
A DRAM structure on a silicon substrate has an active area, gate conductors, deep trench capacitors, and vertical transistors. The deep trench capacitors are formed at intersections of the active...
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