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7205567 |
Semiconductor product having a semiconductor substrate and a test structure and method
A semiconductor product having a test structure, in which a contact connection short-circuits that source/drain region of a transistor which is connected to an inner capacitor electrode of a trench...
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7199414 |
Stress-reduced layer system for use in storage capacitors
The stress-reduced layer system has at least one first layer of polycrystalline or single-crystal semiconductor material, which adjoins a microcrystalline or amorphous, conducting or insulating...
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7199417 |
Merged MOS-bipolar capacitor memory cell
A high density vertical merged MOS-bipolar-capacitor gain cell is realized for DRAM operation. The gain cell includes a vertical MOS transistor having a source region, a drain region, and a...
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7199415 |
Conductive container structures having a dielectric cap
Container structures for use in integrated circuits and methods of their manufacture. The container structures have a dielectric cap on the top of a conductive container to reduce the risk of...
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7199416 |
Systems and methods for a memory and/or selection element formed within a recess in a metal line
The subject invention provides systems and methodologies for fabrication of memory and/or selection (e.g., diodes) elements in a recession in a semiconductor layer. In particular, a trench of...
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7196368 |
Semiconductor memory arrangements with crown shaped capacitor arrangements trenched in interlayer dielectric film
A capacitor consisting of a storage electrode ( 19 ), a capacitor dielectric film ( 20 ) and a plate electrode ( 21 ) is formed in a trench formed through dielectric films ( 6, 8, 10 and 12 )...
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7195973 |
Method for fabricating a trench capacitor with an insulation collar and corresponding trench capacitor
The present invention provides a method for fabricating a trench capacitor with an insulation collar in a substrate, which is electrically connected to the substrate on one side via a buried...
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7195972 |
Trench capacitor DRAM cell using buried oxide as array top oxide
A trench capacitor DRAM cell in an SOI wafer uses the silicon device layer in the array as part of passing wordlines, stripping the silicon device layer in the array outside the wordlines and uses...
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7193261 |
Quantum supercapacitor
A quantum supercapacitor having nanostrucutured material located between electrodes. The material includes clusters with tunnel-transparent gaps. The clusters have sizes within the range of 7.2517...
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7176511 |
Semiconductor memory device and method of manufacturing the same
A semiconductor memory device includes a first insulation film which is provided on the inner surface of a trench formed in a semiconductor substrate and has its top located above the surface of...
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7170125 |
Capacitor with electrodes made of ruthenium and method for patterning layers made of ruthenium or ruthenium
A method for patterning layers made of ruthenium or ruthenium(IV) oxide and a capacitor comprising at least one electrode which is constructed from ruthenium or ruthenium(IV) oxide at least in...
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7169663 |
Semiconductor device with rare metal electrode
A method of manufacturing a semiconductor device, includes the steps of: (a) forming a first inter-level insulating film on a semiconductor substrate formed with semiconductor elements; (b) forming...
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7161205 |
Semiconductor memory device with cylindrical storage electrode and method of manufacturing the same
There are provided a semiconductor memory device including a cylindrical storage electrode and a method of manufacturing the same. The semiconductor memory device includes an interlevel dielectric...
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7151290 |
Semiconductor memory device and method of manufacturing the same
A semiconductor device includes a conductive film that is filled in a trench formed in a semiconductor substrate via a first insulating film. The conductive film has a first portion and a second...
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7148578 |
Semiconductor multi-chip package
A semiconductor chip comprises a semiconductor substrate having integrated circuits formed on a cell region and a peripheral circuit region adjacent to each other. A bond pad-wiring pattern is...
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7144769 |
Method to achieve increased trench depth, independent of CD as defined by lithography
A method of forming at least one deep trench structure having an increased trench depth is provided. The method includes providing at least one deep trench having sidewalls that extend to a common...
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7145220 |
Fin semiconductor device and method for fabricating the same
A semiconductor device includes second to fourth semiconductor layers, a gate electrode, and an insulating film. The second semiconductor layer is formed on a first semiconductor layer and has a...
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7144772 |
Semiconductor devices having capacitors of metal-insulator-metal structure with coextensive oxidation barrier pattern and lower electrode bottom and methods of forming the same
A semiconductor device having MIM capacitors is configured so that the bottom surface of the lower electrode and a top surface area of an oxidation barrier pattern are substantially equal. Related...
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7145197 |
Semiconductor device and method of manufacturing the same
A semiconductor device includes a semiconductor substrate, a trench formed in the semiconductor substrate, an island-like element region formed in the semiconductor substrate, having an upper...
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7141845 |
DRAM cell array and memory cell arrangement having vertical memory cells and methods for fabricating the same
Memory cells each having a cell capacitor and a cell transistor, which are arranged in a vertical cell structure, are provided in the cell array of a DRAM. By means of a deep implantation or a...
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7141846 |
Semiconductor storage device and method for manufacturing the same
There is disclosed a semiconductor storage device comprising a trench capacitor wherein a high dielectric-constant insulator is used and formation of a depletion layer in a capacitor electrode is...
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7141482 |
Method of making a memory cell
Methods of making memory devices/cells are disclosed. First and second electrode layers and a controllably conductive media therebetween are formed over a dielectric layer that has a planar surface...
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7138676 |
Semiconductor device and manufacturing the same having multiple trenches formed in plural element regions or trench groups
A semiconductor device in which a plurality of rows are set along an X direction and a plurality of columns are set along a Y direction orthogonal to the X direction, comprises a first element...
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7138338 |
Method and composite hard mask for forming deep trenches in a semiconductor substrate
A method and structure for forming deep trenches in a semiconductor substrate is provided. The method comprises: providing a semiconductor substrate; forming a pad oxide layer on the semiconductor...
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7135731 |
Vertical DRAM and fabrication method thereof
A vertical DRAM and fabrication method thereof. The vertical DRAM has a plurality of memory cells on a substrate, and each of the memory cells has a trench capacitor, a vertical transistor, and a...
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7129133 |
Method and structure of memory element plug with conductive Ta removed from sidewall at region of memory element film
Disclosed are methods and structures for fabrication of reliable and efficient memory cells. The methods involve formation of a conformal diffusion barrier layer in a via, deposition of an...
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7129130 |
Out of the box vertical transistor for eDRAM on SOI
The present invention provides a vertical memory device formed in a silicon-on-insulator substrate, where a bitline contacting the upper surface of the silicon-on-insulator substrate is...
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7129535 |
Capacitor constructions
The invention includes methods in which metal oxide dielectric materials are deposited over barrier layers. The barrier layers can comprise compositions of metal and one or more of carbon, boron...
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7126178 |
Semiconductor device and its manufacturing method
A semiconductor device comprises a semiconductor substrate; a trench formed in the semiconductor substrate or in a layer deposited on the semiconductor substrate; a first conductive layer deposited...
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7126181 |
Capacitor constructions
The invention includes methods of forming circuit devices. A metal-containing material comprising a thickness of no more than 20 Å (or alternatively comprising a thickness resulting from no more...
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7126154 |
Test structure for a single-sided buried strap DRAM memory cell array
A test structure for determining the electrical properties of a memory cell in a matrix-like cell array constructed on the basis of the single-sided buried strap concept has a connection between...
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7122855 |
Semiconductor memory device and method of manufacturing the same
A semiconductor memory device includes a trench formed in the semiconductor substrate, a diffusion layer for a first electrode formed within the semiconductor substrate so as to be in contact with...
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7119390 |
Dynamic random access memory and fabrication thereof
A dynamic random access memory (DRAM) cell is described, including a semiconductor pillar on a substrate, a capacitor on a lower portion of a sidewall of the pillar, and a vertical transistor on an...
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7118956 |
Trench capacitor and a method for manufacturing the same
A trench capacitor comprises a semiconductor substrate, a trench, formed in the semiconductor substrate, having upper and lower portions, a first doped polysilicon layer filled in the lower portion...
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7115935 |
Embedded DRAM for metal-insulator-metal (MIM) capacitor structure
A method for fabricating a metal-insulator-metal capacitor in an embedded DRAM process is described. A plurality of contact plugs are provided through an insulating layer to semiconductor device...
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7115932 |
Semiconductor device incorporating an electrical contact to an internal conductive layer and method for making the same
A semiconductor device and its method of fabrication are provided. The semiconductor device includes a substrate, a patterning stop region, an insulating overlayer, a container region within the...
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7115934 |
Method and structure for enhancing trench capacitance
A trench capacitor formed with a bottle etch step has a polygonal cross section produced by forming thermally oxidizing the trench walls with thinner oxide at the corners of the trench, then...
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7115933 |
Integrated circuit and fabrication process
An integrated circuit has at least one semiconductor device for storing charge that includes at least one elementary active component and at least one elementary storage capacitor. The device...
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7115944 |
Semiconductor device
A semiconductor device of the present invention has an insulating gate type field effect transistor portion having an n-type emitter region ( 3 ) and an n − silicon substrate ( 1 ), which are...
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7112822 |
Semiconductor device using partial SOI substrate and manufacturing method thereof
A semiconductor device includes a first semiconductor layer formed above a first region of a supporting substrate with a buried oxide layer disposed therebetween and a second semiconductor layer...
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7109544 |
Architecture for vertical transistor cells and transistor-controlled memory cells
In a substrate vertical transistor cells are formed and are arranged, in a transistor cell array, row by row in an x direction and column by column in a y direction. Lower source/drain regions of...
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7109542 |
Capacitor constructions having a conductive layer
A capacitor fabrication method may include atomic layer depositing a conductive barrier layer to oxygen diffusion over the first electrode. A method may instead include chemisorbing a layer of a...
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7109543 |
Semiconductor device having trench capacitor and method for fabricating the same
A semiconductor device and a method for fabricating the same. The device comprises a silicon substrate having a conductive well; a trench formed in the conductive well; a plate electrode formed on...
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7102184 |
Image device and photodiode structure
The invention provides a photodiode with an increased charge collection area, laterally spaced from an adjacent isolation region. Dopant ions of a first conductivity type with a first impurity...
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7102204 |
Integrated SOI fingered decoupling capacitor
The invention provides a fingered decoupling capacitor in the bulk silicon region that are formed by etching a series of minimum or sub-minimum trenches in the bulk silicon region, oxidizing these...
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7098497 |
Semiconductor device using high-dielectric-constant material and method of manufacturing the same
A semiconductor device includes a MOS transistor, interlayer dielectric film, first and second high-dielectric-constant films, and first and second conductive films. The MOS transistor is formed on...
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7098102 |
Shallow trench isolation structure and dynamic random access memory, and fabricating methods thereof
A method for fabricating a shallow trench isolation (STI) structure is described. A patterned mask layer is formed on a substrate. An ion implantation is performed to form a doped region in a...
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7094660 |
Method of manufacturing trench capacitor utilizing stabilizing member to support adjacent storage electrodes
A semiconductor device has a stabilizing member that encloses an upper portion of a storage electrode to improve structural stability. A dielectric layer and a plate electrode are successively...
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7091545 |
Memory device and fabrication method thereof
A memory device and fabricating method thereof. In the memory device of the present invention, a substrate has a plurality of deep trenches, wherein the deep trenches formed in the adjacent rows...
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7091544 |
Trench capacitor dynamic random access memory featuring structurally independent symmetric active areas
A dynamic random access memory structure is provided, each active area of a memory unit cell is distributed individually in a substrate, and deep trench patterns are designed to have a...
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