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7627840 |
Method for soft error modeling with double current pulse
A method of modeling soft errors in a logic circuit uses two separate current sources inserted at the source and drain of a device to simulate a single event upset (SEU) caused by, e.g., an...
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7612819 |
CMOS image sensor and method of operating the same
A complementary metal oxide semiconductor (CMOS) image sensor and a method for operating the same are provided. The CMOS image sensor includes a pixel array unit having a matrix of pixels, wherein...
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7612397 |
Memory cell having first and second capacitors with electrodes acting as control gates for nonvolatile memory transistors
A nonvolatile memory cell that can be mounted in a CMOS manufacturing process, and is capable of implementing high level of programming, reading and erasing ability. The memory cell is configured...
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7592642 |
Thyristor-based semiconductor device with indium-carbon implant and method of fabrication
A thyristor-based memory device may comprise two base regions of opposite type conductivity formed between a cathode-emitter region and an anode-emitter region. A junction defined between the...
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7592577 |
Self-triggering CMOS imaging array utilizing guard region structures as light detectors
A camera having an exposure detector is disclosed. The camera includes an array of pixel sensors, CMOS circuitry that is separate from the array of pixel sensors, a guard region, and a current...
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7573084 |
Non-volatile semiconductor memory device and method for fabricating the same
According to an aspect of the present invention, there is provided a non-volatile semiconductor memory device, including a ferroelectric capacitor being stacked a first electrode, a ferroelectric...
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7569915 |
Shielding arrangement to protect a circuit from stray magnetic fields
A shielding arrangement for protecting a circuit containing magnetically sensitive materials from external stray magnetic fields. A shield of a material having a relatively high permeability is...
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7531861 |
Trench capacitors with insulating layer collars in undercut regions
Trench capacitors that have insulating layer collars in undercut regions and methods of fabricating such trench capacitors are provided. Some methods of fabricating a trench capacitor include...
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7528468 |
Capacitor assembly with shielded connections and method for forming the same
A capacitor assembly ( 82 ) is formed on a substrate ( 20 ). The capacitor assembly a first conductive plate ( 38 ) and a second conductive plate ( 60 ) formed over the substrate such that the...
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7514737 |
Semiconductor memory device
In a full CMOS SRAM having a lateral type cell (memory cell having three partitioned wells arranged side by side in a word line extending direction and longer in the word line direction than in the...
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7509541 |
Detection mechanism
A computer apparatus includes a first integrated circuit (IC) and a second IC. The second IC includes a soft error rate (SER) immune component and a SER component to detect radiation that could...
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7485915 |
Semiconductor device and method having capacitor and capacitor insulating film that includes preset metal element
A semiconductor device includes a capacitor which includes a capacitor insulating film at least including a first insulating film and a ferroelectric film formed in contact with the first...
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7482211 |
Junction leakage reduction in SiGe process by implantation
A method for forming a semiconductor device is provided. The method includes providing a semiconductor substrate, forming a gate dielectric over the semiconductor substrate, forming a gate...
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7468297 |
Method of manufacturing semiconductor device
A method of manufacturing semiconductor device comprising forms a first impurity diffusion region as a lower electrode of a capacitor in a first area of a semiconductor substrate by implanting...
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7459741 |
Semiconductor memory device
A semiconductor memory device excellent in data holding characteristics even when a cell area is reduced is disclosed. According to one aspect of the present invention, a semiconductor memory...
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7459731 |
Device containing isolation regions with threading dislocations
An article of manufacture includes a substrate, a relaxed buffer layer disposed on the substrate, and a plurality of isolation regions formed in the relaxed buffer layer. The isolation regions...
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7456459 |
Design of low inductance embedded capacitor layer connections
The present invention discloses capacitors having via connections and electrodes designed such that they provide a low inductance path, thus reducing needed capacitance, while enabling the use of...
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7414279 |
Semiconductor device with improved overlay margin and method of manufacturing the same
Semiconductor devices with an improved overlay margin and methods of manufacturing the same are provided. In one aspect, a method includes forming a buried bit line in a substrate; forming an...
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7411238 |
Semiconductor integrated circuit device and a method of manufacturing the same
In order to improve the soft error resistance of a memory cell of an SRAM without increasing its chip size in deep through-holes formed by perforating a silicon oxide film, there is a silicon...
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7388274 |
Capacitor below the buried oxide of SOI CMOS technologies for protection against soft errors
Disclosed is a semiconductor structure that incorporates a capacitor for reducing the soft error rate of a device within the structure. The multi-layer semiconductor structure includes an...
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7378739 |
Capacitor and light emitting display using the same
A capacitor including a polysilicon layer doped with impurities to be conductive, a first dielectric layer formed on the polysilicon layer, a first conductive layer formed on the first dielectric...
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7375376 |
Semiconductor display device and method of manufacturing the same
A semiconductor display device with an interlayer insulating film in which surface levelness is ensured with a limited film formation time, heat treatment for removing moisture does not take long,...
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7332390 |
Semiconductor memory device and fabrication thereof
A semiconductor memory device and fabrication method thereof. In a semiconductor memory device, each memory cell comprises a deep trench and a capacitor disposed on the lower portion thereof. A...
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7323708 |
Phase change memory devices having phase change area in porous dielectric layer
A phase change memory device includes a lower electrode and a porous dielectric layer having fine pores on the lower electrode. A phase change layer is provided in the fine pores of the porous...
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7319254 |
Semiconductor memory device having resistor and method of fabricating the same
A semiconductor device having resistors in a peripheral area and fabrication method thereof are provided. A mold layer is formed on a semiconductor substrate. The mold layer is patterned to form...
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7307304 |
Ferroelectric materials and ferroelectric memory device made therefrom
A ferroelectric material includes a compound of formula (I):
(Pb 1−x−z Ba z A x )(B y Zr 1−y )O 3 , (I)
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7301219 |
Electrically erasable programmable read only memory (EEPROM) cell and method for making the same
An asymmetrically doped memory cell has first and second N+ doped junctions on a P substrate. A composite charge trapping layer is disposed over the P substrate and between the first and the second...
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7288806 |
DRAM arrays
The invention includes memory arrays, and methods which can be utilized for forming memory arrays. A patterned etch stop can be used during memory array fabrication, with the etch stop covering...
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7262107 |
Capacitor structure for a logic process
A manufacturing process modification is disclosed for producing a metal-insulator-metal (MIM) capacitor. The MIM capacitor may be used in memory cells, such as DRAMs, and may also be integrated...
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7256437 |
Semiconductor storage device which includes a hydrogen diffusion inhibiting layer
The upper electrode of a capacitor is constituted of laminated films which act to prevent hydrogen atoms from reaching the capacitor electrodes and degrading performance. In one example, a four...
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7244982 |
Semiconductor device using a conductive film and method of manufacturing the same
A semiconductor device has a capacitive element including a first conductive film formed on the bottom and wall surfaces of an opening formed in an insulating film on a substrate, a dielectric film...
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7235837 |
Technique to control tunneling currents in DRAM capacitors, cells, and devices
Structures and methods are provided for the use with PMOS devices. Materials with large electron affinities or work functions are provided for structures such as gates. A memory cell is provided...
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7208794 |
High-density NROM-FINFET
Semiconductor memory having memory cells, each including first and second conductively-doped contact regions and a channel region arranged between the latter, formed in a web-like rib made of...
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7208788 |
Semiconductor device and manufacturing method thereof
A semiconductor device and a manufacturing method thereof in which the peripheral length of an aperture and the mechanical strength of cylinders in a cell can be increased without changing the...
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7202538 |
Ultra low leakage MOSFET transistor
A MOSFET transistor structure is formed in a substrate of semiconductor material having a first conductivity type. The MOSFET transistor structure includes an active region that is surrounded by a...
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7199415 |
Conductive container structures having a dielectric cap
Container structures for use in integrated circuits and methods of their manufacture. The container structures have a dielectric cap on the top of a conductive container to reduce the risk of...
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7145187 |
Substrate independent multiple input bi-directional ESD protection structure
In a multiple input ESD protection structure, the inputs are isolated from the substrate by highly doped regions of opposite polarity to the input regions. Dual polarity is achieved by providing a...
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7126177 |
Semiconductor memory device, semiconductor device, and method for production thereof
Disclosed are a semiconductor memory device, a semiconductor device, and a method for production thereof. The semiconductor memory device and semiconductor device do not need for a distance for...
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7119379 |
Semiconductor device
A semiconductor device disclosed herein comprises: a first base region which is of a first conductivity type; a second base region which is of a second conductivity type and which is selectively...
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7098520 |
Semiconductor memory device having pick-up structure
A semiconductor memory device includes a first transistor area doped by a first-type dopant for having a plurality of second-type transistors; a second transistor area doped by a second-type dopant...
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7098100 |
Trench capacitor and method for preparing the same
The present invention discloses a trench capacitor formed in a trench in a semiconductor substrate. The trench capacitor comprises a bottom electrode positioned on a lower outer surface of the...
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7091102 |
Methods of forming integrated circuit devices having a capacitor with a hydrogen barrier spacer on a sidewall thereof and integrated circuit devices formed thereby
An integrated circuit device is formed by providing a substrate and forming a capacitor on the substrate. The capacitor includes a lower electrode disposed on the substrate, a dielectric layer on...
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7075122 |
Thyristor device with carbon lifetime adjustment implant and its method of fabrication
In a method of fabricating a semiconductor memory device, a thyristor may be formed in a layer of semiconductor material. Carbon may be implanted and annealed in a base-emitter junction region for...
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7064370 |
Method for manufacturing semiconductor device and the device thereof
The present invention relates to a method of manufacturing a semiconductor device. The method comprises the steps of forming a plurality of lower bit lines arranged in a first direction on a...
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7053433 |
Encapsulated ferroelectric array
A ferroelectric layer within an array of ferroelectric FETs is encapsulated between a bottom barrier dielectric layer and a top barrier dielectric layer extending beyond the ferroelectric layer....
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7045847 |
Semiconductor device with high-k gate dielectric
An integrated circuit includes a substrate, a first transistor, and a second transistor. The first transistor has a first gate dielectric portion located between a first gate electrode and the...
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7045845 |
Self-aligned vertical gate semiconductor device
A transistor ( 10 ) is formed in a semiconductor substrate ( 12 ) whose top surface ( 48 ) is formed with a pedestal structure ( 24 ). A conductive material ( 40 ) is disposed along a side surface...
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7027322 |
EPIR device and semiconductor devices utilizing the same
There is provided an EPIR device which is excellent in mass productivity and high in practical utility. The EPIR device includes a lower electrode layer, a CMR thin film layer and an upper...
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7019347 |
Dynamic random access memory circuitry comprising insulative collars
A method of forming a conductive contact to a conductive structure includes forming a conductive structure received within and projecting outwardly from a first insulative material. A second...
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6979851 |
Structure and method of vertical transistor DRAM cell having a low leakage buried strap
A structure and method is disclosed herein for a vertical transistor DRAM cell having a low leakage buried strap outdiffusion conductively connecting a storage capacitor in a lower portion of a...
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