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Match Document Document Title
7619311 Memory cell device with coplanar electrode surface and method  
A memory device described herein includes a bit line having a top surface and a plurality of vias. The device includes a plurality of first electrodes each having top surfaces coplanar with the top...
7619270 Electronic device including discontinuous storage elements  
An electronic device can include discontinuous storage elements that lie within a trench. The electronic device can include a substrate including a trench that includes a wall and a bottom and...
7619269 Semiconductor device, manufacturing process thereof and imaging device  
A semiconductor device including a pixel region in which one or more pixels are formed and a DRAM cell region in which one or more DRAM cells for storing output signals from the pixels are formed,...
7618874 Methods of forming capacitors  
A method of forming a capacitor includes providing material having an opening therein over a node location on a substrate. A shield is provided within and across the opening, with a void being...
7618850 Method of making a diode read/write memory cell in a programmed state  
A method of making a nonvolatile memory device includes fabricating a diode in a low resistivity, programmed state without an electrical programming step. The memory device includes at least one...
7615815 Cell region layout of semiconductor device and method of forming contact pad using the same  
A cell region layout of a semiconductor device formed by adding active regions in the outermost portion of a cell region, and a method of forming a contact pad using the same are provided. The...
7615814 Ferroelectric device having a contact for taking the potential of a metal film and a plurality of capacitors positioned periodically  
A semiconductor memory device includes: a first conductive layer; a second conductive layer; a first insulating film; a first plug; a second plug; a second insulating film having a first opening...
7613027 Semiconductor memory device with dual storage node and fabricating and operating methods thereof  
A semiconductor memory device with a dual storage node structure as well as methods of fabricating and operating such a device are provided. The semiconductor memory device includes a substrate, a...
7612411 Dual-gate device and method  
A memory circuit having dual-gate memory cells and a method for fabricating such a memory circuit are disclosed. The dual-gate memory cells each include a memory device and an access device sharing...
7612397 Memory cell having first and second capacitors with electrodes acting as control gates for nonvolatile memory transistors  
A nonvolatile memory cell that can be mounted in a CMOS manufacturing process, and is capable of implementing high level of programming, reading and erasing ability. The memory cell is configured...
7608898 One transistor DRAM cell structure  
A one-transistor dynamic random access memory (DRAM) cell includes a transistor which has a first source/drain region, a second source/drain region, a body region between the first and second...
7608879 Semiconductor device including a capacitance  
It is an object to obtain a semiconductor device including a capacitance having a great Q-value. In an SOI substrate comprising a support substrate ( 165 ), a buried oxide film ( 166 ) and an SOI...
7608878 Semiconductor device manufactured with a double shallow trench isolation process  
A method for manufacturing a semiconductor device includes forming a device isolation film by a double Shallow Trench Isolation (STI) process, forming a first active region having a negative slope...
7608877 Circuit device having capacitor and field effect transistor, and display apparatus therewith  
In a circuit device having a field effect transistor and a capacitor, the capacitor is connected to at least one of a gate electrode, a source electrode and a drain electrode of a field effect...
7608876 Merged MOS-bipolar capacitor memory cell  
A high density vertical merged MOS-bipolar-capacitor gain cell is realized for DRAM operation. The gain cell includes a vertical MOS transistor having a source region, a drain region, and a...
7605418 Methods of fabricating capacitor  
A fabricating method of a capacitor is disclosed. Particularly, a fabricating method of a capacitor which forms a capacitor in the place where the insulation layer of an STI region is removed,...
7605034 Integrated circuit memory cells and methods of forming  
An integrated circuit memory cell includes a combined first capacitor electrode and first transistor source/drain, a second capacitor electrode, a capacitor dielectric between the first and second...
7602001 Capacitorless one transistor DRAM cell, integrated circuitry comprising an array of capacitorless one transistor DRAM cells, and method of forming lines of capacitorless one transistor DRAM cells  
This invention includes a capacitorless one transistor DRAM cell that includes a pair of spaced source/drain regions received within semiconductive material. An electrically floating body region is...
7601995 Integrated circuit having resistive memory cells  
A memory includes an array of memory cells, each memory cell including resistive material, a first insulation material laterally surrounding the resistive material of each memory cell, and a heat...
7601630 Semiconductor device and method for fabricating the same  
A method of fabricating a semiconductor memory device and a structure that forms both a resistor and an etching protection layer to reduce a contact resistance. The method of fabricating a...
7598575 Semiconductor die with reduced RF attenuation  
The attenuation of an RF signal on a metal trace in a semiconductor die is substantially reduced by utilizing a number of RF blocking structures that lie on the surface of the substrate directly...
7598559 Semiconductor storage device, manufacturing method therefor, and portable electronic equipment  
A semiconductor storage device has a semiconductor layer having a first conductivity type region and two second conductivity type regions separated from each other by the first conductivity type...
7598558 Method of manufacturing semiconductor integrated circuit device having capacitor element  
In a complete CMOS SRAM having a memory cell composed of six MISFETs formed over a substrate, a capacitor element having a stack structure is formed of a lower electrode covering the memory cell,...
7598557 Semiconductor device and method for fabricating a semicondutor device including first and second hydrogen diffusion preventing films  
The semiconductor device comprises a first insulation film 26 formed over a semiconductor substrate 10, first conductor plug 32 buried in a first contact hole 28 a formed down to a...
7598543 Semiconductor memory component with body region of memory cell having a depression and a graded dopant concentration  
A semiconductor memory component comprises at least one memory cell. The memory cell comprises a semiconductor body comprised of a body region, a drain region and a source region, a gate...
7595521 Terraced film stack  
A process and apparatus directed to forming a terraced film stack of a semiconductor device, for example, a DRAM memory device, is disclosed. The present invention addresses etch undercut resulting...
7595203 Ferroelectric memory device with a conductive polymer layer and a method of formation  
A ferroelectric memory device and a method of formation are disclosed. In one particular embodiment, a ferroelectric memory device comprises a first electrode layer formed on a substrate, a...
7592661 CMOS embedded high voltage transistor  
A circuit having a high voltage, drain-extended (DE) metal-oxide-semiconductor (MOS) transistor and method for fabricating the same are provided. Generally, the circuit includes an n-channel (NMOS)...
7592659 Field effect transistor and an operation method of the field effect transistor  
A field effect transistor includes a silicon substrate, a source electrode and a drain electrode which are formed in upper portions of the silicon substrate, and an insulator film, a PCMO film, and...
7592658 Method of forming a semiconductor device having a capacitor and a resistor  
A semiconductor device comprising the following. A structure having: a capacitor; a first resistor; and a second resistor each within at least a portion of an oxide structure and a metal-oxide...
7592657 Semiconductor device and method of manufacturing the same  
According to the present invention, a method of fabricating a semiconductor device is provided including forming a first interlayer insulating film 11 , a crystalline conductive film 21 , a first...
7592656 Semiconductor device and fabricating method of the same  
An Al 2 O 3 film with a thickness greater than that of a wiring is formed as a protective film, and then the Al 2 O 3 film is polished by CMP until a conductive barrier film is exposed. Namely,...
7592626 Capacitor and method of manufacturing same  
A capacitor comprises: a lower electrode formed of a foil made of a polycrystalline metal; an upper conductor layer; and a dielectric layer disposed between the lower electrode and the upper...
7592220 Capacitance process using passivation film scheme  
In accordance with the objectives of the invention a new method and structure is provided for the creation of a capacitor. A contact pad and a lower capacitor plate have been provided over a...
7589369 Semiconductor constructions  
The invention includes a method in which a semiconductor substrate is provided to have a memory array region, and a peripheral region outward of the memory array region. Paired transistors are...
7589368 Three-dimensional memory devices  
Memory devices are disclosed. One example of a memory device may include two layers of memory arrays each containing at least four memory cells. In particular, the memory device includes two word...
7589367 Layout structure in semiconductor memory device comprising global work lines, local work lines, global bit lines and local bit lines  
A line layout structure and method in a semiconductor memory device having a hierarchical structure are provided. In a semiconductor memory device having a global word line and a local word line,...
7586121 Electroluminescence device having stacked capacitors  
An electroluminescence (EL) device includes a substrate and a plurality of pixels formed on the substrate. Each pixel includes a first area including at least a first capacitor and a second...
7582925 Integrated circuit devices including insulating support layers  
An integrated circuit device may include a substrate, a plurality of storage electrode landing pads on the substrate, and a plurality of storage electrodes. Each of the plurality of storage...
7582924 Semiconductor devices having polymetal gate electrodes  
Semiconductor devices and methods of fabricating the same are provided. A gate insulating film is provided on a semiconductor substrate. A polymetal gate electrode is provided on the gate...
7582902 Raw material carbon composition for carbon material for electrode in electric double layer capacitor  
The present invention provides a raw material carbon composition that is converted to a carbon material for an electrode in an electric double layer capacitor that can develop a high level of...
7579643 Capacitor having high electrostatic capacity, integrated circuit device including the capacitor and method of fabricating the same  
A capacitor may include a first electrode, a second electrode, a low dielectric layer, and/or a high dielectric layer. The first electrode may include at least one first electrode branch. The...
7579234 Method for fabricating memory device with recess channel MOS transistor  
A method for fabricating line type recess channel MOS transistors utilizes a lithography process to form line type gate trenches in the line type recess channel MOS transistors before finishing a...
7576390 System for vertical DMOS with slots  
A method for providing a high power, low resistance, high efficient vertical DMOS device is disclosed. The method comprises providing a semiconductor substrate with a source body structure thereon....
7576389 Semiconductor device and manufacture method thereof  
The present invention provides a trench gate Tr having a first gate electrode and a second gate electrode in the inside of a groove. The first gate electrode is provided in a groove lower part...
7576379 Floating body dynamic random access memory with enhanced source side capacitance  
A floating body dynamic random access memory (DRAM) structure has a shallow source (first source portion) and a deep source (second source portion), of which the deep source is thicker. A portion...
7573085 Deep trench formation in semiconductor device fabrication  
A semiconductor structure. The structure includes (a) a semiconductor substrate; (b) a hard mask layer on top of the semiconductor substrate; and (c) a hard mask layer opening in the hard mask...
7571651 Capacitive pressure sensor and method for fabricating the same  
A method for producing a capacitive pressure sensor is comprised steps of: etching front surface and depositing etching stopper on a rear surface of a silicon substrate; depositing an upper...
7569912 Differential variable capacitors and their applications  
An integrated circuit design for differential variable capacitors uses an integration method to integrate an integrated circuit having differential variable capacitors as a whole, and takes the...
7569877 System and method based on field-effect transistors for addressing nanometer-scale devices  
A system and method for selecting nanometer-scaled devices. The method includes a plurality of semiconductor wires. Two adjacent semiconductor wires of the plurality of semiconductor wires are...
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