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7459747 |
Nonvolatile semiconductor memory device and manufacturing method of the same
The invention realizes a smaller-sized OTP memory cell and large reduction of its manufacturing process and cost. An embedded layer (BN+) to be a lower electrode of a capacitor is formed in a drain...
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7459742 |
Method of manufacturing sidewall spacers on a memory device, and device comprising same
The present invention is generally directed to a method of manufacturing sidewall spacers on a memory device, and a memory device comprising such sidewall spacers. In one illustrative embodiment,...
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7456455 |
Semiconductor memory device and method for fabricating the same
A semiconductor memory device comprises: a first interlayer insulating film formed on a semiconductor substrate; a capacitor formed above the first interlayer insulating film and composed of a...
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7456459 |
Design of low inductance embedded capacitor layer connections
The present invention discloses capacitors having via connections and electrodes designed such that they provide a low inductance path, thus reducing needed capacitance, while enabling the use of...
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7456458 |
Dynamic random access memory structure
A dynamic random access memory structure having a vertical floating body cell includes a semiconductor substrate having a plurality of cylindrical pillars, an upper conductive region positioned on...
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7456463 |
Capacitor having electrodes at different depths to reduce parasitic capacitance
Capacitors are disclosed having reduced parasitic capacitance. In one embodiment, the capacitor includes a first set of electrodes, each electrode of the first set extending through at least one of...
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7456469 |
Semiconductor device having cell transistor with recess channel structure
The present invention provides a semiconductor device comprising: a dual-gate peripheral transistor having a transistor structure of surface channel nMOSFET and a transistor structure of surface...
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7456457 |
Layout of semiconductor memory device and method of controlling capacitance of dummy cell
Provided are a layout of a semiconductor memory device capable of minimizing an occupation area of a dummy cell array and a method of controlling capacitance of a dummy cell to be same with that of...
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7456462 |
Fabricated U-shaped capacitor for a digital-to-analog converter
A layered capacitor having top and bottom plates formed from multiple layers. The capacitor has a bottom layer comprising a bottom plate portion and at least one upper layer, each upper layer...
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7452779 |
Semiconductor devices having improved gate insulating layers and related methods of fabricating such devices
Semiconductor devices are provided on a substrate having a cell array region and a peripheral circuit region. A first device isolation layer defines a cell active region in the cell array region...
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7453111 |
Phase-change memory device
Disclosed is a phase-change memory device including a phase-change material pattern, a diffusion barrier layer, a bottom electrode and a top electrode. The phase-change material pattern is placed...
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7453112 |
Integrated circuit memory cells and methods of forming
An integrated circuit memory cell includes a combined first capacitor electrode and first transistor source/drain, a second capacitor electrode, a capacitor dielectric between the first and second...
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7449740 |
Semiconductor memory device having capacitors and method for forming the same
A semiconductor substrate has a cell region and a peripheral circuit region surrounding the cell region. In the cell region a plurality of lower electrodes are connected to a conductive region of...
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7449382 |
Memory device and fabrication method thereof
A memory device is disclosed. A substrate is provided. A plurality of pillars is disposed on the substrate. Each pillar has a plurality of epitaxial layers, has a first sidewall and a second...
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7449739 |
Storage capacitor for semiconductor memory cells and method of manufacturing a storage capacitor
A capacitor for a dynamic semiconductor memory cell, a memory and method of making a memory is disclosed. In one embodiment, a storage electrode of the capacitor has a pad-shaped lower section and...
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7446365 |
Fabricated layered capacitor for a digital-to-analog converter
A fabricated layered capacitor having three layers is provided. The first bottom layer comprises a first bottom plate portion, the second middle layer comprises a first top plate portion, and the...
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7446364 |
Semiconductor memory device including multi-layer gate structure
A semiconductor memory device includes a first select transistor, first stepped portion, and a first contact plug. The first select transistor is formed on a side of an upper surface of a substrate...
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7446362 |
Semiconductor memory device and method of manufacturing the same
A semiconductor memory device includes a semiconductor substrate having a first region and a second region, a transistor placed in the first region of the semiconductor substrate, a first...
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7446363 |
Capacitor including a percentage of amorphous dielectric material and a percentage of crystalline dielectric material
The invention comprises integrated circuitry and to methods of forming capacitors. In one implementation, integrated circuitry includes a capacitor having a first capacitor electrode, a second...
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7446372 |
DRAM tunneling access transistor
In one embodiment, a first transistor is comprised of a first p+ source region doped in an n-well in the substrate and a first n+ drain region doped on one side at the top of the pillar. A second...
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7442977 |
Gated field effect devices
This invention includes gated field effect devices, and methods of forming gated field effect devices. In one implementation, a gated field effect device includes a pair of source/drain regions...
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7442596 |
Methods of manufacturing fin type field effect transistors
A fin type field effect transistor includes a semiconductor substrate, an active fin, a first hard mask layer pattern, a gate insulation layer pattern, a first conductive layer pattern, and...
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7443032 |
Memory device with chemical vapor deposition of titanium for titanium silicide contacts
A titanium layer is formed on a substrate with chemical vapor deposition (CVD). First, a seed layer is formed on the substrate by combining a first precursor with a reducing agent by CVD. Then, the...
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7439565 |
Active devices array substrate and repairing method thereof
An active device array substrate including a substrate, a plurality of active devices, a plurality of the first lead lines, a plurality of the second lead lines and a first floating light-shielding...
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7439126 |
Method for manufacturing semiconductor memory
A method for manufacturing a semiconductor memory having a memory cell selection transistor and a capacitor, comprises a step of forming a polysilicon plug having a large-diameter portion on a side...
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7439544 |
Structure and manufacturing method of an image TFT array
The present invention provides a manufacturing method of an image TFT array, which includes providing a substrate including a thin film transistor region, a storage capacitor region, a pad region,...
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7439564 |
Methods of forming capacitor constructions
The invention includes constructions having two dielectric layers over a conductively-doped semiconductive material. One of the dielectric layers contains aluminum oxide, and the other contains a...
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7439566 |
Semiconductor memory device having metal-insulator transition film resistor
A semiconductor memory device may have a lower leakage current and/or higher reliability, e.g., a longer retention time and/or a shorter refresh time. The device may include a switching device and...
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7436078 |
Line layout structure of semiconductor memory device
An apparatus including a trolling motor having at least one operational subsystem and the trolling motor also having an integral electronic controller for controlling the operational subsystem...
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7436014 |
Method of fabricating storage capacitor in semiconductor memory device, and storage capacitor structure
A storage capacitor has a double cylinder type structure, with a small cylinder in a lower part thereof and a cylindrical lower electrode structure disposed on the cylindrical contact plug. A...
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7429764 |
Signal processing device and image pickup apparatus using the same
A signal processing device is provided which is capable of suppressing a voltage change of a power supply when output signals from a plurality of signal sources are read, and capable of outputting...
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7429773 |
Semiconductor apparatus and MIS logic circuit
A configuration is adopted including an NchMOS transistor ( 1 ) equipped with an insulating isolation layer ( 4 ) providing insulation and isolation using an SOI structure, and a capacitor formed...
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7425720 |
Semiconductor device
A programmable semiconductor device has a switch element in an interconnection layer, wherein in at least one of the inside of a via, interconnecting a wire of a first interconnection layer and a...
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7425738 |
Metal thin film and method of manufacturing the same, dielectric capacitor and method of manufacturing the same, and semiconductor device
A metal thin film provided on a substrate and having a metal with a face-centered cubic crystal structure, wherein the metal thin film is preferentially oriented in a (111) plane, and a (100) plane...
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7425739 |
Nonvolatile semiconductor memory
A select gate transistor has a select gate electrode composed of a first-level conductive layer and a second-level conductive layer. The first-level conductive layer has contact areas. The...
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7423309 |
Semiconductor device and method for fabricating the same
A semiconductor device in which a semiconductor layer of a thin film transistor and a first electrode of a capacitor are formed of amorphous silicon and the whole or a part of source/drain regions...
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7419913 |
Methods of forming openings into dielectric material
This invention includes methods of forming openings into dielectric material. In one implementation, an opening is partially etched through dielectric material, with such opening comprising a...
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7419871 |
Methods of forming semiconductor constructions
The invention includes a method in which a semiconductor substrate is provided to have a memory array region, and a peripheral region outward of the memory array region. Paired transistors are...
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7419874 |
Method of manufacturing semiconductor device with capacitor and transistor
The invention is to prevent dielectric breakdown of a capacitor in a semiconductor device having the capacitor and a MOS transistor formed on a same semiconductor substrate. A SiO 2 film that is...
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7420248 |
Programmable random logic arrays using PN isolation
Disclosed are a programmable, random logic device array, and a method of forming such a device. The device comprises a substrate, and a semiconductor layer above the substrate. That semiconductor...
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7417276 |
Thin film capacitor and fabrication method thereof
A thin film capacitor comprising a top electrode, a bottom electrode, and a dielectric film held between the top and bottom electrodes. The dielectric film is composed of at least cations Ba, Sr,...
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7414279 |
Semiconductor device with improved overlay margin and method of manufacturing the same
Semiconductor devices with an improved overlay margin and methods of manufacturing the same are provided. In one aspect, a method includes forming a buried bit line in a substrate; forming an...
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7414278 |
Semiconductor device with shallow trench isolation which controls mechanical stresses
The semiconductor device comprises a semiconductor substrate 10 with a trench 16 a and a trench 16 b formed in; a device isolation film 32 a buried in the trench 16 a and including a...
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7414280 |
Systems and methods for memory structure comprising embedded flash memory
A memory structure that combines multiple embedded flash memory. The flash memory can be used, e.g., as air replacement cells or back up memory, or additional memory cells. In one aspect, the flash...
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7414267 |
Semiconductor device and process for production thereof
Disclosed herein is a semiconductor device with high reliability which has TFT of adequate structure arranged according to the circuit performance required. The semiconductor has the driving...
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7411238 |
Semiconductor integrated circuit device and a method of manufacturing the same
In order to improve the soft error resistance of a memory cell of an SRAM without increasing its chip size in deep through-holes formed by perforating a silicon oxide film, there is a silicon...
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7411236 |
Semiconductor storage device
A semiconductor storage device has a first transistor of first conductive type which control data writing, a second transistor of second conductive type which controls data read-out, a third...
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7411240 |
Integrated circuits including spacers that extend beneath a conductive line
Integrated circuit devices are fabricated by fabricating a conductive line on an insulating layer on an integrated circuit substrate. The conductive line includes a bottom adjacent the insulating...
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7411237 |
Lanthanum hafnium oxide dielectrics
Dielectric layers containing a lanthanum hafnium oxide layer, where the lanthanum hafnium oxide layer is arranged as a structure of one or more monolayers, provide an insulating layer in a variety...
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7411255 |
Dopant barrier for doped glass in memory devices
A semiconductor device has a diffusion barrier formed between a doped glass layer and surface structures formed on a substrate. The diffusion barrier includes alumina and optionally a nitride, and...
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