|
Match
|
Document |
Document Title |
|
|
6818935 |
Semiconductor device and method for fabricating the same
A semiconductor device, capable of precluding the deterioration of flatness and electrical properties due to the non-planarized topology and enhancing oxidative endurance and the process margins,...
|
|
|
6818523 |
Semiconductor storage device manufacturing method which forms a hydrogen diffusion inhibiting layer
A method for forming a semiconductor storage device includes steps of forming a memory cell transistor, forming a first plug connected to the memory cell transistor, forming a second plug of a...
|
|
|
6818465 |
Nitride semiconductor element and production method for nitride semiconductor element
Nitride semiconductor devices and methods of fabricating same are provided. The nitride semiconductor device includes a crystal layer grown into a three-dimensional shape having a side surface...
|
|
|
6815785 |
Thin film magnetic memory device and manufacturing method therefor
A thin film magnetic memory device includes: a TMR element, provided on a main surface of a silicon substrate, operating as a memory element; a buffer layer having a first surface bringing into...
|
|
|
6815745 |
Tunnel magnetoresistive effect element, method of manufacturing tunnel magnetoresistive effect element and magnetic memory device
When a tunnel magnetoresistive effect element having a multilayer film structure containing two ferromagnetic material layers ( 11, 12 ) and a barrier layer ( 13 ) is constructed, after one...
|
|
|
6815744 |
Microelectronic device for storing information with switchable ohmic resistance
A microelectronic device is designed such that it includes a region between electrodes having a switchable ohmic resistance wherein the region is made of a substance comprising components A x , B y...
|
|
|
6815248 |
Material combinations for tunnel junction cap layer, tunnel junction hard mask and tunnel junction stack seed layer in MRAM processing
A resistive memory device ( 110 ) and method of manufacturing thereof comprising a cap layer ( 140 ) and hard mask layer ( 142 ) disposed over magnetic stacks ( 114 ), wherein either the cap layer...
|
|
|
6815224 |
Low-temperature processing of a ferroelectric strontium bismuth tantalate layer, and fabrication of ferroelectric components using the layer
In a method for producing ferroelectric strontium bismuth tantalate having the composition Sr x Bi y Ta 2 O 9 (SBT) or Sr x Bi y (Ta, Nb) 2 O 9 (SBTN), the element strontium, which is normally...
|
|
|
6812538 |
MRAM cells having magnetic write lines with a stable magnetic state at the end regions
A method and system for providing and using a magnetic memory are disclosed. The magnetic memory includes a plurality of magnetic memory cells, a plurality of magnetic write lines and a plurality...
|
|
|
6812537 |
Magnetic memory and method of operation thereof
A magnetic memory according to the present invention comprises: a single magnetic memory cell having at least first to third magnetic layers, a first tunnel insulating layer between the first and...
|
|
|
6812515 |
Polysilicon layers structure and method of forming same
A non-volatile memory cell includes a first insulating layer over a substrate region, and a floating gate. The floating gate includes a first polysilicon layer over the first insulating layer and a...
|
|
|
6812511 |
Magnetic storage apparatus having dummy magnetoresistive effect element and manufacturing method thereof
A magnetic memory device includes a memory cell portion, a peripheral circuit portion positioned in the vicinity of the memory cell portion, a plurality of first magnetoresistive effect elements...
|
|
|
6812510 |
Ferroelectric capacitor, process for manufacturing thereof and ferroelectric memory
A ferroelectric capacitor having a ferroelectric layer and a pair of electrodes, in which the ferroelectric layer contains carbon or carbon atoms of 5×10 18 cm −3 or less, and the pair of...
|
|
|
6812509 |
Organic ferroelectric memory cells
This invention proposes to make memory using organic materials. The basic structure of the memory cell is a field effect organic transistor using a ferroelectric thin film polymer as gate...
|
|
|
6809388 |
Magnetic sensor based on efficient spin injection into semiconductors
A magnetic sensor based on efficient spin injection of spin-polarized electrons from ferromagnets into semiconductors and rotation of electron spin under a magnetic field. Previous spin injection...
|
|
|
6809361 |
Magnetic memory unit and magnetic memory array
A magnetic memory unit having a first magnetizable electrode, a second magnetizable electrode, and at least one nanotube arranged between the electrodes in a longitudinal direction and coupled to...
|
|
|
6809360 |
Semiconductor device and method of manufacturing the same
There are contained first capacitors each having a first lower electrode, a first ferroelectric film, and a first upper electrode, which are formed sequentially in a first region of an insulating...
|
|
|
6806553 |
Tunable thin film capacitor
It is an object of the invention to provide a variable capacitor constituted such that, even when an external control voltage is applied, a stable dielectric constant of the dielectric layer can be...
|
|
|
6806524 |
Thin film magnetic memory device
A thin film magnetic memory device includes: TMR elements provided at a predetermined distance away from each other on a main surface of a silicon substrate so as to operate as memory elements; a...
|
|
|
6806523 |
Magnetoresistive memory devices
The invention includes a magnetoresistive memory device having a conductive core, and a first magnetic layer extending at least partially around the conductive core. A non-magnetic material is over...
|
|
|
6803620 |
Non-volatile semiconductor memory device and a method of producing the same
The present invention prevents production of residue which causes short-circuit between word lines. A memory cell comprises a channel formation region CH, charge storage films CSF each comprised of...
|
|
|
6803619 |
Semiconductor memory device
A magnetic memory device capable of achieving high reliability and superior operation characteristics of tunneling magneto-resistive (TMR) elements is provided. This magnetic memory device includes...
|
|
|
6803618 |
MRAM configuration having selection transistors with a large channel width
The invention relates to an MRAM configuration that includes a selection transistor connected to several MTJ memory cells. The selection transistor has an increased channel width.
|
|
|
6803617 |
Capacitor and method for fabricating the same
The capacitor comprises an lower electrode 22 , a dielectric film 30 formed on the lower electrode 22 , a floating electrode 20 formed on the dielectric film 30 , a dielectric film 50 ...
|
|
|
6803616 |
Magnetic memory element having controlled nucleation site in data layer
A ferromagnetic data layer of a magnetic memory element is formed with a controlled nucleation site. The controlled nucleation sites improve the switching distribution of the magnetic memory...
|
|
|
6803615 |
Magnetic tunnel junction MRAM with improved stability
An MRAM cell includes a pinned layer, a free layer, and a bit line with a magnetic sheath. The magnetic sheath allows a magnetic field to circulate in a loop around the bit line. The looping...
|
|
|
6801451 |
Magnetic memory devices having multiple bits per memory cell
A memory cell of a data storage device includes serially-connected first and second magnetoresistive devices. The first magnetoresistive device has first and second resistance states. The second...
|
|
|
6800937 |
RuSixOy-containing adhesion layers and process for fabricating the same
Integrated circuit structures having a substrate assembly that includes at least one active device and a silicon-containing region are disclosed. The integrated circuit structure includes an...
|
|
|
6800890 |
Memory architecture with series grouped by cells
An IC with a memory array having a series architecture is disclosed. A memory cell of a series group comprises a transistor coupled to a capacitor in parallel. The capacitor includes first and...
|
|
|
6800889 |
Semiconductor device and fabrication method thereof
A semiconductor device includes a capacitor having a lower electrode ( 102 ), a high-dielectric-constant or ferroelectric thin film ( 103 ), and an upper electrode ( 104 ) which are subsequently...
|
|
|
6800521 |
Process for the formation of RuSixOy-containing barrier layers for high-k dielectrics
A method for use in the fabrication of integrated circuits includes providing a substrate assembly having a surface. A diffusion barrier layer is formed over at least a portion of the surface. The...
|
|
|
6798004 |
Magnetoresistive random access memory devices and methods for fabricating the same
Fabricating a magnetoresistive random access memory cell and a structure for a magnetoresistive random access memory cell begins by providing a substrate having a transistor formed therein. A...
|
|
|
6798003 |
Reliable adhesion layer interface structure for polymer memory electrode and method of making same
A polymer memory device includes two organic adhesion layers that facilitate an integral package comprising a lower and an upper electrode and the ferroelectric polymer memory structure. The...
|
|
|
6798002 |
Dual-purpose anti-reflective coating and spacer for flash memory and other dual gate technologies and method of forming
A dual gate semiconductor device, such as a flash memory semiconductor device, whose plurality of dual gate sidewall spacer structure is formed by a first and second anti-reflection fabrication...
|
|
|
6794729 |
Stacked capacitor and method of forming the same as well as semiconductor device using the same and circuit board using the same
A stacked capacitor which comprises: a dielectric layer; a two-dimensional array of terminal electrodes on at least one of first and second surfaces of the dielectric layer; first internal...
|
|
|
6794705 |
Multi-layer Pt electrode for DRAM and FRAM with high K dielectric materials
A multi-layer electrode ( 246 ) and method of fabrication thereof in which a conductive region ( 244 ) is separated from a barrier layer ( 222 ) by a first conductive liner ( 240 ) and a second...
|
|
|
6794697 |
Asymmetric patterned magnetic memory
This invention provides an asymmetrically patterned magnetic memory storage device. In a particular embodiment at least one magnetic memory cell is provided. Each magnetic memory cell provides at...
|
|
|
6794696 |
Magnetic memory device and method of manufacturing the same
A magnetic memory device includes a magnetoresistance configured to store information. A first wiring is provided along a first direction. The first wiring has a function of applying a magnetic...
|
|
|
6794695 |
Magneto resistive storage device having a magnetic field sink layer
An electro-magnetic device, such as magnetic memory device, is disclosed that includes means for structuring, attenuating or eliminating stray fields at the boundaries that produce an offset in the...
|
|
|
6794694 |
Inter-wiring-layer capacitors
An integrated circuit includes a semiconductor substrate with semiconductor devices formed therein and thereon, a first wiring layer located over the substrate, a second wiring layer located on the...
|
|
|
6794199 |
Ferroelectric memory and method for fabricating the same
A first insulating hydrogen barrier film is filled between lower electrodes of some ferroelectric capacitors arranged along one direction out of a word line direction and a bit line direction among...
|
|
|
6791870 |
Magnetoresistive memory devices and assemblies; and methods of storing and retrieving information
The invention includes a magnetoresistive memory device having a memory bit stack. The stack includes a first magnetic layer, a second magnetic layer, and a non-magnetic layer between the first and...
|
|
|
6791866 |
Magnetoresistive film, method of manufacturing magnetoresistive film, and memory using magnetoresistive film
A magnetoresistive film having a relatively large magnetoresistive effect includes a ferrimagnetic layer, a magnetic layer, and a tunneling barrier layer disposed between the ferrimagnetic layer...
|
|
|
6791863 |
Ferroelectric memory device and method of manufacturing the same
A ferroelectric memory device includes a memory cell array and a peripheral circuit section. The memory cell array, in which memory cells are arranged in a matrix, includes first signal electrodes,...
|
|
|
6790676 |
Method for producing a ferroelectric layer
A method for producing a ferroelectric layer includes preparing a substrate, applying a layer of material, which will be subsequently converted into the ferroelectric layer, and changing the...
|
|
|
6787864 |
Mosfets incorporating nickel germanosilicided gate and methods for their formation
A MOSFET gate or a MOSFET source or drain region comprises silicon germanium or polycrystalline silicon germanium. Silicidation with nickel is performed to form a nickel germanosilicide that...
|
|
|
6787832 |
Semiconductor memory cell and semiconductor memory device
A semiconductor memory cell has a field-effect transistor device and a ferroelectric storage capacitor. The field-effect transistor device has a channel region that includes or is made of an...
|
|
|
6787831 |
Barrier stack with improved barrier properties
An barrier stack for inhibiting diffusion of atoms or molecules, such as O 2 is disclosed. The barrier slack includes first and second barrier layers formed from, for example, Ir, Ru, Pd, Rh, or...
|
|
|
6787830 |
Semiconductor device and method for fabricating the same
A gate electrode and a gate insulating film are formed for each of PMOSFET, NMOSFET and ferroelectric FET. Source/drain regions are defined for the NMOSFET and ferroelectric FET and for the PMOSFET...
|
|
|
6787414 |
Capacitor for semiconductor memory device and method of manufacturing the same
Disclosed is a capacitor for semiconductor device with a dielectric layer having low leakage current and high dielectric constant. The capacitor includes: a lower electrode; a dielectric layer...
|