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7402870 Ultra shallow junction formation by epitaxial interface limited diffusion  
A method of forming a field effect transistor creates shallower and sharper junctions, while maximizing dopant activation in processes that are consistent with current manufacturing techniques....
7402856 Non-planar microelectronic device having isolation element to mitigate fringe effects and method to fabricate same  
A non-planar microelectronic device, a method of fabricating the device, and a system including the device. The non-planar microelectronic device comprises: a substrate body including a substrate...
7402855 Split-channel antifuse array architecture  
Generally, the present invention provides a variable thickness gate oxide anti-fuse transistor device that can be employed in a non-volatile, one-time-programmable (OTP) memory array application....
7400031 Asymmetrically stressed CMOS FinFET  
A CMOS device comprising a FinFET comprises at least one fin structure comprising a source region; a drain region; and a channel region comprising silicon separating the source region from the...
7400020 Conductive niobium oxide gate MOSFET  
MOSFET gate structures are provided comprising a niobium monoxide gate, overlying a gate dielectric. The niobium monoxide gate may have a low work function suitable for use as an NMOS gate.
7400002 MOSFET package  
A semiconductor device, wherein a first metallic member is bonded to a first electrode of a semiconductor element via a first metallic body containing a first precious metal, and a second metallic...
7397091 SiGe nickel barrier structure employed in a CMOS device to prevent excess diffusion of nickel used in the silicide material  
A CMOS device such as an NFET or a PFET and a method of forming a CMOS device are provided. The method begins by forming at least one patterned gate region atop a first semiconductor layer that...
7397086 Top-gate thin-film transistor  
A thin-film transistor, such as a top-gate thin-film transistor, is provided herein. The thin-film transistor has a performance-enhancing layer, such as a performance-enhancing bottom layer,...
7397075 Method and apparatus providing CMOS imager device pixel with transistor having lower threshold voltage than other imager device transistors  
A transistor of a pixel cell for use in a CMOS imager with a low threshold voltage of about 0.3 V to less than about 0.7 V is disclosed. The transistor is provided with high dosage source and drain...
7397074 RF field heated diodes for providing thermally assisted switching to magnetic memory elements  
An exemplary array of thermally-assisted magnetic memory structures includes a plurality of magnetic memory elements, each magnetic memory element being near a diode. A diode near a selected...
7397073 Barrier dielectric stack for seam protection  
The present invention provides a semiconducting device including a gate dielectric atop a semiconducting substrate, the semiconducting substrate containing source and drain regions adjacent the...
7394135 Dual source MOSFET for low inductance synchronous rectifier  
A dual source MOSFET comprises a large number of cells diffused into a substrate. The cells are divided into two regions with separate sources and gates but having a common drain connection, the...
7394128 Semiconductor memory device with channel regions along sidewalls of fins  
A semiconductor memory ( 26 ) having a plurality of memory cells ( 25 ), the semiconductor memory ( 26 ) having a substrate ( 1 ), at least one wordline ( 2 ) and first ( 3 ) and second lines ( 4...
7394120 Semiconductor device having a shaped gate electrode and method of manufacturing the same  
An MIS transistor includes a gate electrode located to intersect a device region of a semiconductor substrate isolated by a device isolation region, and source and drain regions formed in the...
7394119 Metal oxide semiconductor (MOS) type semiconductor device and having improved stability against soft errors  
A semiconductor device with a metal oxide semiconductor (MOS) type transistor structure, which is used for, e.g. a static random access memory (SRAM) type memory cell, includes a part that is...
7391080 LDMOS transistor device employing spacer structure gates  
An integrated LDMOS transistor comprises a semiconductor substrate ( 11 ), an LDMOS gate region ( 17 ), LDMOS source ( 14 ) and drain ( 15 ) regions, and a channel region ( 13 ) arranged beneath...
7391069 Semiconductor device and manufacturing method thereof  
In a conventional semiconductor device, for example, a MOS transistor, there is a problem that a parasitic transistor is prone to be operated due to an impurity concentration in a back gate region...
7391068 Semiconductor device  
A semiconductor device comprising at least one FET formed on the semiconductor substrate, wherein the FET comprises a source region, a drain region, a channel region formed between the source and...
7391049 Thin-film transistor, thin-film transistor sheet and their manufacturing method  
Disclosed are a process of manufacturing a thin-film transisitor sheet and a thin-sheet transistor sheet manufactured by the process, the process comprising providing a gate busline on a substrate,...
7388229 Thin film transistor substrate, manufacturing method of thin film transistor, and display device  
A thin film transistor substrate includes a first conductive layer formed on a substrate, an anti-diffusion layer deposited on the first conductive layer, a semiconductor layer formed on the...
7387974 Methods for providing gate conductors on semiconductors and semiconductors formed thereby  
A method of providing a gate conductor on a semiconductor is provided. The method includes defining an organic polymer plating mandrel on the semiconductor, activating one or more sites of the...
7387924 Polycrystalline SiGe junctions for advanced devices  
A structure and method of fabrication for MOSFET devices with a polycrystalline SiGe junction is disclosed. Ge is selectively grown on Si while Si is selectively grown on Ge. Alternating...
7385273 Power semiconductor device  
A power semiconductor device that includes a plurality of gate structure each having a gate insulation of a first thickness, and a termination region, the termination including a field insulation...
7385263 Low resistance integrated MOS structure  
The present invention is related to a metal-oxide semiconductor field-effect transistor (MOSFET) having a symmetrical layout such that the resistance between drains and sources is reduced, thereby...
7385262 Band-structure modulation of nano-structures in an electric field  
A method to electronically modulate the energy gap and band-structure of semiconducting carbon nanotubes is proposed. Results show that the energy gap of a semiconducting nanotube can be narrowed...
7385237 Fin field effect transistors with low resistance contact structures  
Fin FET semiconductor devices are provided which include a substrate, an active pattern that protrudes vertically from the substrate and that extends laterally in a first direction, a device...
7385234 Memory and logic devices using electronically scannable multiplexing devices  
A memory device or a logic device that uses an electronically scannable multiplexing device capable of addressing multiple bits within a volatile or non-volatile memory cell. The multiplexing...
7382005 Circuit component with bump formed over chip  
A method of assembling chips. A first chip and a second chip are provided. At least one conductive pillar is formed on the first chip, and a conductive connecting material is formed on the...
7378744 Plasma treatment at film layer to reduce sheet resistance and to improve via contact resistance  
A method of manufacturing a semiconductor device contact including forming an insulating layer over a substrate and forming an agglutinating layer over the insulating layer. The agglutinating layer...
7378703 Semiconductor device having step gates and method for fabricating the same  
The semiconductor device includes a substrate including a first active region and a second active region having a greater height than that of the first active region. A gate pattern has a step...
7378692 Integrated electronic circuit comprising superposed components  
An integrated electronic circuit with at least at least one passive electronic component and at least one active electronic component. The passive electronic component is formed within an...
7372164 Semiconductor device with parallel interconnects  
A semiconductor forming transistors on a semiconductor substrate includes a low concentration source/drain region formed in the semiconductor substrate, a high concentration source/drain region...
7372090 Magnetic random access memory device and method of forming the same  
Example embodiments of the present invention disclose a semiconductor memory device and a method of forming a memory device. A semiconductor memory device may include a digit line disposed on a...
7372088 Vertical gate semiconductor device and method for fabricating the same  
A source region is formed by performing ion implantation plural times to diffuse an impurity from the upper surface of a semiconductor region toward a region far dawn therefrom and to increase...
7368796 Metal gate engineering for surface P-channel devices  
A semiconductor device, such as a CMOS device, having gates with a high work function in PMOS regions and low work functions in NMOS regions and a method of producing the same. Using nitrogen...
7368785 MOS transistor device structure combining Si-trench and field plate structures for high voltage device  
A metal-oxide-semiconductor transistor device for high voltage (HV MOS) and a method of manufacturing the same are disclosed. The HV MOS transistor device comprises a field oxide region with an...
7368779 Hemi-spherical structure and method for fabricating the same  
Hemi-spherical structure and method for fabricating the same. A device includes discrete pillar regions on a substrate, and a pattern layer on the discrete support structures and the substrate. The...
7368776 Semiconductor device comprising a highly-reliable, constant capacitance capacitor  
A semiconductor device, having a memory cell region and a peripheral circuit region, includes an insulating film, having an upper surface, formed on a major surface of a semiconductor substrate to...
7365383 Method of forming an EPROM cell and structure therefor  
An EPROM cell includes a control gate and a control transistor. A portion of the control transistor is formed as a portion of the control gate.
7365378 MOSFET structure with ultra-low K spacer  
A MOSFET structure and method of fabricating the structure incorporates a multi-layer sidewall spacer to suppress parasitic overlap capacitance between the gate conductor and the source/drain...
7358612 Plasma treatment at film layer to reduce sheet resistance and to improve via contact resistance  
A method of manufacturing a semiconductor device contact including forming an insulating layer over a substrate and forming an agglutinating layer over the insulating layer. The agglutinating layer...
7358551 Structure and method for improved stress and yield in pFETs with embedded SiGe source/drain regions  
The present invention provides a technique for forming a CMOS structure including at least one pFET that has a stressed channel which avoids the problems mentioned in the prior art. Specifically,...
7358550 Field effect transistor  
An field effect transistor includes a first semiconductor region, a gate electrode insulatively disposed over the first semiconductor region, source and drain electrodes between which the first...
7358131 Methods of forming SRAM constructions  
The invention includes SRAM constructions comprising at least one transistor device having an active region extending into a crystalline layer comprising Si/Ge. A majority of the active region...
7355226 Power semiconductor and method of fabrication  
This invention is generally concerned with power semiconductors such as power MOS transistors, insulated gate by bipolar transistors (IGBTs), high voltage diodes and the like, and method for their...
7355225 Semiconductor device and method for providing a reduced surface area electrode  
An apparatus ( 200 ) such as a semiconductor device comprises a gate electrode ( 201 ) and at least a first electrode ( 202 ). The first electrode preferably has an established perimeter that at...
7352060 Multilayer wiring substrate for providing a capacitor structure inside a multilayer wiring substrate  
A multilayer wiring substrate for providing a capacitor structure inside a multilayer wiring structure is disclosed. The multilayer wiring substrate includes a dielectric layer including a resin...
7352032 Output driver with split pins  
The drains of the PMOS transistor and the NMOS transistor of a driver are separated and connected to two spaced-apart pins. The spaced-apart pins provide ESD protection to the NMOS transistor,...
7351994 Noble high-k device  
At least one high-k device, and a method for forming the at least one high-k device, comprising the following. A structure having a strained substrate formed thereover. The strained substrate...
7348615 Image pickup device and camera for converting charges into voltage  
An object is to provide a solid state image pickup device and a camera which do not worsen a sensor performance in terms of an optical property, a saturated charge amount and the like. A solid...
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