Matches 301 - 350 out of 839 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >
Match Document Document Title
7189987 Electrical detection of selected species  
The present invention provides an organic field effect transistor and a method of fabricating the transistor. The transistor includes a semiconductive film comprising organic molecules. Probe...
7190013 ISFET using PbTiO3 as sensing film  
A PbTiO 3 /SiO 2 -gated ISFET device comprising a PbTiO 3 thin film as H + -sensing film, and a method of forming the same. The PbTiO 3 thin film is formed through a sol-gel process which offers...
7190011 Semiconductor device and method for manufacturing same  
There is provided a technique for obtaining improved maximum allowed value for the antenna ratio while inhibiting the damage on the gate insulating film of the MOSFET. A semiconductor device having...
7187016 Semiconductor device  
In a semiconductor device an electric field is controlled in direction or angle relative to a gate, or a channel to adjust a gain coefficient of a transistor. In some embodiments, there are...
7182914 Structure and manufacturing process of a nano device transistor for a biosensor  
The present invention relates to a structure and manufacturing process of a nano device transistor for a biosensor. The structure, the manufacturing process and the related circuit for a carbon...
7180143 Semiconductor device having a gate insulating layer being mainly made of silicon oxynitride (SiON) having a compression strain state as its strain state  
A semiconductor device constitutes an electric field effect type transistor having a semiconductor substrate, a gate insulating layer formed on the substrate and a gate electrode formed on the gate...
7179702 Semiconductor device including metal insulator semiconductor field effect transistor and method of manufacturing the same  
A semiconductor device comprises a semiconductor substrate, an N-channel MISFET and a P-channel MISFET provided on the semiconductor substrate, each of the N- and P-channel MISFETs being isolated...
7180107 Method of fabricating a tunneling nanotube field effect transistor  
A method of fabricating a tunneling nanotube field effect transistor includes forming in a nanotube an n-doped region and a p-doped region which are separated by an undoped channel region of the...
7180112 Solid-state imaging apparatus having an upwardly convex color filter layer and method of manufacturing the same  
In a solid-state imaging apparatus, a plurality of pixel units are arranged, the pixel units including (i) a photoelectric conversion element formed above a semiconductor substrate and (ii) a color...
7176560 Semiconductor device having a chip—chip structure  
A semiconductor device having a chip-on-chip structure wherein; a first semiconductor chip with a memory macro control circuit where a plurality of inter-chip connection terminals and a plurality...
7176532 CMOS active pixel sensor with improved dark current and sensitivity  
An active pixel sensor which provides reduced dark current, improved sensitivity, and improved modulation transfer function. An N well, surrounded by a P well is formed in a P type epitaxial...
7173296 Reduced hydrogen sidewall spacer oxide  
An embodiment of the invention is a method of making a semiconductor structure 10 where the spacer oxide layer 90 is formed by a hydrogen free precursor CVD process. Another embodiment of the...
7170121 Computer system architecture using a proximity I/O switch  
One embodiment of the present invention provides a proximity I/O switch, which is configured to transfer data between the components in a computer system. This proximity I/O switch is comprised of...
7170119 Vertical type semiconductor device  
In a vertical type MOSFET device having a super junction structure, in which a N conductive type column region and a P conductive type column region are alternately aligned, regarding to a distance...
7170120 Carbon nanotube energy well (CNEW) field effect transistor  
A structure to form an energy well within a Carbon nanotube is described. The structure includes a doped semiconductor region and an undoped semiconductor region. The Carbon nanotube is between the...
7166524 Method for ion implanting insulator material to reduce dielectric constant  
An integrated microelectronic circuit has a multi-layer interconnect structure overlying the transistors consisting of stacked metal pattern layers and insulating layers separating adjacent ones of...
7166904 Structure and method for local resistor element in integrated circuit technology  
A method and system for forming a semiconductor device having superior ESD protection characteristics. A resistive material layer is disposed within a contact hole on at least one of the contact...
7164163 Strained transistor with hybrid-strain inducing layer  
A semiconductor device having a hybrid-strained layer and a method of forming the same are discussed. The semiconductor device comprises: a gate dielectric over a substrate; a gate electrode over...
7161223 Integrated circuit with a PN junction diode  
Apparatus and Methods for the self-alignment of separated regions in a lateral MOSFET of an integrate circuit. In one embodiment, a method comprising, forming a relatively thin dielectric layer on...
7161199 Transistor structure with stress modification and capacitive reduction feature in a width direction and method thereof  
A transistor comprises a source and drain positioned within an active region. A gate overlies a channel area of the active region, wherein the channel region separates the source and drain. The...
7161198 Semiconductor integrated circuit device having MOS transistor  
An N-channel MOS transistor of a semiconductor device having a high withstand voltage employs a drain structure with a low concentration and a large diffusion depth, which causes a problem in that...
7157331 Ultraviolet blocking layer  
Methods and apparatuses are disclosed relating to blocking ultraviolet electromagnetic radiation from a semiconductor. Ultraviolet electromagnetic radiation, such as ultraviolet electromagnetic...
7157757 Semiconductor constructions  
The invention includes semiconductor constructions, methods of forming gatelines, and methods of forming transistor structures. The invention can include, for example, a damascene method of forming...
7154145 Insulated gate transistor incorporating diode  
A p-type base layer shaped like a well is formed for each of IGBT cells, and a p + -type collector layer and an n + -type cathode layer are formed on a surface opposite to a surface on which the...
7148526 Germanium MOSFET devices and methods for making same  
A double gate germanium metal-oxide semiconductor field-effect transistor (MOSFET) includes a germanium fin, a first gate formed adjacent a first side of the germanium fin, and a second gate formed...
7148463 Increased responsivity photodetector  
A photodetector includes a high-indium-concentration (H-I-C) absorption layer having a Group III sublattice indium concentration greater than 53%. The H-I-C absorption layer improves responsivity...
7148532 Ferroelectric element and method of manufacturing ferroelectric element  
Additional elements of Ca, Sr, and Ir are added to a single layer lead lanthanum zirconate titanate (PLZT), thereby decreasing a c/a ratio to within a range from 1.00 to 1.008 smaller than a...
7145192 MOS transistor and method of manufacturing the same  
An object of the present invention is to provide a MOS transistor of a new structure and a method of manufacturing the same that is capable of easily fabricating a high integration density device...
7145191 P-channel field-effect transistor with reduced junction capacitance  
The source/drain zones ( 140 and 142 or 160 and 162 ) of a p-channel IGFET ( 120 or 122 ) are provided with graded-junction characteristics to reduce junction capacitance, thereby...
7141850 Gated semiconductor assemblies and methods of forming gated semiconductor assemblies  
In one aspect, the invention includes a method of forming a gated semiconductor assembly, comprising: a) forming a silicon nitride layer over and against a floating gate; and b) forming a control...
7138684 Semiconductor memory device including an SOI substrate  
A semiconductor memory device includes a plurality of N and P channel MOS transistors. The plurality of MOS transistors are formed on an SOI (Silicon On Insulator) substrate. Each MOS transistor...
7138673 Semiconductor package having encapsulated chip attached to a mounting plate  
In a semiconductor package including at least one plate-like mount, a semiconductor chip has at least one electrode formed on a top surface thereof, and is mounted on the plate-like mount such that...
7135730 Bias-independent capacitor based on superposition of nonlinear capacitors for analog/RF circuit applications  
A first MOS-on-NWELL device is formed on a substrate and has its pickup terminals optionally connected together. A second MOS-on-NWELL device is formed on the substrate and has its pickup terminals...
7135724 Structure and method for making strained channel field effect transistor using sacrificial spacer  
A field effect transistor (“FET”) is provided which includes a gate stack overlying a single-crystal semiconductor region of a substrate, a pair of first spacers disposed over sidewalls of said...
7132704 Transistor sidewall spacer stress modulation  
A semiconductor fabrication process and the resulting integrated circuit include forming a gate electrode ( 116 ) over a gate dielectric ( 104 ) over a semiconductor substrate ( 102 ). A spacer...
7129551 Electronic component having a praseodymium oxide layer and process for fabricating same  
An electronic component is disclosed having a first layer of metallically conductive material, a second layer of semiconductor material, and a third layer between the first and second layers. The...
7126194 Method for removing impurities of a semiconductor wafer, semiconductor wafer assembly, and semiconductor device  
On a silicon layer of an SOI wafer is defined a semiconductor device-forming region to form semiconductor devices thereon and an insulating region to electrically insulate the semiconductor...
7126174 Semiconductor device and method of manufacturing the same  
An isolation which is higher in a stepwise manner than an active area of a silicon substrate is formed. On the active area, an FET including a gate oxide film, a gate electrode, a gate protection...
7126173 Method for enhancing the electric connection between a power electronic device and its package  
An electronic power device of improved structure is fabricated with MOS technology to have a gate finger region and corresponding source regions on either sides of the gate region. This device has...
7126193 Metal-oxide-semiconductor device with enhanced source electrode  
An MOS device is formed including a semiconductor layer of a first conductivity type, a first source/drain region of a second conductivity type formed in the semiconductor layer, and a second...
7126199 Multilayer metal gate electrode  
A complementary metal oxide semiconductor integrated circuit may be formed with NMOS and PMOS transistors that have high dielectric constant gate dielectric material over a semiconductor substrate....
7122849 Stressed semiconductor device structures having granular semiconductor material  
A method of fabricating a semiconductor device structure, includes: providing a substrate, providing an electrode on the substrate, forming a recess in the electrode, the recess having an opening,...
7122850 Semiconductor device having local interconnection layer and etch stopper pattern for preventing leakage of current  
A semiconductor device having a local interconnection layer and a method for manufacturing the same are provided. A local interconnection layer is formed in an interlayer dielectric (ILD) layer on...
7119369 FET having epitaxial silicon growth  
A field-effect transistor has a channel region in a bulk semiconductor substrate, a first source/drain region on a first side of the channel region, a second source/drain region on a second side of...
7119386 Versatile system for triple-gated transistors with engineered corners  
The present invention provides a system for producing a triple-gate transistor segment ( 300 ), utilizing a standard semiconductor substrate ( 302 ). The substrate has a plurality of isolation...
7119379 Semiconductor device  
A semiconductor device disclosed herein comprises: a first base region which is of a first conductivity type; a second base region which is of a second conductivity type and which is selectively...
7119356 Forming closely spaced electrodes  
The present invention provides an apparatus and a method of fabricating the apparatus. The apparatus comprises a substrate having a planar surface and first and second electrodes located on the...
7119387 Solid-state image sensor and method for fabricating the same  
A solid-state image sensor comprises a semiconductor substrate of a first conductivity type having a color pixel region and a black pixel region; a first well of the first conductivity type formed...
7115947 Multiple dielectric finfet structure and method  
Disclosed is a method and structure for a fin-type field effect transistor (FinFET) structure that has different thickness gate dielectrics covering the fins extending from the substrate. These...
7115922 H-bridge drive utilizing a pair of high and low side MOSFET's in a common insulation housing  
A fully protected H-bridge for a d-c motor consists of two high side MOSFETs and a control and logic IC on a first conductive heat sink all within a first package and two discrete low side MOSFETs....
Matches 301 - 350 out of 839 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >