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7279721 |
Dual wavelength thermal flux laser anneal
A thermal processing apparatus and method in which a first laser source, for example, a CO 2 emitting at 10.6 μm is focused onto a silicon wafer as a line beam and a second laser source, for...
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7279701 |
Semiconductor device comprising a superlattice with upper portions extending above adjacent upper portions of source and drain regions
A semiconductor device may include a semiconductor substrate and at least one metal oxide semiconductor field-effect transistor (MOSFET). The MOSFET may include spaced apart source and drain...
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7276412 |
MIM capacitor of semiconductor device and manufacturing method thereof
In a capacitor of a semiconductor device, a bottom electrode is formed on a substrate and has an uneven top surface. An interlayer insulation layer is formed on the substrate and has a via hole...
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7276750 |
Semiconductor device having trench capacitor and fabrication method for the same
A semiconductor device includes a semiconductor substrate with a trench; a capacitor; a collar oxide film arranged on a portion of a side of the trench above the capacitor; a storage node arranged...
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7276747 |
Semiconductor device having screening electrode and method
In one embodiment, a semiconductor device is formed in a body of semiconductor material. The semiconductor device includes a screening electrode spaced apart from a channel region.
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7274056 |
Semiconductor constructions
The invention includes a semiconductor construction having a pair of channel regions that have sub-regions doped with indium and surrounded by boron. A pair of transistor constructions are located...
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7274050 |
Packaging and manufacturing of an integrated circuit
Apparatus, packaging, and methods of manufacture of an integrated circuit are provided. The integrated circuit includes a component of a first type fabricated on a first substrate containing a...
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7274046 |
Tri-gate low power device and method for manufacturing the same
The present invention provides a tri-gate lower power device and method for fabricating that tri-gate semiconductor device. The tri-gate device includes a first gate [ 455 ] located over a high...
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7274055 |
Method for improving transistor performance through reducing the salicide interface resistance
An embodiment of the invention reduces the external resistance of a transistor by utilizing a silicon germanium alloy for the source and drain regions and a nickel silicon germanium self-aligned...
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7271431 |
Integrated circuit structure and method of fabrication
According to the present invention, the integrated circuit includes isolation field regions on a semiconductor substrate. Gate dielectrics are formed on a surface of a substrate. Gate electrodes...
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7268403 |
Power semiconductor device having an improved ruggedness
The power semiconductor of the invention consists of an n+ drain area; an n− epitaxial area; p− body and p+ body areas formed on top of the n− epitaxial area in a striped configuration; an...
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7265400 |
Semiconductor device including field-effect transistor using salicide (self-aligned silicide) structure and method of fabricating the same
An element isolation region for electrically isolating an element region where an element is to be formed is formed in a semiconductor substrate. A gate insulating film is formed on the...
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7265401 |
Semiconductor device having high dielectric constant gate insulating layer and its manufacture method
A semiconductor device manufacture method has the steps of: (a) forming an interface layer of SiO or SiON on the surface of an active region of a silicon substrate; (b) forming a high dielectric...
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7259425 |
Tri-gate and gate around MOSFET devices and methods for making same
A triple gate metal-oxide semiconductor field-effect transistor (MOSFET) includes a fin structure, a first gate formed adjacent a first side of the fin structure, a second gate formed adjacent a...
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7259411 |
Vertical MOS transistor
A vertical MOS transistor has a source region, a channel region, and a drain region that are vertically stacked, and a trench that extends from the top surface of the drain region through the drain...
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7259426 |
Semiconductor device and its manufacturing method
There is provided a power MISFET which includes a semiconductor region of a first conductivity, a semiconductor base region of a second conductivity, a pillar region, a first major electrode region...
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7256465 |
Ultra-shallow metal oxide surface channel MOS transistor
An ultra-shallow surface channel MOS transistor and method for fabricating the same have been provided. The method comprises: forming CMOS source and drain regions, and an intervening well region;...
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7253461 |
Snapshot CMOS image sensor with high shutter rejection ratio
A pixel image sensor has an isolation barrier and diffusion well connected to a biasing voltage to prevent substrate charge leakage caused by photoelectrons generated in the substrate beneath a...
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7253459 |
Semiconductor devices and methods of manufacture thereof
A semiconductor device, for example a MOSFET or IGBT, includes a region ( 30, 36, 50 ) in the drain drift region ( 14 ) juxtaposed with its channel-accommodating region ( 15 ) and spaced from the...
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7253460 |
Active matrix panel with two thin film transistors to a pixel
An active matrix panel comprises a semiconductor thin film to constitute the switching element which includes••a common source-drain region having a bend portion with a channel region on one...
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7247897 |
Conductive line for a semiconductor device using a carbon nanotube including a memory thin film and semiconductor device manufactured
In a method of forming a conductive line for a semiconductor device using a carbon nanotube and a semiconductor device manufactured using the method, the method includes activating a surface of an...
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7244991 |
Semiconductor integrated device
A semiconductor integrated apparatus, including: an SOI (Silicon On Insulator) substrate which has a support substrate and an embedded insulation film; an NMOSFET, a PMOSFET and an FBC (Floating...
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7242061 |
Semiconductor device
The invention provides semiconductor devices having an output circuit in which transistors do not fail to achieve their original capability, and electrostatic breakdown is difficult to occur. A...
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7242060 |
Semiconductor memory device including an SOI substrate
A semiconductor memory device includes a plurality of N and P channel MOS transistors. The plurality of MOS transistors are formed on an SOI (Silicon On Insulator) substrate. Each MOS transistor...
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7238975 |
Nonvolatile semiconductor memory device and manufacturing method therefor
A nonvolatile semiconductor memory device including at least one MOS transistor in a peripheral circuit comprises a semiconductor substrate, isolation insulating films for defining a plurality of...
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7235830 |
Semiconductor device and process for manufacturing the same
The present invention provides a semiconductor device comprising: a semiconductor layer ( 3 ); a gate electrode ( 11 ) formed on the semiconductor layer ( 3 ) via a gate insulation film ( 10 ); and...
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7235828 |
Semiconductor device with residual nickel from crystallization of semiconductor film
It is an object to obtain a crystalline silicon film having preferable characteristics for a thin film transistor. A crystalline silicon film having improved crystallinity is obtained by the...
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7233020 |
Design for an organic light-emitting display that eliminates deterioration of the emission layer due to outgassing from an underlying layer
An organic light-emitting display has a first pattern overlapping with one first electrode portion which overlaps with the via-hole. The first pattern is protruded upward as compared with the first...
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7233038 |
Self masking contact using an angled implant
A method of implanting, for example, a phosphorous plug over a charge collection region and a method of forming a contact over the phosphorous plug implant and charge collection region. The method...
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7233045 |
Semiconductor device and system
Disclosed herewith is a semiconductor device improved to prevent withstand voltage defects that might occur in each MOSFET used therein and a system to be designed easily and prevented from...
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7230286 |
Vertical FET with nanowire channels and a silicided bottom contact
A vertical FET structure with nanowire forming the FET channels is disclosed. The nanowires are formed over a conductive silicide layer. The nanowires are gated by a surrounding gate. Top and...
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7230267 |
Organic semiconductor device
An organic semiconductor device includes a organic semiconductor layer with carrier mobility formed between a pair of opposing electrodes. The device also includes a buffer layer that is inserted...
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7229868 |
Organic field-effect transistor, method for structuring an OFET and integrated circuit
The invention relates to an organic field-effect transistor, to a method for structuring an OFET and to an integrated circuit with improved structuring of the functional polymer layers. The...
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7227204 |
Structure for improved diode ideality
A device is provided which includes a single-crystal semiconductor region disposed in a substrate. The single-crystal region includes a first semiconductor material and a diode disposed in the...
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7227205 |
Strained-silicon CMOS device and method
The present invention provides a semiconductor device and a method of forming thereof, in which a uniaxial strain is produced in the device channel of the semiconductor device. The uniaxial strain...
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7224008 |
Self-aligned production method for an insulated gate semiconductor device cell and insulated gate semiconductor device cell
The invention relates to a manufacturing method for an insulated gate semiconductor device cell, comprising the steps of forming a cell window ( 3 ) in a layered structure that is located on top of...
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7224949 |
ESD protection circuit for radio frequency input/output terminals in an integrated circuit
An integrated circuit comprises an ESD protection circuit including an inductor coupled between an input terminal and a ground terminal at which an RF signal is applied. The inductor is designed so...
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7223647 |
Method for forming integrated advanced semiconductor device using sacrificial stress layer
An integrated advanced method for forming a semiconductor device utilizes a sacrificial stress layer as part of a film stack that enables spatially selective silicide formation in the device. The...
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7214975 |
Semiconductor device with charge share countermeasure
An aspect of the present invention provides a semiconductor device that includes a logic circuit including at least one transistor with a first channel type, a first transistor with a second...
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7215577 |
Flash memory cell and methods for programming and erasing
Flash memory cells are presented which comprise a dielectric material formed above a substrate channel region, a charge trapping material formed over the dielectric material, and a control gate...
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7211846 |
Transistor having compensation zones enabling a low on-resistance and a high reverse voltage
A semiconductor component includes a semiconductor body having a substrate of a first conduction type and a first layer of a second conduction type that is located above the substrate. A channel...
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7208794 |
High-density NROM-FINFET
Semiconductor memory having memory cells, each including first and second conductively-doped contact regions and a channel region arranged between the latter, formed in a web-like rib made of...
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7208805 |
Structures comprising a layer free of nitrogen between silicon nitride and photoresist
The invention includes a semiconductor processing method. A first material comprising silicon and nitrogen is formed. A second material is formed over the first material, and the second material...
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7205594 |
Semiconductor device with capacitor and manufacturing method of the same
The present invention relates to a semiconductor device having capacitors. The configuration of the device includes: capacitor upper electrodes 14 a , 14 b formed via a dielectric film 13 on...
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7205614 |
High density ROM cell
A high density read-only memory (ROM) cell is installed on a silicon substrate for storing data. The ROM cell includes a first doped region being of a second conductive type installed on the...
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7202525 |
Trench MOSFET with trench tip implants
A trench type power semiconductor device includes a channel region atop an epitaxially silicon layer and a plurality of shallow gate electrode trenches within the channel region such that the...
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7199403 |
Semiconductor arrangement having a MOSFET structure and a zener device
The invention relates to a semiconductor arrangement having a MOSFET structure and an active zener function. A n + -doped zone and a p + -doped zone are provided at the bottom of a trench for the...
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7195999 |
Metal-substituted transistor gates
One aspect of this disclosure relates to a method for forming a transistor. According to various method embodiments, a gate dielectric is formed on a substrate, a substitutable structure is formed...
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7195966 |
Methods of fabricating semiconductor devices including polysilicon resistors and related devices
Methods of fabricating semiconductor devices are provided. Transistors are provided on a semiconductor substrate. A first interlayer insulating layer is provided on the transistors. A second...
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7193281 |
Semiconductor device and process for producing the same
There is provided a semiconductor device configured as follows. On a semiconductor substrate, a titanium oxide film which is an insulating film having a higher dielectric constant than that of a...
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