Matches 101 - 150 out of 838 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >
Match Document Document Title
7498602 Protecting silicon germanium sidewall with silicon for strained silicon/silicon mosfets  
Raised Si/SiGe source and drain regions include epitaxially grown silicon on SiGe sidewalls. The epi silicon prevents adverse effects of Ge during silicidation, including Ge out diffusion and...
7498632 Saddle type flash memory device and fabrication method thereof  
The present invention relates to a nano-scale flash memory device having a saddle structure, and a fabrication method thereof. Particularly, the invention relates to a highly integrated,...
7498872 Transistor devices configured to operate above a first cutoff frequency  
Transistor devices are provided configured to operate at frequencies above a typical first cutoff frequency. In one aspect, a method is provided for configuring a transistor device to operate above...
7495295 Semiconductor device and method for fabricating the same  
In a semiconductor device according to the present invention, the power source voltage Vdd 1 of a core transistor Tr 1, the power source voltage Vdd 2 of an I/O transistor Tr 2, and the power...
7485928 Arsenic and phosphorus doped silicon wafer substrates having intrinsic gettering  
A process for the preparation of low resistivity arsensic or phosphorous doped (N+/N++) silicon wafers which, during the heat treatment cycles of essentially any arbitrary electronic device...
7485906 Colors only process to reduce package yield loss  
Disclosed is an ordered microelectronic fabrication sequence in which color filters are formed by conformal deposition directly onto a photodetector array of a CCD, CID, or CMOS imaging device to...
7482645 Method and structure for making a top-side contact to a substrate  
A method for forming a semiconductor structure includes the following steps. A starting semiconductor substrate having a top-side surface and a back-side surface is provided. A recess is formed in...
7479674 Field effect transistor  
An field effect transistor includes a first semiconductor region, a gate electrode insulatively disposed over the first semiconductor region, source and drain electrodes between which the first...
7479678 Semiconductor element and method of manufacturing the same  
A semiconductor element is provided, comprising a first semiconductor layer of the first conduction type; and a pillar layer including first semiconductor pillars of the first conduction type and...
7479684 Field effect transistor including damascene gate with an internal spacer structure  
A MOSFET is disclosed that comprises a channel between a source extension and a drain extension, a dielectric layer over the channel, a gate spacer structure formed on a peripheral portion of the...
7473929 Semiconductor device and method for fabricating the same  
Ion implantation is carried out to form a p-well region and a source region in parts of a high resistance SiC layer on a SiC substrate, and a carbon film is deposited over the substrate. With the...
7470943 High performance MOSFET comprising a stressed gate metal silicide layer and method of fabricating the same  
The present invention relates to a semiconductor device that comprises at least one field effect transistor (FET) containing a source region, a drain region, a channel region, a gate dielectric...
7470956 Semiconductor device and manufacturing method thereof  
A semiconductor device has a semiconductor base, an anode electrode, and a cathode electrode. The semiconductor base includes a P type semiconductor substrate, an insulating film, an N − type...
7468539 Field-effect transistor with a gate having a plurality of branching elements arranged parallel to each other  
A field-effect transistor includes a substrate of a first conductivity type, and a channel diffusion region of a second conductivity type provided in the first conductivity type substrate. The...
7468531 Imaging apparatus and radiation imaging apparatus  
An imaging apparatus is provided in which a plurality of pixels, each having a conversion element and a thin-film transistor, are arranged in a two-dimensional fashion on an insulating substrate;...
7465972 High performance CMOS device design  
A semiconductor device includes a gate, which comprises a gate electrode and a gate dielectric underlying the gate electrode, a spacer formed on a sidewall of the gate electrode and the gate...
7465610 Method for operating an H-bridge drive utilizing a pair of high and low side MOSFETS  
A fully protected H-bridge for a d-c motor consists of two high side MOSFETs and a control and logic IC on a first conductive heat sink all within a first package and two discrete low side MOSFETs....
7465978 Field effect transistor with a high breakdown voltage and method of manufacturing the same  
An electric field effect transistor of high breakdown voltage and a method of manufacturing the same are disclosed. A recessed portion is formed at the channel region and is filled by a protective...
7465976 Tunneling field effect transistor using angled implants for forming asymmetric source/drain regions  
The present invention relates to a Tunnel Field Effect Transistor (TFET). which utilizes angle implantation and amorphization to form asymmetric source and drain regions. The IFET further includes...
7465979 Semiconductor device and fabrication method thereof  
In order to diversify a current control method of a semiconductor device, improve performance (including a current drive performance) of the semiconductor device, and reduce a size of the...
7462896 Semiconductor memory device and manufacturing method for semiconductor memory device  
The object is simplification of a manufacturing process for nonvolatile memory by reducing additional processes for forming a charge storage structure, and downsizing of nonvolatile memory. The...
7462543 Flash memory cell transistor with threshold adjust implant and source-drain implant formed using a single mask  
A method for forming an NMOS transistor for use in a flash memory cell on a P-type semiconductor structure includes forming a photoresist layer over the semiconductor structure and patterning the...
7456451 Ultra high voltage MOS transistor device  
An ultra high voltage MOS transistor device includes a substrate of a first conductivity type; a source region of a second conductivity type formed in the substrate; a first doping region of the...
7453108 Semiconductor device that is advantageous in complex stress engineering and method of manufacturing the same  
A semiconductor device according to an embodiment includes an insulated-gate field-effect transistor including a gate insulation film provided on a major surface of a semiconductor substrate, a...
7453121 Body contact formation in partially depleted silicon on insulator device  
An SOI device ( 100 ) has a gate electrode with one or more additional gate regions ( 120 ), and oxygen or halogen ions ( 128 ) under the additional gate regions ( 120 ). The oxygen or halogen ions...
7453090 Semiconductor device including a semiconductor substrate formed with a shallow impurity region  
A method of manufacturing a semiconductor device includes forming isolation regions, a gate insulator film and gate electrodes, implanting in the silicon substrate with impurity ions, annealing to...
7449734 Junction semiconductor device and method for manufacturing the same  
A junction semiconductor device having a drain region including a low-resistance layer of a first conductive type formed on one surface of a semiconductor crystal, a source region including a...
7449735 Dual work-function single gate stack  
Disclosed is a complementary CMOS device having a first FET with sidewall channels and a second FET with a planar channel. The first FET can be a p-FET and the second FET can be an n-FET or vice...
7449712 CMOS image sensor and method for fabricating the same  
A CMOS image sensor includes a substrate including silicon, a silicon germanium (SiGe) epitaxial layer formed over the substrate, the SiGe epitaxial layer formed through epitaxial growth and doped...
7446001 Method for forming a semiconductor-on-insulator (SOI) body-contacted device with a portion of drain region removed  
A method for making a semiconductor device includes patterning a semiconductor layer, overlying an insulator layer, to create a first active region and a second active region, wherein the first...
7446351 Transistor structures and transistors with a germanium-containing channel  
A transistor structure includes a first undoped, silicon-containing channel layer, a buried germanium channel, and a second undoped, silicon-containing channel layer. The first and second channel...
7446355 Electrical device and method for fabricating the same  
A method of fabricating self-aligned recess utilizing asymmetric poly spacer is disclosed. A semiconductor substrate having thereon a first pad layer and second pad layer is provided. A plurality...
7446354 Power semiconductor device having improved performance and method  
In one embodiment, a semiconductor device is formed in a body of semiconductor material. The semiconductor device includes a counter-doped drain region spaced apart from a channel region.
7446377 Transistors and manufacturing methods thereof  
Transistors and manufacturing methods thereof are disclosed. An example transistor includes a semiconductor substrate divided into device isolation regions and a device active region. The example...
7442597 Systems and methods that selectively modify liner induced stress  
The present invention facilitates semiconductor fabrication by providing methods of fabrication that selectively apply strain to multiple regions of a semiconductor device. A semiconductor device...
7439105 Metal gate with zirconium  
A gate electrode ( 202 ) for a transistor including a metal gate structure ( 207 ) containing zirconium and a polycrystalline silicon cap ( 209 ) located there over. The metal gate structure ( 207...
7435988 Semiconductor device including a MOSFET having a band-engineered superlattice with a semiconductor cap layer providing a channel  
A semiconductor device may include a substrate and at least one MOSFET adjacent the substrate including a superlattice. The superlattice may include a plurality of stacked groups of layers and a...
7432574 Magnetic recording element and magnetic memory  
A magnetic recording element according to an example of the present invention includes a magnetic free layer whose magnetization is variable in accordance with a current direction passing through a...
7429775 Method of fabricating strain-silicon CMOS  
Recesses are formed in the drain and source regions of an MOS transistor. The recesses are formed using two anisotropic etch processes and first and second sidewall spacers. The recesses are made...
7429763 Memory with strained semiconductor by wafer bonding with misorientation  
One aspect of the present invention relates to a method for forming a strained semiconductor structure. In various embodiments, at least two strong bonding regions are defined for a desired bond...
7427533 Methods of fabricating semiconductor devices including trench device isolation layers having protective insulating layers and related devices  
A method of fabricating a semiconductor device includes forming an active region including opposing sidewalls and a surface therebetween protruding from a substrate. A protective insulating layer...
7427544 Semiconductor device and method of manufacturing the same  
A semiconductor device includes an element isolation insulating film provided in a semiconductor substrate between first and second element regions, a gate electrode running over the element...
7425736 Silicon layer with high resistance and fabricating method thereof  
A silicon layer with high resistance is provided. The silicon layer with high resistance is positioned on a substrate. Also, the silicon layer with high resistance includes a plurality of silicon...
7423330 Semiconductor device with strain  
A semiconductor device includes: a semiconductor substrate having a p-MOS region; an element isolation region formed in a surface portion of the semiconductor substrate and defining p-MOS active...
7419868 Gated diode nonvolatile memory process  
A gated diode nonvolatile memory cell with a charge storage structure includes a diode structure with an additional gate terminal. Various embodiments may include or exclude a diffusion barrier...
7413943 Method of fabricating gate of fin type transistor  
A method of fabricating a gate of a fin type transistor includes forming hard masks to define active regions of a substrate. A shallow trench isolation method is performed to form a first device...
7414277 Memory cell having combination raised source and drain and method of fabricating same  
A memory device and a method of fabrication are provided. The memory device includes a semiconductor substrate and a charge trapping dielectric stack disposed over the semiconductor substrate. A...
7411236 Semiconductor storage device  
A semiconductor storage device has a first transistor of first conductive type which control data writing, a second transistor of second conductive type which controls data read-out, a third...
7411209 Field-effect transistor and method for manufacturing the same  
A method for manufacturing a field-effect transistor includes the steps of forming a source electrode and a drain electrode each containing hydrogen or deuterium; forming an oxide semiconductor...
7405482 High-k dielectric film, method of forming the same and related semiconductor device  
A high-k dielectric film, a method of forming the high-k dielectric film, and a method of forming a related semiconductor device are provided. The high-k dielectric film includes a bottom layer of...
Matches 101 - 150 out of 838 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >