Matches 451 - 500 out of 854 < 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 >
Match Document Document Title
6737929 Hybrid n&plus and p&plus gate-doped voltage variable capacitors to improve linear tuning range in voltage controlled oscillators  
A method for operating a wide band voltage controlled oscillator comprises using a control voltage to tune the capacitance of at least one hybrid n+ and p+ gate-doped voltage variable capacitor of...
6737688 Method for manufacturing semiconductor device  
The present invention discloses a method for manufacturing a semiconductor device. A device isolation film has a shape of an insulating spacer at an interface of active regions composed of a...
6734488 Semiconductor device and manufacturing method thereof  
A semiconductor device with a capacitor having a charge retaining capability improved by preventing generation of a leakage current in a capacitor dielectric film, and a manufacturing method of the...
6727539 Embedded vertical DRAM arrays with silicided bitline and polysilicon interconnect  
A structure and process for fabricating embedded vertical DRAM cells includes fabricating vertical MOSFET DRAM cells with silicided polysilicon layers in the array regions, the landing pad and/or...
6727534 Electrically programmed MOS transistor source/drain series resistance  
High-speed MOS transistors are provided by forming a conductive layer embedded in transistor gate sidewall spacers. The embedded conductive layer is electrically insulated from the gate electrode...
6724025 MOSFET having high and low dielectric materials  
A semiconductor device comprises a channel of a first conductive type formed on a surface layer of a semiconductor substrate, source and a drain of a second conductive type formed on both sides of...
6720630 Structure and method for MOSFET with metallic gate electrode  
A method of forming a metal oxide semiconductor field effect transistor (MOSFET) having a metallic gate electrode that is protected with hanging sidewall spacers during a subsequent gate oxidation...
6720220 Method of fabricating semiconductor device  
In a method of fabricating a semiconductor device having a MISFET of trench gate structure, a trench is formed from a major surface of a semiconductor layer of first conductivity type which serves...
6713826 Method for fabricating a semiconductor device having contacts self-aligned with a gate electrode thereof  
A gate electrode is made up of a lower electrode of polysilicon and an upper electrode including a low-resistance film. A nitride sidewall is formed to cover at least the side faces of an insulator...
6713814 DMOS transistor structure with gate electrode trench for high density integration and method of fabricating the structure  
A double diffused MOS (DMOS) transistor structure is provided that uses a trench trough suitable for high-density integration with mixed signal analog and digital circuit applications. The DMOS...
6713794 Lateral semiconductor device  
A semiconductor device including a semiconductor base, a first semiconductor region formed in the semiconductor base, a second semiconductor region formed in the semiconductor base, a third...
6713790 Semiconductor device and method for fabricating the same  
In the method for fabricating a semiconductor device of the present invention, a collector layer of a first conductivity type is formed in a region of a semiconductor substrate sandwiched by device...
6710414 Surface geometry for a MOS-gated device that allows the manufacture of dice having different sizes  
A surface geometry for a MOS-gated device is provided that allows device size to be varied in both the x-axis and the y-axis by predetermined increments. The actual device size is set or...
6710383 MISFET semiconductor device having a high dielectric constant insulating film with tapered end portions  
There is provided a semiconductor device configured as follows. On a semiconductor substrate, a titanium oxide film which is an insulating film having a higher dielectric constant than that of a...
6707087 Structure of chalcogenide memory element  
A memory structure that includes a control element electrode, a heater electrode, a memory element electrode, a chalcogenide based memory element disposed between the memory element electrode and...
6707079 Twin MONOS cell fabrication method and array organization  
Presented in this invention is a fabricating method and its array organization for a high-density twin MONOS memory device integrating a twin MONOS memory cell array and CMOS logic device circuit....
6700170 Insulated gate transistor having a gate insulator containing nitrogen atoms and fluorine atoms  
An insulated gate transistor in which nitride oxide film having a nitrogen concentration of 1×10 20 (/cm 3 ) or more and containing a halogen element is used as a gate insulator. Because the gate...
6700143 Dummy structures that protect circuit elements during polishing  
Circuit elements (e.g. transistor gates) formed over a semiconductor substrate are protected by adjacent dummy structures during mechanical or chemical mechanical polishing of an overlying dielectric.
6696340 Semiconductor devices having a non-volatile memory transistor and methods for manufacturing the same  
A method for manufacturing a semiconductor device having a non-volatile memory transistor may include the steps of forming a floating gate 22 over a semiconductor layer 10 through a first...
6693315 Semiconductor device with an active region and plural dummy regions  
There is provided a technique for improving the flatness at the surface of members embedded in a plurality of recesses without resulting in an increase in the time required for the manufacturing...
6690047 MIS transistor having a large driving current and method for producing the same  
In a MIS transistor, the top surfaces of source/drain regions (S/D diffusion layers) formed on a semiconductor substrate 1 are arranged nearer to a gate electrode than a channel plane on the...
6690046 Semiconductor assemblies, methods of forming structures over semiconductor substrates, and methods of forming transistors associated with semiconductor substrates  
The invention encompasses semiconductor assemblies that include a semiconductor substrate having a first region and a second region defined therein. A first oxide region is on the substrate and...
6690040 Vertical replacement-gate junction field-effect transistor  
A vertical JFET architecture. Generally, an integrated circuit structure includes a semiconductor area with a major surface formed along a plane and a first source/drain doped region formed in the...
6686620 FRAM and method of fabricating the same  
A FRAM having a ferroelectric capacitor comprises a cylindrical type bottom electrode. A ferroelectric film is thinly stacked over the bottom electrode, and the first portion of the top electrode...
6682966 Semiconductor device and method for producing the same  
A semiconductor device according to the present invention includes a semiconductor substrate; device isolation regions provided in the semiconductor substrate; a first conductivity type...
6680502 Buried digit spacer separated capacitor array  
The present invention relates to the field of semiconductor integrated circuits and, in particular, to capacitor arrays formed over the bit line of an integrated circuit substrate. The present...
6680130 High K dielectric material and method of making a high K dielectric material  
A dielectric material having a high dielectric constant includes a Group III metal oxide and a Group V element. The incorporation of the Group V element in the Group III metal oxide material...
6677630 Semiconductor device having ferroelectric film and manufacturing method thereof  
First and second semiconductor regions are formed separately from each other in a semiconductor substrate. A gate electrode is formed above the semiconductor substrate which lies between the first...
6677607 Organic semiconductor device having an oxide layer  
A semiconductor device having a flexible or rigid substrate ( 11 ) having a gate electrode ( 21 ), a source electrode ( 61 and 101 ), and a drain electrode ( 62 and 102 ) formed thereon and...
6674123 MOS control diode and method for manufacturing the same  
A MOS control diode is provided for power switching. In the MOS control diode, a switching speed is high and a reverse leakage current characteristic is improved without additionally needing...
6674108 Gate length control for semiconductor chip design  
A semiconductor device includes first and second polysilicon areas on a chip. The first polysilicon area corresponds to circuit elements of the semiconductor device. At least some of the first...
6667506 Variable capacitor with programmability  
Multiple variations of a variable capacitor or varactor 10 with built-in programmability; exhibiting high quality, Q, factors; manufactured in a standard CMOS process in silicon on insulator. The...
6667500 Semiconductor device and method for protecting such device from a reversed drain voltage  
An LDMOS field effect transistor ( 80 ) provides protection against the inadvertent reversal of polarity of voltage applied across the device. To protect an N-channel device, a floating P-type...
6664589 Technique to control tunneling currents in DRAM capacitors, cells, and devices  
Structure and methods for the use of PMOS devices, with p-type polysilicon gates or metal gates with large electron affinities or work functions are provided. These PMOS devices minimize tunneling...
6664585 Semiconductor memory device having multilayered storage node contact plug and method for fabricating the same  
A semiconductor memory device includes a bit line stack and a storage node contact hole which are aligned at bit line spacers formed at both side walls of the bit line stack and exposes a pad. The...
6664577 Semiconductor device includes gate insulating film having a high dielectric constant  
A semiconductor device comprising a semiconductor substrate and a MOSFET provided on the semiconductor substrate, the MOSFET including a gate insulating film and a gate electrode provided on the...
6664153 Method to fabricate a single gate with dual work-functions  
A method for forming a single gate having a dual work-function is described. A gate electrode is formed overlying a gate dielectric layer on a substrate. Sidewalls of the gate electrode are...
6661063 Semiconductor integrated circuit device  
Disclosed is a semiconductor integrated circuit device (e.g., an SRAM) having memory cells each of a flip-flop circuit constituted by a pair of drive MISFETs and a pair of load MISFETs, the MISFETs...
6661055 Transistor in semiconductor devices  
The present invention relates to a transistor in a semiconductor device and method of manufacturing the same. According to the present invention, the transistor has an auxiliary electrode to which...
6661044 Method of manufacturing MOSEFT and structure thereof  
A method of manufacturing an MOSFET. A substrate is provided. A trench is formed in the substrate. A sacrificial layer is formed to fill the trench. A doped semiconductive layer is formed over the...
6657267 Semiconductor device and fabrication technique using a high-K liner for spacer etch stop  
A semiconductor device and method of fabrication are disclosed. The semiconductor device includes a liner composed of a high-K material. The liner has a portion separating a sidewall spacer from a...
6657244 Structure and method to reduce silicon substrate consumption and improve gate sheet resistance during silicide formation  
A method of fabricating a semiconductor structure where a low gate resistance is obtained, while simultaneously reducing silicon consumption in the source/drain diffusion regions. The method...
6653674 Vertical source/drain contact semiconductor  
A semiconductor device is provided having angled dopant implantation and vertical trenches in the silicon on insulator substrate adjacent to the sides of a semiconductor gate. A second dopant...
6649543 Methods of forming silicon nitride, methods of forming transistor devices, and transistor devices  
The invention encompasses a method of forming silicon nitride on a silicon-oxide-comprising material. The silicon-oxide-comprising material is exposed to activated nitrogen species from a...
6646310 Four transistor static-random-access-memory cell  
A four-transistor SRAM cell, which could be viewed as at least including two word line terminals, comprises the following elements: a first word line terminal, a second word line terminal, a first...
6646296 Semiconductor integrated circuit and method for manufacturing the same  
A semiconductor integrated circuit has a MOS transistor formed on an SOI substrate and a subsidiary transistor provided between a body node and a drain node of the MOS transistor and sharing a gate...
6646295 Semiconductor device  
A semiconductor device including an insulated gate field effect transistor (IGFET) has been disclosed. The IGFET may be formed in an element region defined by an element isolation region ( 14 )...
6642584 Dual work function semiconductor structure with borderless contact and method of fabricating the same  
A dual work function semiconductor structure with borderless contact and method of fabricating the same are presented. The structure may include a field effect transistor (FET) having a...
6642577 Semiconductor device including power MOSFET and peripheral device and method for manufacturing the same  
First and second trenches are formed on an n + type substrate at a power MOSFET formation region and a peripheral device formation region, respectively. An n − type epitaxial film, a p type...
6642576 Power semiconductor device having layered structure of power semiconductor elements and terminal members  
An IGBT ( 121 ) and a diode ( 131 ) are joined onto an element arrangement portion ( 111 a ) of a first terminal member ( 111 ) and an element arrangement portion ( 112 a ) of a second terminal...
Matches 451 - 500 out of 854 < 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 >