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7419882 Alignment mark and alignment method for the fabrication of trench-capacitor dram devices  
A small-size (w<0.5 micrometers) alignment mark in combination with a “k1 process” is proposed, which is particularly suited for the fabrication of trench-capacitor DRAM devices which...
7411226 High electron mobility transistor (HEMT) structure with refractory gate metal  
An InP high electron mobility transistor (HEMT) structure in which a gate metal stack includes an additional thin layer of a refractory metal, such as molybdenum (Mo) or platinum (Pt) at a junction...
7391087 MOS transistor structure and method of fabrication  
An MOS device comprising a gate dielectric formed on a first conductivity type region. A gate electrode formed on the gate dielectric. A pair of sidewall spacers are formed along laterally opposite...
7342261 Light emitting device  
A light emitting device includes a substrate having a patterned surface and formed with a plurality of spaced apart cavities, and an epitaxial layer formed on the patterned surface of the...
7304335 Vertical-conduction and planar-structure MOS device with a double thickness of gate oxide and method for realizing power vertical MOS transistors with improved static and dynamic performance and high scaling down density  
A vertical-conduction and planar-structure MOS device having a double thickness gate oxide includes a semiconductor substrate including spaced apart active areas in the semiconductor substrate and...
7030506 Mask and method for using the mask in lithographic processing  
A method and mask to improve measurement of alignment marks is disclosed. An exemplary embodiment of the invention includes a resist mask with a patterned alignment mark comprising an assemblage of...
7023099 Wafer cleaning method and resulting wafer  
A method of removing organic particles from a registration mark on a semiconductor wafer. The method comprises providing a semiconductor wafer comprising at least one registration mark at least...
7005755 Semiconductor device and fabrication process thereof  
A semiconductor device formed on a SOI substrate includes isolation trenches formed in a first region and reaching an insulation layer buried in the SOI substrate, and alignment marks formed in a...
6979874 Semiconductor device and method of manufacturing thereof  
A plurality of p anode regions are formed at one surface of an n − substrate. A trench is formed in each p anode region. An ohmic junction region is formed between an anode metallic electrode...
6933523 Semiconductor alignment aid  
An alignment aid for semiconductor devices. The alignment aid includes an area having a high level of reflectivity and an adjacent area having a of low level of reflectivity. The area having a low...
6924516 Semiconductor device  
A semiconductor device includes: a substrate; a buffer layer including GaN formed on the substrate, wherein: surfaces of the buffer layer are c facets of Ga atoms; a channel layer including GaN or...
6906419 Semiconductor device having a wiring layer of damascene structure and method for manufacturing the same  
In a semiconductor device, a wiring pattern groove is formed in a surface portion of a silicon oxide film provided above a semiconductor substrate. A wiring layer is buried into the wiring pattern...
6844579 Organic device including semiconducting layer aligned according to microgrooves of photoresist layer  
An organic device including a substrate or a dielectric layer; a photoresist layer formed on the substrate or dielectric layer, wherein the photoresist layer is provided with a plurality of...
6787826 Heterostructure field effect transistor  
A high electron mobility transistor is constructed with a substrate, a lattice-matching buffer layer formed on the substrate, and a heavily doped p-type barrier layer formed on the buffer layer. A...
6780694 MOS transistor  
A method of fabricating a semiconductor transistor device comprises the steps as follows. Provide a semiconductor substrate with a gate dielectric layer thereover and a lower gate electrode...
6777722 Method and structure for double dose gate in a JFET  
A method for fabricating a junction field effect transistor (JFET) with a double dose gate structure. A trench is etched in the surface of a semiconductor substrate, followed by a low dose implant...
6773935 Confocal 3D inspection system and process  
A confocal three dimensional inspection system, and process for use thereof, allows for rapid inspecting of bumps and other three dimensional (3D) features on wafers, other semiconductor substrates...
6768143 Structure and method of making three finger folded field effect transistors having shared junctions  
An integrated circuit including a field effect transistor (FET) is provided in which the gate conducter has an even number of fingers disposed between alternating source and drain regions of a...
6753559 Transistor having improved gate structure  
A gate structure which includes a semiconductor substrate having a channel region, a gate insulator adjacent the channel region of the semiconductor substrate and a conductible gate adjacent the...
6653667 GaAs-based semiconductor field-effect transistor  
A GaAs-based semiconductor field-effect transistor in which electrons flowing from a source electrode to a drain electrode are controlled by a signal supplied to a gate electrode. The transistor...
6613623 High fMAX deep submicron MOSFET  
A method of forming a high f MAX deep submicron MOSFET, comprising the following steps of. A substrate having a MOSFET formed thereon is provided. The MOSFET having a source and a drain and...
6570238 Preweakened on chip metal fuse using dielectric trenches for barrier layer isolation  
A fuse for use in an integrated circuit includes a dielectric layer into which a trench or void is etched defined by a top opening and a bottom floor. The trench includes at least one undercut...
6504190 FET whose source electrode overhangs gate electrode and its manufacture method  
A gate electrode is in Schottky contact with the surface of a semiconductor substrate and extends in a first direction. A drain electrode is disposed on one side of the gate electrode, spaced apart...
6501146 Semiconductor device and method of manufacturing thereof  
A plurality of p anode regions are formed at one surface of an n − substrate. A trench is formed in each p anode region. An ohmic junction region is formed between an anode metallic electrode...
6483135 Field effect transistor  
A field effect transistor includes a semiconductor substrate with a channel layer being formed on its surface, a source electrode and a drain electrode formed at a distance on said semiconductor...
6448147 Semiconductor device and method for manufacturing the same  
As an outside box mark for automatic overlay measurement formed on a semiconductor substrate, a # shape is formed by laying two vertical lines formed by word lines over two parallel lines formed of...
6424005 LDMOS power device with oversized dwell  
An LDMOS device ( 10, 20, 50, 60 ) that is made with minimal feature size fabrication methods, but overcomes potential problems of misaligned Dwells ( 13 ). The Dwell ( 13 ) is slightly overstated...
6384442 Fabrication process for metal-insulator-metal capacitor with low gate resistance  
A new method is provided for the creation of openings in a layer of dielectric while at the same time forming a dielectric that forms the dielectric of MIM capacitors. Under the first embodiment of...
6323521 Thin film transistor with electrodes having compressive and tensile stress  
A thin film transistor includes a substrate, a gate electrode on the substrate, a gate insulating layer on the substrate and covering the gate electrode, an active layer on the gate insulating...
6258639 Sintered gate schottky barrier fet passivated by a degradation-stop layer  
A transistor structure with a degradation-stop layer that prevents degradation of underlying semiconductor layers while minimizing any increase in the gate leakage current is disclosed. In one...
6225653 Semiconductor components and methods of manufacturing semiconductor components  
A semiconductor component (1a) has a highly-doped substrate (4) of a first type of doping into which a highly-doped layer (15) of a second type of doping is introduced in some areas to form a pn...
6175134 Thin film transistors  
A thin film transistor includes a thin film transistor layer having a source region, a channel region and a drain region. In one implementation, a gate of the transistor is disposed laterally...
6147370 Field effect transistor with first and second drain electrodes  
To enhance a drain current voltage characteristics of a compound semiconductor field effect transistor, an n-GaAs substrate is used. After forming an n - -GaAs layer and an i-AlGaAs layer...
6078071 High-speed compound semiconductor device having an improved gate structure  
A semiconductor device includes a gate structure formed on a substrate in which an LDD structure is formed, wherein gate structure includes a Schottky electrode making a Schottky contact with a...
6078070 Broadband backside illuminated MESFET with collecting microlens  
A composite-layer semiconductor device includes a gate above a host substrate, an n++ contact layer above the gate, and source and drain ohmic contacts applied to the n++ contact layer. The source...
6075262 Semiconductor device having T-shaped gate electrode  
A compound semiconductor transistor has a structure in which a first insulating film is formed only under a overhang of a gate electrode an upper part of which is formed widely, and a second...
6060733 Formation of lightly doped regions under a gate having a reduced gate oxide  
The formation of lightly doped regions under a gate of a transistor that has a reduced gate oxide is disclosed. In one embodiment, a method includes four steps. In the first step, a gate is formed...
6060731 Insulated-gate semiconductor device having a contact region in electrical contact with a body region and a source region  
A MOSFET wherein the formation of a channel in a channel formation region is controlled by a voltage applied to an insulated gate, comprising: a semiconductor substrate; a first semiconductor layer...
6051863 Transistor gate conductor having sidewall surfaces upon which a spacer having a profile that substantially prevents silicide bridging is formed  
A method is provided for fabricating a transistor gate conductor having opposed sidewall surfaces upon which dielectric spacers are formed such that the spacer profile substantially tapers toward...
6013926 Semiconductor device with refractory metal element  
A semiconductor device includes a self-aligned refractory metal constituent in a recess in a semiconductor substrate and having the same plane pattern as a bottom surface of the recess. The width...
6002148 Silicon carbide transistor and method  
A silicon carbide MESFET (10) is formed to have a source (21) and a drain (22) that are self-aligned to a gate (16) of the MESFET (10). The gate (16) is formed to have a T-shaped structure with a...
5925903 Field-effect transistors and method of manufacturing the same  
A conductive layer made of n-type GaAs is formed on a semi-insulating substrate made of GaAs. A pair of contact regions made of n + -type GaAs are formed on the conductive layer. A source...
5925902 Semiconductor device having a schottky film with a vertical gap formed therein  
In a semiconductor device, a gate electrode is formed by sequentially forming a Schottky metal film, a barrier metal film, and a low-resistance metal film from the lower side. The Schottky metal...
5886373 Field effect transistor  
A method of fabricating a field effect transistor with a spike-gate structure including forming a semiconductor layer on a semi-insulating substrate, and forming a recess having a spike shape in...
5861644 High-frequency traveling wave field-effect transistor  
A method of improving the performance of a traveling wave field-effect transistor operated at frequencies in the microwave range or above the microwave range comprising the steps of forming a...
5786610 Field effect transistor  
A field effect transistor includes an active layer having a surface; a source electrode and a drain electrode disposed on the surface of the active layer; a first gate electrode disposed on the...
5717232 Semiconductor device sealed with molded resin  
A semiconductor device has an active layer formed on a semiconductor substrate with different types of junctions, a source region, a drain region, a T-shaped gate electrode in which the...
5691549 Sidewall strap  
The present invention is a sidewall connector providing a conductive path linking at least two conductive regions. The sidewall connector has a top portion comprising surface. A conductive member...
5585655 Field-effect transistor and method of manufacturing the same  
On a semi-insulating substrate is formed a conductive layer and an undoped layer. On specified regions of the conductive layer are formed ohmic electrodes, each serving as a source electrode or a...
5550065 Method of fabricating self-aligned FET structure having a high temperature stable T-shaped Schottky gate contact  
A method of fabricating a self-aligned FET having a semi-insulating substrate of GaAs or InP with a conductive channel formed either by doping the surface or an epitaxially grown channel by...
Matches 1 - 50 out of 101 1 2 3 >