Matches 1 - 50 out of 93 1 2 >


Match Document Document Title
8120139 Void isolated III-nitride device  
Isolation of III-nitride devices may be performed with a dopant selective etch that provides a smooth profile with little crystal damage in comparison to previously used isolation techniques. The...
8044379 Well-aligned, high aspect-ratio, high-density silicon nanowires and methods of making the same  
A method of producing silicon nanowires includes providing a substrate in the form of a doped material; formulating an etching solution; and applying an appropriate current density for an...
8039869 Gallium nitride device substrate containing a lattice parameter altering element  
A gallium nitride device substrate comprises a layer of gallium nitride containing an additional lattice parameter altering element located over a substitute substrate.
7977665 Nitride-based light emitting device  
A nitride-based light emitting device capable of achieving an enhancement in light emission efficiency and an enhancement in reliability is disclosed. The nitride-based light emitting device...
7892872 Silicon/germanium oxide particle inks, inkjet printing and processes for doping semiconductor substrates  
Highly uniform silica nanoparticles can be formed into stable dispersions with a desirable small secondary particle size. The silican particles can be surface modified to form the dispersions. The...
7868337 Light emitting diode and method for manufacturing the same  
Provided are a light emitting diode (LED) and a method for manufacturing the same. The LED includes an n-type semiconductor layer, an active layer, and a p-type semiconductor layer. The active...
7834344 Nanometric structure and corresponding manufacturing method  
A hosting structure of nanometric components is described advantageously comprising: a substrate; n array levels on said substrate, with n≧2, arranged consecutively on growing and parallel p...
7834345 Tunnel field-effect transistors with superlattice channels  
A semiconductor device includes a channel region; a gate dielectric over the channel region; a gate electrode over the gate dielectric; and a first source/drain region adjacent the gate dielectric....
7812339 Method for making a semiconductor device including shallow trench isolation (STI) regions with maskless superlattice deposition following STI formation and related structures  
A semiconductor device may include a semiconductor substrate having a surface, a shallow trench isolation (STI) region in the semiconductor substrate and extending above the surface thereof, and a...
7727601 Method for edge sealing barrier films  
An edge-sealed, encapsulated environmentally sensitive device. The device includes an environmentally sensitive device, and at least one edge-sealed barrier stack. The edge-sealed barrier stack...
7718996 Semiconductor device comprising a lattice matching layer  
A semiconductor device may include a first monocrystalline layer comprising a first material having a first lattice constant. A second monocrystalline layer may include a second material having a...
7692183 Polarity inversion of type-II InAs/GaSb superlattice photodiodes  
The subject invention comprises the realization of P-on-N type II InAs/GaSb superlattice photodiodes. A high-quality InAsSb layer lattice-mismatched to GaSb is used as a buffer to prepare the...
7659539 Semiconductor device including a floating gate memory cell with a superlattice channel  
A semiconductor device may include a semiconductor substrate and at least one non-volatile memory cell. The at least one memory cell may include spaced apart source and drain regions, and a...
7638791 InAs/GaSb infrared superlattice photodiodes doped with Beryllium  
An improved photodiode and method of producing an improved photodiode comprising doping an InAs layer of an InAs/GaSb region situated on top of an InAs/GaSb:Be superlattice and below an...
7598517 Superjunction trench device and method  
Semiconductor structures and methods are provided for a semiconductor device (40) employing a superjunction structure (41) and overlying trench (91) with embedded control gate (48). The method...
7586116 Semiconductor device having a semiconductor-on-insulator configuration and a superlattice  
A semiconductor device may include a substrate, an insulating layer adjacent the substrate, and a semiconductor layer adjacent a face of the insulating layer opposite the substrate. The device may...
7514328 Method for making a semiconductor device including shallow trench isolation (STI) regions with a superlattice therebetween  
A method for making a semiconductor device may include forming a plurality of shallow trench isolation (STI) regions in a semiconductor substrate. Further, a plurality of layers may be deposited...
7459720 Single crystal wafer and solar battery cell  
The present invention provides a single crystal wafer, wherein the main surface has a plane or a plane equivalent to a plane tilting with respect to a [100] axis of single crystal by angles of α ...
7435988 Semiconductor device including a MOSFET having a band-engineered superlattice with a semiconductor cap layer providing a channel  
A semiconductor device may include a substrate and at least one MOSFET adjacent the substrate including a superlattice. The superlattice may include a plurality of stacked groups of layers and a...
7417227 Scanning interference electron microscope  
The conventional detection technique has the following problems in detecting interference fringes: (1) Setting and adjustment are complex and difficult to conduct; (2) A phase image and an...
7375368 Superlattice for fabricating nanowires  
This disclosure relates to a system and method for creating nanowires. A nanowire can be created by exposing layers of material in a superlattice and dissolving and transferring material from edges...
7365357 Strain inducing multi-layer cap  
A strained transistor includes a silicon transistor, an encapsulating layer of silicon insulating material with an outer surface, and a stress inducing multilayer cap deposited on the outer surface...
7279701 Semiconductor device comprising a superlattice with upper portions extending above adjacent upper portions of source and drain regions  
A semiconductor device may include a semiconductor substrate and at least one metal oxide semiconductor field-effect transistor (MOSFET). The MOSFET may include spaced apart source and drain...
7198832 Method for edge sealing barrier films  
An edge-sealed, encapsulated environmentally sensitive device. The device includes at least one initial barrier stack, an environmentally sensitive device, and at least one additional barrier...
7141807 Nanowire capillaries for mass spectrometry  
A capillary for a mass spectrometry system is described. The capillary comprises a channel and a tip, and at least one of the channel and the tip comprises a nanowire material.
7102145 System and method for improving spatial resolution of electron holography  
A method for enhancing spatial resolution of a transmission electron microscopy TEM) system configured for electron holography. In an exemplary embodiment, the method includes configuring a first...
7061014 Natural-superlattice homologous single crystal thin film, method for preparation thereof, and device using said single crystal thin film  
Disclosed is a natural-superlattice homologous single-crystal thin film, which includes a complex oxide which is epitaxially grown on either one of a ZnO epitaxial thin film formed on a...
7038234 Thermoelectric module with Si/SiGe and B4C/B9C super-lattice legs  
A super-lattice thermoelectric device. The device includes p-legs and n-legs, each leg having a large number of alternating layers of two materials with differing electron band gaps. The n-legs in...
7023010 Si/C superlattice useful for semiconductor devices  
A Si/C superlattice useful for semiconductor devices comprises a plurality of epitaxially grown silicon layers alternating with carbon layers respectively adsorbed on surfaces of said silicon...
7009224 Metamorphic long wavelength high-speed photodiode  
A metamorphic device including a substrate structure upon which a semiconductor device can be formed. In the metamorphic device, a buffer layer matching a substrate lattice constant is formed at...
6998306 Semiconductor memory device having a multiple tunnel junction pattern and method of fabricating the same  
The present invention discloses a semiconductor memory device having a multiple tunnel junction pattern and a method of forming the same. The semiconductor memory device includes a unit cell...
6914256 Optoelectronic devices having arrays of quantum-dot compound semiconductor superlattices therein  
Methods of forming a nano-scale electronic and optoelectronic devices include forming a substrate having a semiconductor layer therein and a substrate insulating layer on the semiconductor layer....
6914008 Structure having pores and its manufacturing method  
A structure having pores includes a first layer containing alumina, a second layer that includes at least one of Ti, Zr, Hf, Nb, Ta, Mo, W and Si, and a third layer with electrical conductivity, in...
6900466 Semiconductor component for generating polychromatic electromagnetic radiation  
A semiconductor component for generating a polychromatic electromagnetic radiation has a semiconductor chip with a first semiconductor layer and a second semiconductor layer, which is provided...
6900479 Stochastic assembly of sublithographic nanoscale interfaces  
A method for controlling electric conduction on nanoscale wires is disclosed. The nanoscale wires are provided with controllable regions axially and/or radially distributed. Controlling those...
6849868 Methods and apparatus for resistance variable material cells  
The present invention is related to methods and apparatus to produce a memory cell or resistance variable material with improved data retention characteristics and higher switching speeds. In a...
6777808 Capacitor for signal propagation across ground plane boundaries in superconductor integrated circuits  
The self inductance associated with a capacitance A52 in a superconductor integrated circuit (FIG. 1) is reduced by adding a layer of superconductor metal (A54) overlying the capacitor, effectively...
6713788 Opto-electric mounting apparatus  
An integrated circuit is provided with one or more connectors which allow an opto-electric device to be mounted on the integrated circuit directly on top of or underneath of it. Multiple...
6645839 Method for improving a doping profile for gas phase doping  
A method for improving a doping profile using gas phase doping is described. In the method, silicon nitride and/or products of decomposition from a silicon nitride deposition are introduced in a...
6399968 Semiconductor photoreceiving device  
The present invention provides a photoreceiving device that is inexpensive and has good properties as a photoreceiving device for selectively receiving long wavelength light. This is a...
6359288 Nanowire arrays  
An array of nanowires having a relatively constant diameter and techniques and apparatus for fabrication thereof are described. In one embodiment, a technique for melting a material under vacuum...
6320212 Superlattice fabrication for InAs/GaSb/AISb semiconductor structures  
A semiconductor structure and a method of forming same is disclosed. The method includes forming, on a substrate, an n-doped collector structure of InAs/AlSb materials; forming a base structure on...
6310373 Metal insulator semiconductor structure with polarization-compatible buffer layer  
An MIS device (20) includes a semiconducting substrate (22), a silicon nitride buffer layer (24), a ferroelectric metal oxide superlattice material (26), and a noble metal top electrode (28). The...
6294818 Parallel-stripe type semiconductor device  
A semiconductor device has a drift region in which a drift current flows if it is in the ON mode and which is depleted if it is in the OFF mode. The drift region is formed as a structure having a...
6291832 Resonant tunneling diode latch  
A method/system for forming a resonant tunneling diode latch is disclosed. The method/system comprises the steps of forming a gate on a silicon substrate, the silicon substrate having at least one...
6211531 Controllable conduction device  
A controllable conduction device in the form of a transistor comprises source and drain regions 5, 2 between which extends a conduction path P for charge carriers, a gate 4 for controlling charge...
6191465 Solid state radiation detector  
A radiation detection structural principle for improved detection wherein absorbtion members of high density and bandgap semiconductor material and meeting all efficiency limiting requirements are...
6080997 Electromagnetic-wave detector  
An electromagnetic-wave detector having an electromagnetic-wave detection unit having the structure that M (M≥1) contiguous pairs of a metallic layer and an insulating layer are provided at the s...
5831279 Device and method providing weak links in a superconducting film and device comprising weak links  
A device with weak links (Josephson junctions) in a superconducting film has two single crystals connected through an interconnecting arrangement that may have one or more sublayers. At least two...
5825049 Resonant tunneling device with two-dimensional quantum well emitter and base layers  
A double electron layer tunneling device is presented. Electrons tunnel from a two dimensional emitter layer to a two dimensional tunneling layer and continue traveling to a collector at a lower...
Matches 1 - 50 out of 93 1 2 >