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7615809 |
Junction field effect transistor and method of manufacturing the same
According to a junction FET of the present invention, the depth of a channel region is made shallow by selectively performing ion implantation and diffusion. Since the channel region forms a pn...
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7605412 |
Distributed high voltage JFET
A Junction Field Effect Transistor (JFET) can be fabricated with a well region that include a channel region having an average dopant concentration substantially less the average doping...
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7569874 |
Device and method of manufacture for a low noise junction field effect transistor
A microelectronic product and the method for manufacturing the product are provided. A source and drain are spaced from one another in a first direction and are connected to opposing ends of a...
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7557393 |
JFET with built in back gate in either SOI or bulk silicon
A Junction Field-Effect transistor with no surface contact for the back gate and twice as much transconductance in the channel and with a higher switching speed is achieved by intentionally...
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7525136 |
JFET device with virtual source and drain link regions and method of fabrication
A junction field effect transistor comprises a semiconductor substrate. A source region of a first conductivity type is formed in the substrate. A drain region of the first conductivity type is...
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7504677 |
Multi-gate enhancement mode RF switch and bias arrangement
Methods and apparatus are provided for RF switches ( 100, 200 ). In a preferred embodiment, the apparatus comprises one or more multi-gate n-channel enhancement mode FET transistors ( 50, 112, 114...
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7442590 |
Method for forming a semiconductor device having a fin and structure thereof
A method for forming a semiconductor device includes providing a semiconductor layer, forming a passivation layer over the semiconductor layer, wherein the passivation layer has an opening having...
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7420232 |
Lateral junction field effect transistor and method of manufacturing the same
A lateral junction field effect transistor includes a first gate electrode layer arranged in a third semiconductor layer between source/drain region layers, having a lower surface extending on the...
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7417270 |
Distributed high voltage JFET
A Junction Field Effect Transistor (JFET) can be fabricated with a well region that include a channel region having an average dopant concentration substantially less the average doping...
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7385249 |
Transistor structure and integrated circuit
A process for forming a conductive gate structure for a sub-0.25 MOSFET technology, has been developed. The process features a conductive gate structure defined from a composite polysilicon or...
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7376403 |
Terahertz radiation mixer
A terahertz radiation mixer comprises a heterodyned field-effect transistor (FET) having a high electron mobility heterostructure that provides a gatable two-dimensional electron gas in the channel...
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7312486 |
Stripe board dummy metal for reducing coupling capacitance
Dishing is known to be a problem after CMP of dielectric layers in which the distribution of embedded metal is non-uniform. This problem has been solved by populating those areas where the density...
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7274053 |
Fin device with capacitor integrated under gate electrode
A fin-type field effect transistor (FinFET) has a fin having a center channel portion, end portions comprising source and drain regions, and channel extensions extending from sidewalls of the...
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7262447 |
Metal oxide silicon transistor and semiconductor apparatus having high λ and β performances
A semiconductor apparatus includes a MOS transistor having a semiconductor substrate providing as a channel region between a source and a drain. A gate electrode is formed on the semiconductor...
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7214576 |
Manufacturing method of semiconductor device
A manufacturing method of a semiconductor device disclosed herein comprises: forming a first protrusion; forming a second protrusion which is higher than the first protrusion; forming a first...
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7161197 |
RF switching circuit for use in mobile communication systems
An RF switching circuit according to the present invention includes: a plurality of input/output terminals for inputting and outputting an RF signal; and a switch for opening and closing an...
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7115921 |
Nano-scaled gate structure with self-interconnect capabilities
Gate conductors on an integrated circuit are formed with enlarged upper portions which are utilized to electrically connect the gate conductors with other devices. A semiconductor device comprises...
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7109516 |
Strained-semiconductor-on-insulator finFET device structures
The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
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7091130 |
Method of forming a nanocluster charge storage device
A plurality of memory cell devices is formed by using an intermediate dual polysilicon-nitride control electrode stack overlying nanoclusters. The stack includes a first-formed polysilicon-nitride...
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7075132 |
Programmable junction field effect transistor and method for programming the same
A programmable junction field effect transistor (JFET) with multiple independent gate inputs. A drain, source and a plurality of gate regions for controlling a conductive channel between the source...
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7061055 |
Double-gate field-effect transistor, integrated circuit using the transistor and method of manufacturing the same
A double-gate field-effect transistor includes a substrate, an insulation film formed on the substrate, source, drain and channel regions formed on the insulation film from a semiconductor crystal...
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7015550 |
Nonvolatile semiconductor memory device
A memory cell and a selection transistor for selecting the memory cell are provided. The memory cell includes a floating gate formed on a semiconductor substrate via a first gate insulation film, a...
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6946374 |
Methods of manufacturing flash memory semiconductor devices
A manufacturing method for fabricating flash memory semiconductor devices is disclosed. According to one example, the manufacturing method may include: forming a trench on a silicon substrate by...
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6894337 |
System and method for forming stacked fin structure using metal-induced-crystallization
A method facilitates the formation of a stacked fin structure for a semiconductor device that includes a substrate. The method includes forming one or more oxide layers on the substrate and forming...
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6888182 |
Thin film transistor, method for manufacturing same, and liquid crystal display device using same
A thin film transistor of the present invention is provided with (i) a plurality of divided channel regions formed under a gate electrode, and (ii) divided source regions and divided drain regions...
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6855989 |
Damascene finfet gate with selective metal interdiffusion
A fin field effect transistor includes a fin, a source region, a drain region, a first gate electrode and a second gate electrode. The fin includes a channel. The source region is formed adjacent a...
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6853020 |
Double-gate semiconductor device
A double-gate semiconductor device includes a substrate, an insulating layer, a fin and two gates. The insulating layer is formed on the substrate and the fin is formed on the insulating layer. A...
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6838735 |
Trench FET with non overlapping poly and remote contact therefor
A power MOSFET has a plurality of spaced rows of parallel coextensive trenches. The trenches are lined with a gate oxide and are filled with conductive polysilicon. Spaced narrow polysilicon strips...
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6831310 |
Integrated circuit having multiple memory types and method of formation
A transistor ( 10 ) is formed having three separately controllable gates ( 44, 42, 18 ). The three gate regions may be electrically biased differently and the gate regions may have different...
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6806805 |
Low loss high Q inductor
A high Q inductive clement with low losses, high inductance and high efficiency is disclosed. The high Q inductive element with one or more inductive loops is formed over a silicon micro structure...
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6762448 |
FinFET device with multiple fin structures
A semiconductor device includes a group of fin structures. The group of fin structures includes a conductive material and is formed by growing the conductive material in an opening of an oxide...
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6750487 |
Dual double gate transistor
The present invention provides a dual gate transistor and a method for forming the same that results in improved device performance and density. The present invention uses a double gate design to...
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6693314 |
Junction field-effect transistor with more highly doped connecting region
A junction field-effect transistor containing a semiconductor region with an inner region is described. In addition, a first and a second connecting region, respectively, are disposed within the...
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6627973 |
Void-free interlayer dielectric (ILD0) for 0.18-micron flash memory semiconductor device
A method of eliminating voids in the interlayer dielectric material of 0.18-μm flash memory semiconductor devices and a semiconductor device formed by the method. The present invention provides a...
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6344379 |
Semiconductor device with an undulating base region and method therefor
A transistor ( 30 ) uses a single continuous base region ( 40 ) with an undulating structure. The semiconductor device is an insulated gate field effect transistor having a semiconductor substrate...
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6339024 |
Reinforced integrated circuits
A method of manufacturing integrated circuits wherein a conductive structure in a topmost semiconductive layer of an integrated circuit is provided having a thickness greater than or equal to 1.5...
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6188111 |
Dual gate semiconductor device for shortening channel length
In a semiconductor device including a MOSFET, a first semiconductor layer is formed over a silicon substrate and has a gate region. Further, a second semiconductor layer is formed over the first...
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6020608 |
Junction-type field-effect transistor with improved impact-ionization resistance
Junction-type field-effect transistors are disclosed exhibiting improved resistance to impact ionization. A p-type gate region is formed above an n-type channel region between an n-type drain...
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6020607 |
Semiconductor device having junction field effect transistors
An N - type epitaxial layer is formed on a P type semiconductor substrate, and a P + type insulative isolating layer is so formed as to reach the semiconductor substrate from the surface of the...
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6005267 |
MES/MIS FET with split-gate RF input
Disclosed is an improved field effect transistor (FET) employing both a metal-semiconductor (MES) gate and a metal-insulator-semiconductor (MIS) gate, which FET is particularly useful to provide...
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5990504 |
Finger structured MOSFET
A boundary of a well 102 of a finger structured MOSFET is positioned between an element region 104 and a gate contact 108. With this geometry, it is feasible to reduce the well and attain a...
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5945699 |
Reduce width, differentially doped vertical JFET device
A load device for an MOS transistor, such as that of a memory cell, includes a differentially doped vertical JFET structure that contains two separate and distinct opposite conductivity type...
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5920085 |
Multiple floating gate field effect transistors and methods of operating same
A field effect transistor includes laterally spaced apart source and drain regions in a substrate, laterally spaced apart undoped regions in the substrate between the laterally spaced apart source...
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5834802 |
Metal semiconductor field effect transistors having improved intermodulation distortion using different pinch-off voltages
A comb-shape MESFET assembly has a plurality of unit FETs including first, second and third groups of unit FETs. The pinch-off voltages of the unit FETs are different from group to group by a step...
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5831303 |
Field effect transistor utilizing the gate structure two-dimensionally
The object of the invention is a field-effect transistor comprising a drain (D) and a source (S) and a gate (G) with a determined width (W) and length (L), equipped with means (G1-G2) for...
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5818070 |
Electro-optical device incorporating a peripheral dual gate electrode TFT driver circuit
A thin file transistor (TPT) has first (lower) and second (upper) gate electrodes which are provide respectively above and under a semiconductor active layer and first and second insulating films...
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5811831 |
Semiconductor device exploiting a quantum interference effect
A semiconductor device exploiting a quantum interference effect is disclosed. The device comprises: a semiconductor body; n-1 (n≥3) rods of forbidden regions extending along one direction, the...
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5804848 |
Field effect transistor having multiple gate electrodes surrounding the channel region
A field effect transistor comprising source and drain regions, a channel region composed of a semiconductor layer formed between the source and drain regions and gate electrodes disposed to at...
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5793058 |
Multi-gate offset source and drain field effect transistors and methods of operating same
A field effect transistor includes laterally spaced apart source and drain regions in a substrate, laterally spaced apart undoped regions in the substrate between the laterally spaced apart source...
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5789791 |
Multi-finger MOS transistor with reduced gate resistance
The gate resistance of a high-frequency multi-finger MOS transistor is reduced by shorting together the ends of each of the gates by utilizing gate contacts, metal regions, vias, and a metal layer....
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