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8680588 Field effect transistor with buried gate pattern  
A field effect transistor includes a buried gate pattern that is electrically isolated by being surrounded by a tunneling insulating film. The field effect transistor also includes a channel region...
8669147 Methods of forming high mobility fin channels on three dimensional semiconductor devices  
Disclosed herein are various methods of forming high mobility fin channels on three dimensional semiconductor devices, such as, for example, FinFET semiconductor devices. In one example, the method...
8643097 Trench-gate metal oxide semiconductor device and fabricating method thereof  
A trench-gate metal oxide semiconductor device includes a substrate, a first gate dielectric layer, a first gate electrode and a first source/drain structure. The substrate has a first doping...
8614487 Split dual gate field effect transistor  
A semiconductor device with at least two gate regions. The device includes a substrate region including a surface, a source region in the substrate region, and a drain region in the substrate...
8564057 Power devices, structures, components, and methods using lateral drift, fixed net charge, and shield  
Lateral power devices where immobile electrostatic charge is emplaced in dielectric material adjoining the drift region. A shield gate is interposed between the gate electrode and the drain, to...
8541302 Electronic device including a trench with a facet and a conductive structure therein and a process of forming the same  
An electronic device can include a transistor structure including a semiconductor layer overlying a substrate and a trench extending into the semiconductor layer having a tapered shape. In an...
8466501 Asymmetric silicon-on-insulator (SOI) junction field effect transistor (JFET) and a method of forming the asymmetrical SOI JFET  
An asymmetric silicon-on-insulator (SOI) junction field effect transistor (JFET) and a method. The JFET includes a bottom gate on an insulator layer, a channel region on the bottom gate and, on the...
8455932 Local interconnect structure self-aligned to gate structure  
A common cut mask is employed to define a gate pattern and a local interconnect pattern so that local interconnect structures and gate structures are formed with zero overlay variation relative to...
8441048 Horizontally depleted metal semiconductor field effect transistor  
The present invention provides a horizontally depleted Metal Semiconductor Field Effect Transistor (MESFET). A drain region, a source region, and a channel region are formed in the device layer...
8415216 Multi-gate non-planar field effect transistor structure and method of forming the structure using a dopant implant process to tune device drive current  
Disclosed are embodiments of a semiconductor structure that includes one or more multi-gate field effect transistors (MUGFETs), each MUGFET having one or more semiconductor fins. In the...
8395185 Switching element  
A switching element comprising: an insulative substrate; a first electrode and a second electrode provided on one surface of the insulative substrate; and an interelectrode gap which is provided...
8378392 Trench MOSFET with body region having concave-arc shape  
A trench Metal Oxide Semiconductor Field Effect Transistor with improved body region structures is disclosed. By forming the inventive body region structures with concave-arc shape with respect to...
8373209 Semiconductor device having D mode JFET and E mode JFET and method for manufacturing the same  
A semiconductor device includes: a substrate; and depletion and enhancement mode JFETs. The depletion mode JFET includes: a concavity on the substrate; a channel layer in the concavity; a first...
8264017 Junction field effect transistor having a double gate structure  
A junction field effect transistor includes a channel region, a gate region coupled to the channel region, a well tap region coupled to the gate region and the channel region, and a well region...
8216934 Semiconductor device suitable for a stacked structure  
A semiconductor device is provided that forms a three-dimensional semiconductor device having semiconductor devices stacked on one another. In this semiconductor device, a hole is formed in a...
8169007 Asymmetric junction field effect transistor  
A junction field effect transistor (JFET) in a semiconductor substrate includes a source region, a drain region, a channel region, an upper gate region, and a lower gate region. The lower gate...
8149619 Memory structure having volatile and non-volatile memory portions  
A memory array is provided that includes a transistor having two active gates sharing a source, a drain, and a channel of the transistor. One of the active gates may be coupled to a volatile memory...
8138526 Semiconductor structures including dual fins  
Fin-FET (fin field effect transistor) devices and methods of fabrication are disclosed. The Fin-FET devices include dual fin structures that may form a channel region between a source region and a...
8125007 Integrated circuit including FinFET RF switch angled relative to planar MOSFET and related design structure  
An integrated circuit (IC) includes a fin field effect transistor (FinFET) radio frequency (RF) switch; and a planar complementary metal-oxide semiconductor field effect transistor (MOSFET). The...
8022467 Nonvolatile semiconductor memory device and method of fabricating the same  
A nonvolatile semiconductor memory device includes a first insulating layer, charge storage layers, element isolation insulating films, and a second insulating layer formed on the charge storage...
8017476 Method for manufacturing a junction field effect transistor having a double gate  
A junction field effect transistor includes a channel region, a gate region coupled to the channel region, a well tap region coupled to the gate region and the channel region, and a well region...
7989867 Semiconductor memory device having a semiconductor layer disposed between first and second gate electrodes  
A semiconductor memory device includes a semiconductor substrate, a semiconductor layer, a source/drain layer, first and second insulating films, and first and second gate electrodes. The...
7977196 Semiconductor device with increased channel area and fabrication method thereof  
A semiconductor device includes an active region defining at least four surfaces, the four surfaces including first, second, third, and fourth surfaces, a gate insulation layer formed around the...
7977749 Semiconductor device with increased channel area  
A semiconductor device includes an active region defining at least four surfaces, the four surfaces including first, second, third, and fourth surfaces, a gate insulation layer formed around the...
7977714 Wrapped gate junction field effect transistor  
A wrapped gate junction field effect transistor (JFET) with at least one semiconductor channel having a first conductivity type doping is provided. Both sidewalls of each of the at least one...
7973344 Double gate JFET with reduced area consumption and fabrication method therefor  
Double gate JFET with reduced area consumption and fabrication method therefore. Double-gate semiconductor device including a substrate having a shallow trench isolator region comprising a first...
7964917 Semiconductor device including liner insulating film  
A semiconductor device includes a plurality of first MIS transistors and a plurality of second MIS transistors formed on a semiconductor substrate and a liner insulating film applying stress along...
7928445 Semiconductor MOS transistor device  
A disclosed semiconductor device includes a MOS transistor that causes no problems concerning the formation of a thick gate insulating film and that is applicable to high withstand voltage devices....
7915107 Integrated circuit using complementary junction field effect transistor and MOS transistor in silicon and silicon alloys  
This invention describes a method of building complementary logic circuits using junction field effect transistors in silicon. This invention is ideally suited for deep submicron dimensions,...
7884459 Semiconductor device suitable for a stacked structure  
A semiconductor device is provided that forms a three-dimensional semiconductor device having semiconductor devices stacked on one another. In this semiconductor device, a hole is formed in a...
7859053 Independently accessed double-gate and tri-gate transistors in same process flow  
A method for fabricating double-gate and tri-gate transistors in the same process flow is described. In one embodiment, a sacrificial layer is formed over stacks that include semiconductor bodies...
7851830 Multigate Schottky diode  
A multigate Schottky diode comprising an electrically conducting active semiconductor region;first and second electrically connected metallic contact arms on the active semiconductor region forming...
7785973 Electronic device including a gate electrode having portions with different conductivity types and a process of forming the same  
An electronic device can include a gate electrode having different portions with different conductivity types. In an embodiment, a process of forming the electronic device can include forming a...
7767532 Method for manufacturing an EEPROM cell  
A method for manufacturing an EEPROM cell including a dual-gate MOS transistor. The method includes the steps of providing a semiconductor substrate covered with a stack of first and second layers,...
7759721 Single poly non-volatile memory device with inversion diffusion regions and methods for operating the same  
A non-volatile memory device comprises a substrate with the dielectric layer formed thereon. A control gate and a floating gate are then formed on top of the dielectric layer. Accordingly, a...
7705358 Semiconductor device and method of manufacturing the same  
It is an object to improve operation characteristics and reliability of a semiconductor device. A semiconductor device which includes an island-shaped semiconductor film having a channel-formation...
7700446 Virtual body-contacted trigate  
A field effect transistor (FET) and method of forming the FET comprises a substrate; a silicon germanium (SiGe) layer over the substrate; a semiconductor layer over and adjacent to the SiGe layer;...
7691694 Silicon carbide semiconductor device having junction field effect transistor and method for manufacturing the same  
A silicon carbide semiconductor device includes a substrate and a junction field effect transistor. The transistor includes: a first semiconductor layer disposed on the substrate; a first gate...
7671388 Lateral junction field effect transistor and method of manufacturing the same  
A lateral junction field effect transistor includes a first gate electrode layer arranged in a third semiconductor layer between source/drain region layers, having a lower surface extending on the...
7651886 Semiconductor device and manufacturing process thereof  
A semiconductor device including a circuit structure and a protective layer is provided. The circuit structure has multiple contacts. The protective layer is located on the circuit structure and...
7635881 Continuous multigate transistors  
An N doped area neighboring to a P doped area on a semiconductor material, function respectively as a first gate and a second gate for transistors. A dielectric layer is made under the gates. A...
7615809 Junction field effect transistor and method of manufacturing the same  
According to a junction FET of the present invention, the depth of a channel region is made shallow by selectively performing ion implantation and diffusion. Since the channel region forms a pn...
7605412 Distributed high voltage JFET  
A Junction Field Effect Transistor (JFET) can be fabricated with a well region that include a channel region having an average dopant concentration substantially less the average doping...
7569874 Device and method of manufacture for a low noise junction field effect transistor  
A microelectronic product and the method for manufacturing the product are provided. A source and drain are spaced from one another in a first direction and are connected to opposing ends of a...
7525136 JFET device with virtual source and drain link regions and method of fabrication  
A junction field effect transistor comprises a semiconductor substrate. A source region of a first conductivity type is formed in the substrate. A drain region of the first conductivity type is...
7504677 Multi-gate enhancement mode RF switch and bias arrangement  
Methods and apparatus are provided for RF switches (100, 200). In a preferred embodiment, the apparatus comprises one or more multi-gate n-channel enhancement mode FET transistors (50, 112, 114)....
7442590 Method for forming a semiconductor device having a fin and structure thereof  
A method for forming a semiconductor device includes providing a semiconductor layer, forming a passivation layer over the semiconductor layer, wherein the passivation layer has an opening having...
7385249 Transistor structure and integrated circuit  
A process for forming a conductive gate structure for a sub-0.25 MOSFET technology, has been developed. The process features a conductive gate structure defined from a composite polysilicon or...
7376403 Terahertz radiation mixer  
A terahertz radiation mixer comprises a heterodyned field-effect transistor (FET) having a high electron mobility heterostructure that provides a gatable two-dimensional electron gas in the channel...
7312486 Stripe board dummy metal for reducing coupling capacitance  
Dishing is known to be a problem after CMP of dielectric layers in which the distribution of embedded metal is non-uniform. This problem has been solved by populating those areas where the density...
Matches 1 - 50 out of 178 1 2 3 4 >