Matches 1 - 50 out of 597 1 2 3 4 5 6 7 8 9 10 11 12 >


Match Document Document Title
8183602 Nonvolatile semiconductor memory device including via-holes continuously formed through plural cell array layers  
A nonvolatile semiconductor memory device comprises a semiconductor substrate; a cell array block formed on the semiconductor substrate and including plural stacked cell array layers each with a...
8183598 Semiconductor device, semiconductor module, and electronic apparatus including process monitoring pattern overlapping with I/O pad  
A semiconductor device includes a process monitoring pattern overlapping with an input/output (I/O) pad. The semiconductor device may include a semiconductor substrate having a cell array region...
8178909 Integrated circuit cell architecture configurable for memory or logic elements  
An improved integrated circuit cell architecture is provided for configurability between a memory cell or logic elements. The cell architecture is configured on variable layers above a first layer...
8178908 Electrical contact structure having multiple metal interconnect levels staggering one another  
An electrical contact structure distributes current along a length thereof. The electrical contact structure includes a plurality of n metal rectangles on n levels of metal. The rectangle on one...
8178907 Nanoscopic wire-based electrical crossbar memory-devices and arrays  
Electrical devices comprised of nanoscopic wires are described, along with methods of their manufacture and use. The nanoscopic wires can be nanotubes, preferably single-walled carbon nanotubes....
8174010 Unified test structure for stress migration tests  
A unified test structure which is applicable for all levels of a semiconductor device including a current path chain having a first half chain and a second half chain, wherein each half chain...
8163640 Metal gate compatible electrical fuse  
A dielectric material layer is formed on a metal gate layer for a metal gate electrode, and then lithographically patterned to form a dielectric material portion, followed by formation of a...
RE43320 Semiconductor device and manufacturing method thereof  
There is disclosed a semiconductor device comprising a first metal wiring buried in a first wiring groove formed, via a first barrier metal, in a first insulating layer formed on a semiconductor...
8154128 3D integrated circuit layer interconnect  
A three-dimensional 3D interconnect structure with a small footprint is described, useful for connection from above to levels of circuit structures in a multi-level device. Also, an efficient and...
8154053 Programmable metal elements and programmable via elements in an integrated circuit  
An integrated circuit may include one or more cells, with each cell comprising a first and a second input terminal, a first and a second output terminal, and a number of connection stages...
8134187 Integrated mask-programmable logic devices with multiple metal levels and manufacturing process thereof  
Integrated mask-programmable device, having a plurality of metal levels including a top metal level, a bottom metal level and a first intermediate metal level formed between the top and bottom...
8136071 Three dimensional integrated circuits and methods of fabrication  
The invention relates to multi-planar logic components in a three-dimensional (3D) integrated circuit (IC) apparatus configuration. A multi-planar integrated circuit connected by through silicon...
8129833 Stacked integrated circuit packages that include monolithic conductive vias  
Microelectronic packages are fabricated by stacking integrated circuits upon one another. Each integrated circuit includes a semiconductor layer having microelectronic devices and a wiring layer on...
8129759 Semiconductor package and method using isolated VSS plane to accommodate high speed circuitry ground isolation  
Embodiments of the invention include a semiconductor integrated circuit package that includes a substrate which can have an integrated circuit die attached thereto. The package includes a dedicated...
8120068 Three-dimensional memory structures having shared pillar memory cells  
A three-dimensional non-volatile memory system is disclosed including a memory array utilizing shared pillar structures for memory cell formation. A shared pillar structure includes two...
8115325 Semiconductor integrated circuit including plurality of bonding pads  
A semiconductor integrated circuit includes a plurality of bonding pads formed along an edge of a semiconductor substrate; a plurality of I/O cells arranged along the edge under the plurality of...
8110907 Semiconductor device including first substrate having plurality of wires and a plurality of first electrodes and a second substrate including a semiconductor chip being mounted thereon, and second electrodes connected with first electrodes of first substrate  
A semiconductor device includes a semiconductor chip, a first substrate, and a second substrate. The first substrate includes a plurality of wires and a plurality of first electrodes, each first...
8097903 Semiconductor memory device  
A semiconductor memory device comprises a semiconductor substrate; a memory block formed on the semiconductor substrate and including plural stacked cell array layers of cell arrays each comprising...
8093679 Integrated BEOL thin film resistor  
In the course of forming a resistor in the back end of an integrated circuit, an intermediate dielectric layer is deposited and a trench etched through it and into a lower dielectric layer by a...
8072070 Low fabrication cost, fine pitch and high reliability solder bump  
A barrier layer is deposited over a layer of passivation including in an opening to a contact pad created in the layer of passivation. A column of three layers of metal is formed overlying the...
8063416 Semiconductor device  
In a substrate power supply cell, a portion of a substrate power supply wiring is exposed by forming a power supply wiring in a U-shape, and a connection portion to an upper-layer wiring is...
8054673 Three dimensionally stacked non volatile memory units  
A memory unit including a first transistor spanning a first transistor region in a first layer of the memory unit; a second transistor spanning a second transistor region in a second layer of the...
8053777 Thin film transistors for imaging system and method of making the same  
A detector including an electrode formed from a first layer of conductive material, a readout line formed from a second layer of conductive material, and a via electrically connecting the readout...
8053346 Semiconductor device and method of forming gate and metal line thereof with dummy pattern and auxiliary pattern  
A gate in a semiconductor device is formed to have a dummy gate pattern that protects a gate. Metal lines are formed to supply power for a semiconductor device and transfer a signal. A...
8053814 On-chip embedded thermal antenna for chip cooling  
An apparatus comprises a first layer within a semiconductor chip having active structures electrically connected to other active structures and having electrically isolated first inactive...
8048736 Semiconductor device comprising a capacitor in the metallization system and a method of forming the capacitor  
By forming metal capacitors in the metallization structures of semiconductor devices, complex manufacturing sequences in the device level may be avoided. The process of manufacturing the metal...
8030776 Integrated circuit with protective structure  
A structure includes a semiconductor substrate having semiconductor devices formed on or in the substrate. An interconnecting metallization structure is formed over and connected to the devices....
8026537 Semiconductor integrated circuit having an oblique global signal wiring and semiconductor integrated circuit wiring method  
A semiconductor integrated circuit includes a function block arranged on a substrate, a first buffering cell arranged adjacent to a first side of the function block, a second buffering cell...
8021897 Methods of fabricating a cross point memory array  
Some embodiments include cross-point memory structures. The structures may include a line of first electrode material extending along a first horizontal direction, a multi-sided container of access...
8024689 Semiconductor integrated circuit apparatus with low wiring resistance  
It is an object to provide a semiconductor integrated circuit which can easily be designed and has a low wiring resistance, and a method and apparatus for designing the semiconductor integrated...
8022443 Memory and interconnect design in fine pitch  
An integrated circuit includes a plurality of signal lines. A first signal line layer includes a plurality of first signal lines. A second signal line layer includes a plurality of second signal...
8022442 Semiconductor device having STI with nitride liner and UV light shielding film  
A semiconductor device has: a silicon substrate; trench formed downward from the surface of the silicon substrate, the trench defining active regions on the surface of the silicon substrate; a...
8022547 Non-volatile memory cells including small volume electrical contact regions  
A non-volatile memory cell that includes a first electrode; a second electrode; and an electrical contact region that electrically connects the first electrode and the second electrode, the...
8022516 Metal leadframe package with secure feature  
A fabrication method for a BGA or LGA package includes a low-cost metal leadframe with internally extended leads. I/O attach lands can be placed at any location on the metal leadframe, including...
8017943 Semiconductor device with reduced pad pitch  
A semiconductor device includes a first pad, a second pad and a third pad. The first pad and the third pad are electrically connected to each other. The first pad and the second pad are used for...
8013362 Semiconductor integrated circuit and multi-chip module  
In a semiconductor integrated circuit requiring a large number of pads, an internal circuit is arranged in the center portion, and a plurality of two kinds of I/O circuits for inputting and...
8013364 Semiconductor devices and structures thereof  
A structure having air gaps between interconnects is disclosed. A first insulating material is deposited over a workpiece, and a second insulating material having a sacrificial portion is deposited...
8004017 Buried circumferential electrode microcavity plasma device arrays, electrical interconnects, and formation method  
A preferred embodiment microcavity plasma device array of the invention includes a plurality of first metal circumferential metal electrodes that surround microcavities in the device. The first...
8004085 Semiconductor device and method of manufacturing semiconductor device  
A semiconductor device has an element interconnection 2, a top-layer element interconnection 4, a super-connect interconnection 10 and a bump 7. The element interconnection 2 is provided on a...
8004086 Semiconductor device  
The present invention provides a semiconductor device capable of preventing occurrence of cracking and the like, taking a large area, where wiring and the like that function as elemental devices...
7994545 Methods, structures, and designs for self-aligning local interconnects used in integrated circuits  
Methods, structures and designs for self-aligned local interconnects are provided. The method includes designing diffusion regions to be in a substrate. Some of a plurality of gates are designed to...
7990037 Carbon nanotube circuit component structure  
The present invention proposes a circuit component structure, which comprises a semiconductor substrate, a fine-line metallization structure formed over the semiconductor substrate and having at...
7989850 Array substrate and method of fabricating the same  
An array substrate includes first and second gate electrodes on a substrate; a gate insulating layer on the first and second gate electrodes; first and second active layers on the gate insulating...
7982263 Semiconductor device having a plurality of misfets formed on a main surface of a semiconductor substrate  
In a high frequency amplifying MOSFET having a drain offset region, the size is reduced and the on-resistance is decreased by providing conductor plugs 13 (P1) for leading out electrodes on a...
7982244 Semiconductor memory device and manufacturing method thereof  
A semiconductor memory device includes a first block having first memory cells and first select transistors, a second block having second memory cells and second select transistors, and arranged...
7982313 Semiconductor device including stress relaxation gaps for enhancing chip package interaction stability  
By dividing a single chip area into individual sub-areas, a thermally induced stress in each of the sub-areas may be reduced during operation of complex integrated circuits, thereby enhancing the...
7973341 Fuse of semiconductor device  
A method for manufacturing a fuse of a semiconductor device comprises forming an island-type metal fuse in a region where a laser is irradiated, so that laser energy may not be dispersed in a fuse...
7956384 Closed cell configuration to increase channel density for sub-micron planar semiconductor power device  
A semiconductor power device supported on a semiconductor substrate that includes a plurality of transistor cells, each cell has a source and a drain region disposed on opposite sides of a gate...
7956466 Structure for interconnect structure containing various capping materials for electrical fuse and other related applications  
A design structure is provided for interconnect structures containing various capping materials for electrical fuses and other related applications. The structure includes a first interconnect...
7957174 Semiconductor memory  
A semiconductor memory includes a memory cell array area having a memory cell, a word line contact area adjacent to the memory cell array area, a word line arranged straddling the memory cell array...
Matches 1 - 50 out of 597 1 2 3 4 5 6 7 8 9 10 11 12 >