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7592710 Bond pad structure for wire bonding  
A bond pad structure of an integrated circuit is provided. The bond pad structure includes a conductive bond pad, a first dielectric layer underlying the bond pad, and an M top plate located in...
7582921 Semiconductor device and method for patterning  
In a masking pattern (a) for patterning word and data lines, length is changed between adjacent word lines so as to be shifted from each other at their tips, and furthermore, the tip of each word...
7576440 Semiconductor chip having bond pads and multi-chip package  
A semiconductor chip comprises a semiconductor substrate having integrated circuits formed on a cell region and a peripheral circuit region adjacent to each other. A bond pad-wiring pattern is...
7573135 Electronic parts packaging structure in which a semiconductor chip is mounted on a wiring substrate and buried in an insulation film  
The present invention includes the steps of forming a first resin film uncured on a wiring substrate including a wiring pattern, burying an electronic parts having a connection terminal on an...
7573066 Semiconductor substrate, substrate inspection method, semiconductor device manufacturing method, and inspection apparatus  
A semiconductor substrate inspection method includes: generating a charged particle beam, and irradiating the charged particle beam to a semiconductor substrate in which contact wiring lines are...
7554133 Pad current splitting  
An integrated circuit with a monolithic semiconducting substrate formed in a chip, where the chip has a peripheral edge, a backside, and an opposing top on which circuitry is formed. A first ring...
7550790 D/A conversion circuit and semiconductor device  
A D/A conversion circuit with a small area is provided. In the D/A conversion circuit, according to a digital signal transmitted from address lines of an address decoder, one of four gradation...
7531852 Electronic unit with a substrate where an electronic circuit is fabricated  
In an electronic unit with a substrate, a control circuit is mounted on the substrate and is configured to execute an operation related to a load. A package encapsulates the control circuit and the...
7525132 Semiconductor integrated circuit wiring design method and semiconductor integrated circuit  
The facility of operation in a manufacturing process and the reliability of the finished product can be improved by making a design based on two basic wiring pattern layers in which wiring traces...
7522405 High current electrical switch and method  
A method and system are disclosed for a high current electrical switch. The switch may be suitable for switching, rectifying or blocking direct current in the range of one to a thousand amperes per...
7514728 Semiconductor integrated circuit device using four-terminal transistors  
In a semiconductor substrate of a first conductivity type, a first well region of the first conductivity type, second well regions of a second conductivity type, and a third well region of the...
7514796 Semiconductor chip capable of being laminated and a semiconductor device including the lamination of a plurality of semiconductor chips  
To prevent short-circuit due to contact of bonding wires each other and to make a semiconductor device compact. A semiconductor chip with a rectangular main surface may comprise: a first side...
7508238 Semiconductor integrated circuit device  
A semiconductor integrated circuit device includes a main region on which a main circuit is formed and a spare cell region for logic modification of the circuit formed on the main region. The spare...
7495269 Semiconductor device and electronic apparatus using the same  
A semiconductor device contains a semiconductor chip, and includes first and second circuits, a control signal line and a terminal. The first circuit is arranged in a center of the semiconductor...
7492013 Systems and arrangements to interconnect components of a semiconductor device  
Systems and arrangements to interconnect cells and structures within cells of an integrated circuit to enhance cell density. Embodiments comprise an adjusted polysilicon gate pitch to metal wire...
7491986 Semiconductor integrated circuit device  
A different electric power supply electric power source cell is proposed which includes paths by which electric power source voltages, the electric potentials of which are different from each...
7488994 Coiled circuit device and method of making the same  
A coiled circuit device is produced by forming a circuit layer on a substrate. Optional insulator layers may be disposed above and below the circuit layer. The circuit layer, which may be memory,...
7488995 Semiconductor integrated circuit device and I/O cell for the same  
In a semiconductor integrated circuit device in which a plurality of I/O cells having level shift circuits are placed in an I/O region, two input/output cells respectively have four level shift...
7465971 Integrated circuit structures for increasing resistance to single event upset  
A configuration memory cell (“CRAM”) for a field programmable gate array (“FPGA”) integrated circuit (“IC”) device is given increased resistance to single event upset (“SEU”). A...
7459779 Pad arrangement of driver IC chip for LCD and related circuit pattern structure of TAB package  
Output pads on an integrated circuit (IC) chip are arranged along a first longer side and are arranged along a second longer side with input pads. The output pads are connected to respective output...
7453105 Integrated circuit power supply network  
An integrated circuit including an assembly of functional blocks and an interconnection network formed of at least N levels of conductive tracks separated by conductive via levels, the...
7446418 Semiconductor device for preventing defective filling of interconnection and cracking of insulating film  
The semiconductor device has insulating films 40, 42 formed over a substrate 10 ; an interconnection 58 buried in at least a surface side of the insulating films 40, 42 ; insulating films ...
7422945 Cell based integrated circuit and unit cell architecture therefor  
In a unit cell, a first conductive type active region and a second conductive type active region are provided. Those two active regions extend in a first direction. Each of the active regions have...
7420229 Failure analysis vehicle for yield enhancement with self test at speed burnin capability for reliability testing  
A test vehicle for evaluating a manufacturing process for integrated circuits that uses a more space efficient layout of library driving cells arranged to produce circuits that exercise many...
7414275 Multi-level interconnections for an integrated circuit chip  
Multilevel metallization layouts for an integrated circuit chip including transistors having first, second and third elements to which metallization layouts connect. The layouts minimize current...
7414323 Tab tape and method of manufacturing the same  
Input test pads of an adjacent pattern area are placed in a vacant area of a layout area of output test pads, optimizing the layout area of test pads for use in inspection of a semiconductor chip....
7411295 Circuit board, device mounting structure, device mounting method, and electronic apparatus  
A circuit board has a metal pattern that is formed on a surface of the circuit board to be connected with bumps in two-dimensional arrangement for mounting an electronic device that has the bumps....
7408262 Semiconductor integrated circuit device  
A semiconductor integrated circuit device includes a semiconductor chip, a memory cell array arranged on the semiconductor chip and first and second decoder strings arranged along both ends of the...
7408209 Semiconductor device with noise control  
Radiation noise is reduced, and any operation error is prevented by suppressing noise propagation between an input/output circuit and an internal circuit while preventing or minimizing an increase...
7402846 Electrostatic discharge (ESD) protection structure and a circuit using the same  
An electrostatic discharge (ESD) protection structure is disclosed. The ESD protection structure includes an active device. The active device includes a plurality of drains. Each of the drains has...
7399990 Wafer-level package having test terminal  
A wafer-level package includes a semiconductor wafer having at least one semiconductor chip circuit forming region each including a semiconductor chip circuit each provided with test chip terminals...
7365376 Semiconductor integrated circuit  
A semiconductor integrated circuit effectively makes use of wiring channels of wiring formed by a damascene method. When first cells are used, since the M 1 power source lines are laid out at...
7358548 Semiconductor integrated circuit having layout in which buffers or protection circuits are arranged in concentrated manner  
Buffers are arranged in a concentrated manner in a region distant from pads. The region refers to a region in a main region of a semiconductor integrated circuit, except for a central processing...
7355219 Integrated circuit with reduced coupling noise  
In order for circuit blocks 1 to 3 composed by the CMOS process, and analog lines 5 −1 , 5 −2 , and 5 −3 connected thereto not to overlap on the layout, the analog lines 5 −1 and ...
7348640 Memory device  
A memory capable of reducing the memory cell size is provided. In this memory, a first gate electrode of a first selection transistor and a second gate electrode of a second selection transistor...
7348610 Multiple layer and crystal plane orientation semiconductor substrate  
A semiconductor on insulator substrate and a method of fabricating the substrate. The substrate including: a first crystalline semiconductor layer and a second crystalline semiconductor layer; and...
7321140 Magnetron sputtered metallization of a nickel silicon alloy, especially useful as solder bump barrier  
A nickel silicon alloy barrier layer formed between a metal bonding pad on an integrated circuit and a tin-based solder ball, for example, a lead-free solder. The nickel silicon alloy contains at...
7321139 Transistor layout for standard cell with optimized mechanical stress effect  
A layout for a transistor in a standard cell is disclosed. The layout for a transistor includes an active region with at least one portion having a first edge and at least one portion having a...
7307293 Direct-connect integrated circuit signaling system for bypassing intra-substrate printed circuit signal paths  
A direct-connect signaling system including a printed circuit board and first and second integrated circuit packages disposed on the printed circuit board. A plurality of electric signal conductors...
7291930 Input and output circuit of an integrated circuit chip  
An input and output circuit of an integrated circuit chip for exchanging signals between logic circuits of the integrated circuit chip and a system. The input and output circuit includes a...
7279787 Microelectronic complex having clustered conductive members  
A microelectronic complex including a body of semi-conductor material containing an integrated circuit, and a plurality of contact pads on the body for receiving signal conducting members for...
7265396 Semiconductor device  
A basic cell placed in a semiconductor device comprises a via contact placed on a wiring grid having a pitch narrower than a pitch between a contact placed in a source region and a contact placed...
7253457 Semiconductor device with external terminals arranged symmetrically with respect to a normal external terminal arrangement  
A semiconductor device, which may be changed to a mirror package after the assembly without having to reinstall bonding wires, comprises: a plurality of fixed external terminals which include a...
7250644 Electronic device and method for designing the same  
The electronic device includes a plurality of layout regions each including a plurality of patterns defined by a buried structure buried in a substrate. For each of the layout regions, in each of...
7244975 High-voltage device structure  
A high-voltage device structure includes a high-voltage device disposed on a semiconductor substrate. The semiconductor includes an active region and an isolation region, and the high-voltage...
7230332 Chip package with embedded component  
A chip package is provided. The chip package includes at least one chip, an interconnection structure, a plurality of second pads and at least one panel-shaped component, wherein the chip includes...
7227200 Metal I/O ring structure providing on-chip decoupling capacitance  
There are provided a metal I/O ring structure for a semiconductor chip and a decoupling capacitance structure using the same. In the Metal I/O ring structure, a plurality of first metal lines are...
7217964 Method and apparatus for coupling to a source line in a memory device  
A method and apparatus for coupling to a source line. Specifically, embodiments of the present invention disclose a memory device comprising an array of flash memory cells with a source line...
7217966 Self-protecting transistor array  
A transistor array is self-protected from an electrostatic discharge (ESD) event which can cause localized ESD damage by integrating an ESD protection device into the transistor array. The ESD...
7211840 Transistor  
A transistor and a semiconductor integrated circuit with a reduced layout area. Area reduction of a transistor is realized by arranging contacts at higher density. Specifically, in a transistor...
Matches 1 - 50 out of 286 1 2 3 4 5 6 >