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7636271 |
User selectable banks for DRAM
A memory device includes a configurable array of memory cells. A number of array banks is configured based upon data stored in a mode register or decoded by logic circuitry. The memory device...
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7635991 |
Output buffer strength trimming
Apparatus and methods for adjusting the buffer strength of an output buffer to match its capacitive load use selectively enabled stages of a multiple stage output buffer. A user can opt for a...
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7635630 |
Scalable high density non-volatile memory cells in a contactless memory array
A plurality of mesas are formed in the substrate. Each pair of mesas forms a trench. A plurality of diffusion areas are formed in the substrate. A mesa diffusion area is formed in each mesa top and...
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7635623 |
Methods of forming capacitors
A method of forming a capacitor includes forming a conductive first capacitor electrode material comprising TiN over a substrate. TiN of the TiN-comprising material is oxidized effective to form...
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7635611 |
Semiconductor substrate for build-up packages
The present invention provides techniques to fabricate build-up single or multichip modules. In one embodiment, this is accomplished by dispensing die-attach material in one or more pre-etched...
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7635604 |
Well for CMOS imager and method of formation
A well region of a first conductivity type located in a substrate of the first conductivity type and below about half the channel length of an electrically active portion of a transistor gate is...
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7635079 |
System for locating conductive sphere utilizing screen and hopper of solder balls
System for placing conductive spheres on prefluxed bond pads of a substrate using a stencil plate with a pattern of through-holes positioned over the bond pads. Conductive spheres are placed in the...
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7634851 |
Method of forming a magnetic random access memory element
A method of forming a magnetic tunnel junction memory element and the resulting structure are disclosed. A magnetic tunnel junction memory element comprising a thick nonmagnetic layer between two...
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7634624 |
Memory system for data storage and retrieval
According to a first aspect of an embodiment of the invention, there is provided a method of data storage and retrieval for use in a solid state memory system, having a non-volatile memory, wherein...
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7634623 |
Method and apparatus for self-timed data ordering for multi-data rate memories and system incorporating same
A self-timed data ordering method and circuit for multi-data rate memories orders a plurality of data words substantially simultaneously retrieved during successive read operations of a memory...
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7634597 |
Alignment of instructions and replies across multiple devices in a cascaded system, using buffers of programmable depths
Buffers of programmable depths are used in the instruction and reply paths of cascaded devices to account for possible differences in latencies between the devices. The buffers may be enabled or...
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7633821 |
Current mode memory apparatus, systems, and methods
Some embodiments include a first circuit to receive input signals and to drive signals at first circuit output nodes, and a second circuit to receive at least a portion of current passing through...
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7633804 |
Adjusting programming or erase voltage pulses in response to the number of programming or erase failures
Memory devices and methods of operating memory devices are provided. In one such embodiment a programming voltage pulse or an erase voltage pulse is applied to memory cells of a memory device. A...
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7633801 |
Memory in logic cell
Methods, devices, and systems for a memory in logic cell are provided. One or more embodiments include using a cell structure having a first gate, a second gate, and a third gate, e.g., a control...
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7633798 |
M+N bit programming and M+L bit read for M bit memory cells
A memory device and programming and/or reading process is described that programs and/or reads the cells in the memory array with higher threshold voltage resolution than required. In programming...
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7633786 |
Couplings within memory devices and methods
Methods and apparatus are provided. A memory device includes a first bit line selectively coupled to an input of a sensing device through a first multiplexer gate, and a second bit line selectively...
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7633773 |
On-die anti-resonance structure for integrated circuit
A structure and method for reducing the effects of chip-package resonance in an integrated circuit assembly is described. A series RLC circuit is employed to reduce the output impedance of the...
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7633423 |
Method of and apparatus for reducing settling time of a switched capacitor amplifier
A method and apparatus for reducing settling time of a switched capacitor amplifier. The method includes disconnecting first and second capacitors from an amplifier. When the first and second...
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7633159 |
Semiconductor device assemblies and packages with edge contacts and sacrificial substrates and other intermediate structures used or formed in fabricating the assemblies or packages
A sacrificial substrate for fabricating semiconductor device assemblies and packages with edge contacts includes conductive elements on a surface thereof, which are located so as to align along a...
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7633157 |
Microelectronic devices having a curved surface and methods for manufacturing the same
Microelectronic devices and methods for manufacturing microelectronic devices are disclosed herein. In one embodiment, a device includes a support member and a flexed microelectronic die mounted to...
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7633116 |
One-transistor composite-gate memory
One-transistor memory devices facilitate nonvolatile data storage through the manipulation of oxygen vacancies within a trapping layer of a field-effect transistor (FET), thereby providing control...
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7632747 |
Conductive structures for microfeature devices and methods for fabricating microfeature devices
Methods for fabricating conductive structures on and/or in interposing devices and microfeature devices that are formed using such methods are disclosed herein. In one embodiment, a method for...
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7632737 |
Protection in integrated circuits
A method including, prior to a plasma heat-up operation, forming a liner on structure coated with an insulator. And a method including forming a trench on a substrate, forming an insulator on the...
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7632702 |
Methods of forming a resistance variable element
The invention includes methods of depositing silver onto a metal selenide-comprising surface, and methods of forming a resistance variable device. In one implementation, a method of depositing...
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7631170 |
Program controlled embedded-DRAM-DSP having improved instruction set architecture
An efficient embedded-DRAM processor architecture and associated methods. In one exemplary embodiment, the architecture includes a DRAM array, a set of register files, set of functional units, and...
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7630266 |
Temperature compensation of memory signals using digital signals
A temperature sensor generates a digital representation of the temperature of the integrated circuit. A logic circuit reads the digital temperature and generates a multiple bit digital...
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7630265 |
On-chip temperature sensor
A temperature invariant reference voltage and a temperature variant physical quantity, such as a voltage or current, are generated. The temperature variant physical quantity changes in response to...
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7630256 |
Erase operation in a flash drive memory
A method for erasing a non-volatile memory device performs a block erase operation. The cells are then soft programmed and erase verified to determine if the threshold voltages indicate erased...
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7630246 |
Programming rate identification and control in a solid state memory
Memory devices adapted to receive and transmit analog data signals representative of bit patterns of two or more bits facilitate increases in data transfer rates relative to devices communicating...
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7630241 |
Single latch data circuit in a multiple level call non-volatile memory device
A single latch circuit is coupled to each bit line in a multiple level cell memory device to handle reading multiple data bits. The circuit is comprised of a latch having an inverted node and a...
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7630240 |
Read method for MLC
Memory devices adapted to process and generate analog data signals representative of data values of two or more bits of information facilitate increases in data transfer rates relative to devices...
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7630236 |
Flash memory programming to reduce program disturb
The method for reducing program disturb in a flash memory array biases a selected wordline at a programming voltage. One of the unselected wordlines, closer to array ground than the selected...
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7630024 |
Assemblies and methods for illuminating a display
A computer display is disclosed. The computer display includes a LCD housing, a light source coupled to the LCD housing, and a LCD coupled to the LCD housing. The LCD housing conducts light from...
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7630008 |
Method of controlling image quality of an integrated CMOS imager and microcontroller
A method and apparatus providing a CMOS imager with an integrated controller on a common integrated circuit substrate. Also integrated on the common substrate are, a serializer circuit including a...
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7629858 |
Time delay oscillator for integrated circuits
One aspect relates to an oscillator, and various oscillator embodiments comprise an amplifier and line driver with an input and an output and a transmission line with a predetermined transmission...
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7629819 |
Seamless coarse and fine delay structure for high performance DLL
A clock synchronization system and method avoids output clock jitter at high frequencies and also achieves a smooth phase transition at the boundary of the coarse and fine delays. The system may...
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7629736 |
Method and device for preventing junction leakage in field emission devices
An apparatus and method for stabilizing a threshold voltage in an active matrix field emission device are disclosed. The method includes formation of radiation-blocking elements between a...
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7629693 |
Method for integrated circuit fabrication using pitch multiplication
Different sized features in the array and in the periphery of an integrated circuit are patterned on a substrate in a single step. In particular, a mixed pattern, combining two separately formed...
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7629686 |
Bumped die and wire bonded board-on-chip package
An apparatus for making a semiconductor assembly and, specifically, interconnecting a semiconductor die to a carrier substrate. The carrier substrate includes a first surface and a second surface...
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7629641 |
Band engineered nano-crystal non-volatile memory device utilizing enhanced gate injection
Non-volatile memory devices and arrays are described that utilize reverse mode non-volatile memory cells that have band engineered gate-stacks and nano-crystal charge trapping in EEPROM and block...
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7629630 |
Electropolished patterned metal layer for semiconductor devices
An electropolishing process for high resolution patterning of noble metals, such as platinum, for forming various semiconductor devices, such as capacitors or wiring patterns is disclosed.
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7629266 |
Etch compositions and methods of processing a substrate
The invention includes an etchant composition containing isopropyl alcohol and one or more of HF, NH 4 F and tetramethyl ammonium fluoride (TMAF). The invention encompasses a method of processing a...
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7629250 |
Method for creating electrically conductive elements for semiconductor device structures using laser ablation processes and methods of fabricating semiconductor device assemblies
A method for forming at least one conductive element is disclosed. Particularly, a semiconductor substrate, including a plurality of semiconductor dice thereon, may be provided and a dielectric...
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7629249 |
Microfeature workpieces having conductive interconnect structures formed by chemically reactive processes, and associated systems and methods
Microfeature workpieces having conductive vias formed by chemically reactive processes, and associated systems and methods are disclosed. A method in accordance with one embodiment includes...
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7629024 |
Methods of forming particle-containing materials
The invention includes methods of forming particle-containing materials, and also includes semiconductor constructions comprising particle-containing materials. One aspect of the invention includes...
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7628932 |
Wet etch suitable for creating square cuts in si
A single crystal silicon etching method includes providing a single crystal silicon substrate having at least one trench therein. The substrate is exposed to a buffered fluoride etch solution which...
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7628855 |
Atomic layer deposition using electron bombardment
Formation of a layer of material on a surface by atomic layer deposition methods and systems includes using electron bombardment of the chemisorbed precursor.
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7628680 |
Method and apparatus for removing material from microfeature workpieces
Methods and apparatus for removing materials from microfeature workpieces. One embodiment of a subpad in accordance with the invention comprises a matrix having a first surface configured to...
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7627796 |
Testing method for permanent electrical removal of an integrated circuit output
An apparatus and method of disconnecting or disabling an input/output terminal of an integrated circuit after packaging. Each input/output terminal of the integrated circuit includes a disabling...
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7627793 |
Method and apparatus for generating and detecting initialization patterns for high speed DRAM systems
A method and apparatus for determining the characteristics of a communications channel within a high speed memory system includes generating a first signal having a known and repeating pattern and...
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