Matches 151 - 200 out of 16945 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >
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7358587 Semiconductor structures  
In one aspect, the invention includes a method of forming a material within an opening, comprising: a) forming an etch-stop layer over a substrate, the etch-stop layer having an opening extending...
7358568 Low resistance semiconductor process and structures  
A process for forming a semiconductor device comprises the steps of providing a semiconductor substrate assembly comprising a semiconductor wafer having an active area formed therein, a plurality...
7358562 NROM flash memory devices on ultrathin silicon  
An NROM flash memory cell is implemented in an ultra-thin silicon-on-insulator structure. In a planar device, the channel between the source/drain areas is normally fully depleted. An oxide layer...
7358561 Source lines for NAND memory devices  
A NAND memory device has a source line connected to two or more columns of serially-connected floating-gate transistors. The source line includes a first conductive layer formed on a substrate and...
7358554 Semiconductor manufacturing apparatus for modifying-in-film stress of thin films, and product formed thereby  
An apparatus for depositing a thin film on a substrate and product produced thereby are disclosed. In particular, deposition of the thin film is carried out on the substrate having an applied...
7358553 System and method for reducing shorting in memory cells  
An MRAM device includes an array of magnetic memory cells having an upper conductive layer and a lower conductive layer separated by a barrier layer. To reduce the likelihood of electrical shorting...
7358517 Method and apparatus for imager quality testing  
An apparatus and method of detecting a defect in an imager die package. The method comprises the steps of exposing the imager die package to light at a first angle, exposing the imager die package...
7358188 Method of forming conductive metal silicides by reaction of metal with silicon  
The invention includes methods of forming conductive metal silicides by reaction of metal with silicon. In one implementation, such a method includes providing a semiconductor substrate comprising...
7358185 Device having contact pad with a conductive layer and a conductive passivation layer  
A method and apparatus is disclosed for sequential processing of integrated circuits, particularly for conductively passivating a contact pad with a material which resists formation of resistive...
7358178 Semiconductor substrates including I/O redistribution using wire bonds and anisotropically conductive film, methods of fabrication and assemblies including same  
Methods and apparatus for eliminating wire sweep and shorting while avoiding the use of under-bump metallization and high cost attendant to the use of conventional redistribution layers. An...
7358171 Method to chemically remove metal impurities from polycide gate sidewalls  
An embodiment includes a process of forming a gate stack that acts to resist the redeposition to the semiconductive substrate of mobilized metal such as from a metal gate electrode. An embodiment...
7358170 Methods of forming conductive interconnects, and methods of depositing nickel  
The invention includes methods of electroless plating of nickel selectively on exposed conductive surfaces relative to exposed insulative surfaces. The electroless plating can utilize a bath which...
7358161 Methods of forming transistor devices associated with semiconductor-on-insulator constructions  
The invention encompasses a method of forming a semiconductor on-insulator construction. A substrate is provided. The substrate includes a semiconductor-containing layer over an insulative mass....
7358154 Method for fabricating packaged die  
Methods for forming an edge contact on a die and edge contact structures are described. The edge contacts on the die do not increase the height of the die. The edge contacts are positioned on the...
7358146 Method of forming a capacitor  
A carbon containing masking layer is patterned to include a plurality of container openings therein having minimum feature dimensions of less than or equal to 0.20 micron. The container openings...
7358139 Method of forming a field effect transistor including depositing and removing insulative material effective to expose transistor gate conductive material but not transistor gate semiconductor material  
The invention includes methods of forming field effect transistors. In one implementation, a method of forming a field effect transistor having a gate comprising a conductive metal or metal...
7358131 Methods of forming SRAM constructions  
The invention includes SRAM constructions comprising at least one transistor device having an active region extending into a crystalline layer comprising Si/Ge. A majority of the active region...
7358117 Stacked die in die BGA package  
Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies for increasing semiconductor device density are provided.
7358103 Method of fabricating an imaging device for collecting photons  
A photon collector has a reflecting metal layer to increase photon collection efficiency in a solid state imaging sensor. The reflecting metal layer reflects incident light internally to a...
7357695 Systems and methods for mechanical and/or chemical-mechanical polishing of microfeature workpieces  
Systems and methods for polishing microfeature workpieces. In one embodiment, a method includes determining a status of a characteristic of a microfeature workpiece and moving a carrier head and/or...
7356723 Method and apparatus for data transfer  
A memory system and method according to various aspects of the present invention comprises a memory and an adaptive timing system for controlling access to the memory. The adaptive timing system...
7355922 Method and apparatus for initialization of read latency tracking circuit in high-speed DRAM  
A method of synchronizing counters in two different clock domains within a memory device is comprised of generating a start signal for initiating production of a running count of clock pulses of a...
7355920 Write latency tracking using a delay lock loop in a synchronous DRAM  
A method and circuitry for improved write latency tracking in a SDRAM is disclosed. In one embodiment, a delay locked loop is used in the command portion of the write path, and receives the system...
7355894 Programming flash memories  
A flash memory device has an array of flash memory cells, a detector for detecting an external voltage applied to the flash memory device, and a command control circuit for controlling access to...
7355464 Apparatus and method for controlling a delay- or phase-locked loop as a function of loop frequency  
A method and circuitry for a Delay Locked Loop (DLL) or a phase Locked Loop (PLL) is disclosed, which improves the loop stability at high frequencies and allows maximum tracking bandwidth,...
7355423 Method for optimizing probe card design  
A method is presented of designing semiconductor probe cards to have the optimum number and placement of die probe sites for function testing integrated circuit (IC) die at semiconductor wafer...
7355387 System and method for testing integrated circuit timing margins  
An integrated circuit load board includes a substrate on which a plurality of integrated circuit sockets and an integrated test circuit are mounted. The integrated test circuit includes circuitry...
7355273 Semiconductor dice having back side redistribution layer accessed using through-silicon vias, methods  
An apparatus and method of rerouting redistribution lines from an active surface of a semiconductor substrate to a back surface thereof and assembling and packaging individual and multiple...
7355267 Substrate, semiconductor die, multichip module, and system including a via structure comprising a plurality of conductive elements  
A method of forming a multiconductor via includes forming at least one seed layer in at least one through-hole of a substrate, selectively patterning the seed layer to form a plurality of laterally...
7355244 Electrical devices with multi-walled recesses  
The invention relates to a vertical transistor and an oxidation process that achieves a substantially curvilinear recess bottom. The recess serves as the gate receptacle that may facilitate a more...
7355232 Memory devices with dual-sided capacitors  
A dual-sided HSG capacitor and a method of fabrication are disclosed. A thin native oxide layer is formed between a doped polycrystalline layer and a layer of hemispherical grained polysilicon...
7355231 Memory circuitry with oxygen diffusion barrier layer received over a well base  
A method of forming memory circuitry having a memory array having a plurality of memory capacitors and having peripheral memory circuitry operatively configured to write to and read from the memory...
7355229 Masked spacer etching for imagers  
The invention relates to a dual masked spacer etch for improved dark current performance in imagers. After deposition of spacer material such as oxide, N-channel regions are first opened for N + ...
7355222 Imaging device having a pixel cell with a transparent conductive interconnect line and the method of making the pixel cell  
The invention relates to an imaging device having a pixel cell with a transparent conductive material interconnect line for focusing incident light onto a photosensor and providing an electrical...
7355203 Use of gate electrode workfunction to improve DRAM refresh  
This invention relates to a method and resulting structure, wherein a DRAM may be fabricated by using silicon midgap materials for transistor gate electrodes, thereby improving refresh...
7354863 Methods of selectively removing silicon  
An etch solution that comprises tetramethylammonium hydroxide (“TMAH”) and at least one organic solvent. The etch solution may be substantially free of water. The etch solution is formulated to...
7354842 Methods of forming conductive materials  
The invention includes a method of forming a metal-comprising mass for a semiconductor construction. A semiconductor substrate is provided, and a metallo-organic precursor is provided proximate the...
7354812 Multiple-depth STI trenches in integrated circuit fabrication  
Multiple trench depths within an integrated circuit device are formed by first forming trenches in a substrate to a first depth, but of varying widths. Formation of a dielectric layer can cause...
7354795 Methods for packaging and encapsulating semiconductor device assemblies that include tape substrates  
Packaging and encapsulation methods include use of a tape substrate with a mold gate that includes an aperture and a support element that extends over at least a portion of the aperture. The tape...
7354793 Method of forming a PCRAM device incorporating a resistance-variable chalocogenide element  
A method of forming a memory device, such as a PCRAM, including selecting a chalcogenide glass backbone material for a resistance variable memory function and devices formed using such a method.
7354631 Chemical vapor deposition apparatus and methods  
This invention includes chemical vapor deposition apparatus, methods of chemical vapor depositing an amorphous carbon comprising layer on a substrate, and methods of chemical vapor depositing at...
7354329 Method of forming a monolithic base plate for a field emission display (FED) device  
A substrate is provided and is configurable into a base plate for a field emission display. A plurality of discrete, segmented regions of field emitter tips are formed by at least removing portions...
7353437 System and method for testing a memory for a memory failure exhibited by a failing memory  
A system and method for testing a memory under test on automated test equipment (ATE) that includes capturing operating conditions for a memory exhibiting a memory failure in a sequence of records...
7353320 Memory hub and method for memory sequencing  
A memory module includes a memory hub coupled to several memory devices. The memory hub includes at least one performance counter that tracks one or more system metrics—for example, page hit...
7353316 System and method for re-routing signals between memory system components  
A plurality of memory modules used in a computer system each include a memory hub that is connected to a plurality of memory devices. The memory modules are connected to each other in series so...
7353281 Method and system for providing access to computer resources  
A method and computer system for providing access to computer resources on a computer system and includes generating a token containing encrypted user information including credit, authorization,...
7352892 System and method for shape reconstruction from optical images  
Reconstructing the shape of the surface of an object in greater than two dimensions is performed using a noise-tolerant reconstruction process and/or a multi-resolution reconstruction process. The...
7352649 High speed array pipeline architecture  
A memory device including a memory array having a plurality of memory cells, and a plurality of peripheral devices for reading data out of and writing data into the memory array, the peripheral...
7352643 Regulating voltages for refresh operation using flash trim bits in semiconductor memory devices  
A method and apparatus for regulating voltages in semiconductor devices. Trim bits are stored in a trim flash array, where the trim bits define a voltage value and where the voltage value is...
7352624 Reduction of adjacent floating gate data pattern sensitivity  
The method for programming non-volatile memory cells erases the memory cells to be programmed. The memory cells are then programmed to a reduced floating gate voltage that takes into account...
Matches 151 - 200 out of 16945 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >