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7280549 |
High speed ring/bus
A data communication bus and method of operation thereof, including a plurality of nodes connected to a respective plurality of media segments. A typical node includes an output port coupled to a...
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7280420 |
Data compression read mode for memory testing
Memory devices having a normal mode of operation and a test mode of operation are useful in quality programs. The test mode of operation includes a data compression test mode. In the data...
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7280417 |
System and method for capturing data signals using a data strobe signal
A signal capture system and method is used to capture a data signal using a data strobe signal having a preamble of strobe signal transitions. The system includes a data latch circuit receiving the...
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7280410 |
System and method for mode register control of data bus operating mode and impedance
A DRAM device includes a mode register that is programmed to select one of two modes for operating data bus terminals in the device. A timing circuit generates timing signals in synchronism with...
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7280403 |
Flash memory device with improved programming performance
A selected word line that is coupled to a cell to be programmed is biased during a program operation. The unselected word lines are biased with a negative potential to reduce the cell leakage at...
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7280398 |
System and memory for sequential multi-plane page memory operations
A system and method for performing memory operations in a multi-plane flash memory. Commands and addresses are sequentially provided to the memory for memory operations in memory planes. The memory...
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7280395 |
Methods for neutralizing holes in tunnel oxides of floating-gate memory cells and devices
Methods for neutralizing holes in tunnel oxides of floating-gate memory cells and devices using a decrease in magnitude of a source voltage of a first polarity to increase the magnitude of a...
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7280386 |
Method and system for controlling refresh to avoid memory cell data losses
A DRAM includes a register storing subsets of row addresses corresponding to rows containing at least one memory cell that is unable to store a data bit during a normal refresh cycle. Each subset...
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7280382 |
Apparatus and methods for optically-coupled memory systems
Optically-coupled memory systems are disclosed. In one embodiment, a system memory includes a carrier substrate, and a controller attached to the carrier substrate and operable to transmit and...
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7280381 |
Apparatus and methods for optically-coupled memory systems
Optically-coupled memory systems are disclosed. In one embodiment, a system memory includes a carrier substrate, and a controller attached to the carrier substrate and operable to transmit and...
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7280280 |
Micro-lenses for CMOS imagers and method for manufacturing micro-lenses
A micro-lens and a method for forming the micro-lens is provided. A micro-lens includes a substrate and lens material located within the substrate, the substrate having a recessed area serving as a...
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7280279 |
Apparatus and method for manufacturing tilted microlenses
Asymmetrical structures and methods are used to adjust the orientation of a microlens for a pixel array. The asymmetrical structures affect volume and surface force parameters during microlens...
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7280278 |
Apparatus and method for manufacturing positive or negative microlenses
A variety of structures and methods used to adjust the shape, radius and/or height of a microlens for a pixel array. The structures affect volume and surface force parameters during microlens...
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7280162 |
Apparatus for assisting video compression in a computer system
One embodiment of the present invention provides an apparatus that facilitates compression of video data in a computer system by performing the time-consuming task of computing the difference...
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7280143 |
CMOS image sensor with active reset and 4-transistor pixels
A CMOS image sensor implementing a low noise active reset operation uses control circuitry outside a pixel sensor array and transistors in a pixel sensor as parts of an amplifier that charges a...
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7280139 |
Double sampling active pixel sensor with double sampling temperature sensor
A system which operates to determine temperature of an image sensor using the same signal chain that is used to detect the image sensor actual outputs. A correlated double sampling circuit is used...
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7279918 |
Methods for wafer level burn-in
A method, circuit and system for determining burn-in reliability from wafer level burn-in are disclosed. The method includes recording the number of failures in each IC die in nonvolatile elements...
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7279915 |
Test method for electronic modules using movable test contactors
A pass through test system for testing an electronic module includes an interface board, and test contactors movably mounted to the interface board for electrically engaging terminal contacts on...
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7279797 |
Module assembly and method for stacked BGA packages
Ball grid array packages that can be stacked to form highly dense components and the method for stacking ball grid arrays. The ball grid array packages comprise flexible or rigid substrates. The...
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7279788 |
Device for establishing non-permanent electrical connection between an integrated circuit device lead element and a substrate
A spring contact for establishing electrical contact between a lead element of an IC device and a substrate. The spring contact generally comprises a contact portion and a base portion. The contact...
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7279781 |
Two-stage transfer molding device to encapsulate MMC module
A semiconductor card includes a printed circuit substrate upon which is mounted a card circuit including one or more semiconductor components such as dice or packages. External contacts link the...
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7279780 |
Quad flat no-lead (QFN) grid array package, method of making and memory module and computer system including same
A quad flat no-lead (QFN) grid array semiconductor package and method for making the same are provided. The package includes a semiconductor die and a lead frame having a plurality of conductive...
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7279772 |
Edge intensive antifuse and method for making the same
An antifuse including a bottom plate having a plurality of longitudinal members arranged substantially parallel to a first axis, a dielectric layer formed on the bottom plate, and a top plate...
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7279770 |
Isolation techniques for reducing dark current in CMOS image sensors
A structure for isolating areas in a semiconductor device is provided. The structure includes a trench having first and second portions formed in a substrate. The first portion has a first width,...
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7279766 |
Photodiode sensor and photosensor for use in an imaging device
A multiple-trench photosensor for use in a CMOS imager having an improved charge capacity. The multi-trench photosensor may be either a photogate or photodiode structure. The multi-trench...
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7279764 |
Silicon-based resonant cavity photodiode for image sensors
An imager with pixels having a resonant-cavity photodiode. The resonant cavity photodiode increases absorption of light having long wavelengths. A trench is formed for the photodiode and reflective...
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7279762 |
Magnetoresistive memory device assemblies, and methods of forming magnetoresistive memory device assemblies
The invention includes a construction comprising an MRAM device between a pair of conductive lines. Each of the conductive lines can generate a magnetic field encompassing at least a portion of the...
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7279740 |
Band-engineered multi-gated non-volatile memory device with enhanced attributes
Non-volatile memory devices and arrays are described that facilitate the use of band-gap engineered gate stacks with asymmetric tunnel barriers in floating gate memory cells in NOR or NAND memory...
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7279732 |
Enhanced atomic layer deposition
A method of enhanced atomic layer deposition is described. In an embodiment, the enhancement is the use of plasma. Plasma begins prior to flowing a second precursor into the chamber. The second...
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7279725 |
Vertical diode structures
A method of making a vertical diode structure is provided, the vertical diode structure having associated therewith a diode opening extending through an insulation layer and contacting an active...
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7279710 |
Structure and method of fabricating a transistor having a trench gate
An integrated circuit transistor is fabricated with a trench gate having nonconductive sidewalls. The transistor is surrounded by an isolation trench filled with a nonconductive material. The...
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7279672 |
Image sensor having pinned floating diffusion diode
The present invention provides an image sensor having a pinned floating diffusion region in addition to a pinned photodiode. The pinned floating diffusion region increases the capacity of the...
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7279670 |
Superposed multi-junction color APS
A CMOS image sensor obtains color through the use of two or three superposed layers. Each pixel in the image sensor includes a plurality of superposed photosensitive p-n junctions with individual...
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7279668 |
Sequential read-out method and system that employs a single amplifier for multiple columns
Sequential read-out method and system for reading out an array of photocells are disclosed. The array includes a plurality of photocells that are arranged in rows and columns. A sequential readout...
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7279435 |
Apparatus for stabilizing high pressure oxidation of a semiconductor device
A method and apparatus for preventing N 2 O from becoming super critical during a high pressure oxidation stage within a high pressure oxidation furnace are disclosed. The method and apparatus...
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7279419 |
Formation of self-aligned contact plugs
Methods of forming a contact structure for semiconductor assemblies are described. One method provides process steps to create an inner dielectric isolation layer after the contact region is...
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7279414 |
Method of forming interconnect structure with interlayer dielectric
The present invention relates to the formation of an ILD layer while preventing or reducing oxidation of the upper surface of a metallic interconnect. Avoidance of oxidation of the upper surface of...
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7279407 |
Selective nickel plating of aluminum, copper, and tungsten structures
A method of selectively plating nickel on an intermediate semiconductor device structure. The method comprises providing an intermediate semiconductor device structure having at least one aluminum...
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7279398 |
Microfeature workpiece processing apparatus and methods for controlling deposition of materials on microfeature workpieces
The present disclosure provides methods and apparatus useful in depositing materials on batches of microfeature workpieces. One implementation provides a method in which a quantity of a first...
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7279396 |
Methods of forming trench isolation regions with nitride liner
The invention includes methods of forming trench isolation regions. In one implementation, a masking material is formed over a semiconductor substrate. The masking material comprises at least one...
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7279395 |
Suppression of dark current in a photosensor for imaging
A pixel cell having a halogen-rich region localized between an oxide isolation region and a photosensor. The halogen-rich region prevents leakage from the isolation region into the photosensor,...
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7279379 |
Methods of forming memory arrays; and methods of forming contacts to bitlines
The invention includes memory arrays, and methods which can be utilized for forming memory arrays. A patterned etch stop can be used during memory array fabrication, with the etch stop covering...
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7279377 |
Method and structure for shallow trench isolation during integrated circuit device manufacture
A method suitable for use during fabrication of a semiconductor device such as a dynamic random access memory or a flash programmable read-only memory comprises etching through silicon nitride and...
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7279366 |
Method for assembling semiconductor die packages with standard ball grid array footprint
Apparatus and methods for forming semiconductor assemblies. An interposer includes a perimeter wall surrounding at least a portion of an upper surface thereof to form a recess. An array of...
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7279364 |
***WITHDRAWN PATENT AS PER THE LATEST USPTO WITHDRAWN LIST***
Flip-chip adaptor package for bare die
A board for connecting a bare semiconductor die with a bond pad arrangement which does not conform to a master printed circuit board with a specific or standardized pin out, connector pad, or lead...
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7279353 |
Passivation planarization
A pixel cell is formed by locating a first passivation layer over the final layer of metal lines. Subsequently, the uneven, non-uniform passivation layer is subjected to a planarization process...
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7279118 |
Compositions of matter and barrier layer compositions
In one aspect, the invention encompasses a semiconductor processing method wherein a conductive copper-containing material is formed over a semiconductive substrate and a second material is formed...
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7279041 |
Atomic layer deposition methods and atomic layer deposition tools
An atomic layer deposition method includes positioning a plurality of semiconductor wafers into an atomic layer deposition chamber. Deposition precursor is emitted from individual gas inlets...
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7278905 |
Apparatus and method for conditioning polishing surface, and polishing apparatus and method of operation
A chemical-mechanical polishing apparatus is provided with a downstream device for conditioning a web-shaped polishing pad. The device may be used to condition a glazed portion of the pad, and then...
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7278060 |
System and method for on-board diagnostics of memory modules
A memory hub includes an on-board diagnostic engine through which diagnostic testing and evaluation of the memory system can be performed. The memory hub includes a link interface for receiving...
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