Matches 51 - 100 out of 16945 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >
Match Document Document Title
7369168 Circuit for an active pixel sensor  
A pixel circuit includes a silicon substrate having a photodiode that converts light intensity into a voltage signal and two metal layers disposed on the substrate having a pixel control circuit....
7369167 Photo diode ID for CMOS imagers  
A CMOS image pixel array formed on a chip is used for storing programmed information within the pixel array. Manufacturing lot and other data is written to the array during manufacturing and...
7369138 Full-scene anti-aliasing method and system  
A method and system for performing full-scene anti-aliasing for an image through a technique of rotating and unrotating rasterization of a scene and rendering a resulting image. A scene is...
7369072 Method and apparatus for calibrating imaging device circuits  
A method of operating an imaging device, an imaging device, a camera system including an imaging device, and a processing system including an imaging device for calibrating an analog-to-digital...
7368965 Clock capture in clock synchronization circuitry  
Clock capturing synchronization circuitry first generates a synchronized clock signal from a reference clock signal, then captures the synchronized clock signal, and continues to output a...
7368812 Interposers for chip-scale packages and intermediates thereof  
A carrier substrate, or interposer, for use in a chip-scale package includes a material, such as a semiconductive material, that has a coefficient of thermal expansion that is the same or similar...
7368810 Invertible microfeature device packages  
Invertible microfeature device packages and associated methods for manufacture and use are disclosed. A package in accordance with one embodiment includes a microfeature device having a plurality...
7368800 Methods of forming trench isolation in the fabrication of integrated circuitry, methods of fabricating memory circuitry, integrated circuitry and memory integrated circuitry  
The invention includes methods of forming trench isolation in the fabrication of integrated circuitry, methods of fabricating integrated circuitry including memory circuitry, and integrated...
7368796 Metal gate engineering for surface P-channel devices  
A semiconductor device, such as a CMOS device, having gates with a high work function in PMOS regions and low work functions in NMOS regions and a method of producing the same. Using nitrogen...
7368790 Strained Si/SiGe/SOI islands and processes of making same  
A process of making a strained silicon-on-insulator structure is disclosed. A recess is formed in a substrate to laterally isolate an active area. An undercutting etch forms a bubble recess under...
7368701 Optical channels for multi-level metal optical imagers and method for manufacturing same  
The manufacture of multi-level optical imagers and the resulting imagers are described. Multiple levels of metallization are prepared, each level having a via. The vias are aligned and a material...
7368698 Imaging device with reduced row readout time and method of operating the same  
An imager in which a column line bias current control signal is pulsed at some time during and/or after the pulsing of the reset control and the transfer control signals to increase a bias current...
7368696 Generation and storage of column offsets for a column parallel image sensor  
The plural signal chains of an imaging device are calibrated in the digital domain. The pixel array of the imaging device includes a row of calibration pixels. The column circuitry, prior to...
7368678 Method for sorting integrated circuit devices  
A method for sorting integrated circuit (IC) devices of the type having a substantially unique identification (ID) code, such as a fuse ID, including automatically reading the ID code of each of...
7368416 Methods of removing metal-containing materials  
Various methods for selectively etching metal-containing materials (such as, for example, metal nitrides, which can include, for example, titanium nitride) relative to one or more of silicon,...
7368402 Systems and methods for forming tantalum oxide layers and tantalum precursor compounds  
A method of forming (and apparatus for forming) a tantalum oxide layer on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process and a tantalum...
7368399 Methods of forming patterned photoresist layers over semiconductor substrates  
This invention includes methods of forming patterned photoresist layers over semiconductor substrates. In one implementation, a porous antireflective coating is formed over a semiconductor...
7368391 Methods for designing carrier substrates with raised terminals  
A method for designing a carrier substrate includes configuring at least one die-attach location and one or more terminals that protrude from a surface of the carrier substrate so as to prevent...
7368389 Methods of forming electrically conductive plugs  
A method of forming an electrically conductive plug includes providing an opening within electrically insulative material over a node location on a substrate. An electrically conductive material is...
7368382 Atomic layer deposition methods  
The invention includes an atomic layer deposition method of forming a layer of a deposited composition on a substrate. The method includes positioning a semiconductor substrate within an atomic...
7368381 Methods of forming materials  
The invention includes methods of forming films over substrates. A substrate is provided within a reaction chamber, and a mixture is also provided within the chamber. The mixture includes a...
7368378 Methods for making integrated-circuit wiring from copper, silver, gold, and other metals  
Integrated circuits, the key components in thousands of electronic and computer products, include interconnected networks of electrical components. The components are typically wired, or...
7368374 Super high density module with integrated wafer level packages  
A wafer level package, and a semiconductor wafer, electronic system, and a memory module that include one or more of the wafer level packages, and methods of fabricating the die packages on a wafer...
7368372 Methods of fabricating multiple sets of field effect transistors  
The invention includes methods of fabricating multiple sets of field effect transistors. In one implementation, an etch stop layer is formed over an insulative capping layer which is formed over a...
7368366 Methods of forming trench isolation in the fabrication of integrated circuitry, methods of fabricating memory circuitry, integrated circuitry and memory integrated circuitry  
The invention includes methods of forming trench isolation in the fabrication of integrated circuitry, methods of fabricating integrated circuitry including memory circuitry, and integrated...
7368362 Methods for increasing photo alignment margins  
Methods and structures are provided for increasing alignment margins when contacting pitch multiplied interconnect lines with other conductive features in memory devices. The portions of the lines...
7368344 Methods of reducing floating body effect  
Methods of reducing the floating body effect in vertical transistors are disclosed. The floating body effect occurs when an active region in a pillar is cut off from the substrate by a depletion...
7368343 Low leakage MIM capacitor  
Capacitor structures for use in integrated circuits and methods of their manufacture. The capacitor structures include a bottom electrode, a top electrode and a dielectric layer interposed between...
7368339 Method and apparatus providing CMOS imager device pixel with transistor having lower threshold voltage than other imager device transistors  
A transistor of a pixel cell for use in a CMOS imager with a low threshold voltage of about 0.3 V to less than about 0.7 V is disclosed. The transistor is provided with high dosage source and drain...
7368320 Method of fabricating a two die semiconductor assembly  
A semiconductor die assembly includes a substantially planar lead frame including a die paddle and a plurality of lead fingers, a first semiconductor die secured by an active surface thereof to the...
7368014 Variable temperature deposition methods  
A deposition method may include, at a first temperature, contacting a substrate with a first precursor and chemisorbing a first layer at least one monolayer thick over the substrate. At a second...
7367871 Semiconductor processing methods of removing conductive material  
The invention includes a semiconductive processing method of electrochemical-mechanical removing at least some of a conductive material from over a surface of a semiconductor substrate. A cathode...
7367845 Modular sockets using flexible interconnects  
A modular bare die socket assembly is provided for attaching a plurality of miniature semiconductor dice to a substrate. The socket assembly is comprised of a plurality of two-sided plates joined...
7367343 Method of cleaning a surface of a cobalt-containing material, method of forming an opening to a cobalt-containing material, semiconductor processing method of forming an integrated circuit comprising a copper-containing conductive line, and a cobalt-containing film cleaning solution  
The invention includes methods of cleaning a surface of a cobalt-containing material, methods of forming an opening to a cobalt-containing material, semiconductor processing methods of forming an...
7367252 Integrated circuit package separators  
An integrated circuit package separator. A base having a plurality of pins extending upwardly therefrom is provided. A support is provided over the base. The support has an upper surface and a...
7366985 Text based markup language resource interface  
A software control method and apparatus for displaying a text based markup language interface. The interface can interact with a computer to provide reference documents, install system drivers and...
7366966 System and method for varying test signal durations and assert times for testing memory devices  
A testing system includes a phase interpolator receiving a clock signal. An output of the phase interpolator is coupled to both a first signal distribution tree that includes a first delay line in...
7366946 ROM redundancy in ROM embedded DRAM  
Redundancy in a read only memory (ROM) embedded dynamic random access memory (DRAM) is accomplished by programming redundancy elements such as antifuses or registers with ROM data which is read...
7366942 Method and apparatus for high-speed input sampling  
A signal sampler and method for high-speed input sampling of a signal are disclosed. A first sampler samples a data signal at a rising edge of a clock signal and generates a first sampled signal. A...
7366920 System and method for selective memory module power management  
A memory module includes a memory hub that monitors utilization of the memory module and directs devices of the memory module to a reduced power state when the module is not being used at a desired...
7366864 Memory hub architecture having programmable lane widths  
A processor-based system includes a processor coupled to a system controller through a processor bus. The system controller is used to couple at least one input device, at least one output device,...
7366051 Word line driver circuitry and methods for using the same  
Word line driver circuitry for selectively charging and discharging one or more word lines is provided. The driver circuitry uses a dual transistor topology, where a first transistor is driven by a...
7366045 Power circuits for reducing a number of power supply voltage taps required for sensing a resistive memory  
A resistive memory device requires a power supply having a reduced number of voltage taps and reduced power consumption. In accordance with one exemplary embodiment, one or more voltages used by a...
7366041 Input buffer for low voltage operation  
An input buffer having differential amplifiers for receiving input signals to generate an output signal. The input buffer operates with a relatively low supply voltage and a relatively wide range...
7366030 Simultaneous read circuit for multiple memory cells  
A memory device including a simultaneous read circuit design for multiple memory cells on a single interconnect using a fast fourier transform analysis circuit. The simultaneous read circuit can be...
7366027 Method and apparatus for erasing memory  
The present invention provides a method and apparatus for erasing memory blocks. The apparatus includes a first plurality of memory cells formed in a substrate and a second plurality of memory...
7366021 Method and apparatus for sensing flash memory using delta sigma modulation  
A simple method and device for accurately measuring flash memory cell current. The sensing scheme comprises an integrator, an analog to digital converter, and a digital to analog converter. The...
7366017 Method for modifying data more than once in a multi-level cell memory location within a memory array  
A method and apparatus for programming one or more bits in an upper page twice depending on the value in a corresponding bit in a corresponding lower page in a multi-level cell device. The method...
7366013 Single level cell programming in a multiple level cell non-volatile memory device  
A multiple level cell memory array has an area that can be programmed as single level cells. The cells to be programmed are initially programmed with the desire data into either the least...
7366003 Method of operating a complementary bit resistance memory sensor and method of operation  
A method and apparatus are disclosed for sensing the resistance state of a resistance-based memory element using complementary resistance-based elements, one holding the resistance state being...
Matches 51 - 100 out of 16945 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >