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7285468 Methods of forming semiconductor constructions  
The invention includes a semiconductor construction having a pair of channel regions that have sub-regions doped with indium and surrounded by boron. A pair of transistor constructions are located...
7285442 Stackable ceramic FBGA for high thermal applications  
An apparatus package for high-temperature thermal applications for ball grid array semiconductor devices and a method of packaging ball grid array semiconductor devices.
7285196 Methods and apparatus for making integrated-circuit wiring from copper, silver, gold, and other metals  
In recent years, copper wiring has emerged as a promising substitute for the aluminum wiring in integrated circuits, because copper offers lower electrical resistance and better reliability at...
7285037 Systems including differential pressure application apparatus  
A differential pressure application apparatus is configured to apply different amounts of pressure to different locations of a substrate, such as a semiconductor device structure. The apparatus may...
7284315 Method of forming a magnetic tunnel junction  
A method of forming a magnetic tunnel junction memory element and the resulting structure are disclosed. A magnetic tunnel junction memory element comprising a thick nonmagnetic layer between two...
7284169 System and method for testing write strobe timing margins in memory devices  
Write strobe preamble/postamble test circuitry includes a test signal generator generating first and second digital signals. Also included are a pair of phase interpolators for varying the...
7283663 Interpolation of edge portions of a digital image  
A method and apparatus for interpolating color image information are provided. One or more image data values for a portion of a digital image in a vicinity of a target pixel are received and stored...
7283418 Memory device and method having multiple address, data and command buses  
A dynamic random access memory (“DRAM”) device includes a pair of internal address buses that are selectively coupled to an external address bus by an address multiplexer, and a pair of...
7283394 Trench corner effect bidirectional flash memory cell  
A non-volatile memory cell structure that is capable of holding two data bits. The structure includes a trench in a substrate with two sides of the trench being lined with a trapping material. The...
7283205 Optimized optical lithography illumination source for use during the manufacture of a semiconductor device  
A method and structure for optimizing an optical lithography illumination source may include a shaped diffractive optical element (DOE) interposed between the illuminator and a lens during the...
7283164 Method for detecting and correcting defective pixels in a digital image sensor  
A bad pixel correction (BPC) algorithm that can be implemented on the image sensor chip is provided for detecting and correcting defective pixels in a digital color image sensor. Gradients of...
7283080 High density row RAM for column parallel CMOS image sensors  
A readout circuit of an imager that enables analog-to-digital converters (ADCs) to be shared between columns of the imager is provided. Groups of ADCs share a single block of memory for storing...
7283035 Radio frequency data communications device with selectively removable antenna portion and method  
An adjustable radio frequency data communications device has a monolithic semiconductor integrated circuit with integrated circuitry, interrogation receiving circuitry provided on the monolithic...
7282996 Electronic amplifier with signal gain dependent bias  
An apparatus having an electronic amplifier with signal gain dependent bias. The electronic apparatus includes the amplifier and a bias state control circuit. The electronic amplifier has a signal...
7282972 Bias generator with feedback control  
A bias generator for initializing a voltage controlled delay line by providing the voltage controlled delay line with a control signal having an initial voltage and monitoring the variable delay...
7282948 MOS linear region impedance curvature correction  
A system and method to correct or cancel MOS linear region impedance curvature employing an analog solution to trim out the MOS linear region impedance curvature while accommodating PVT spreads in...
7282947 Memory module and method having improved signal routing topology  
A registered memory module includes several memory devices coupled to a register through a plurality of transmission lines forming a symmetrical tree topology. The tree includes several branches...
7282939 Circuit having a long device configured for testing  
An integrated device includes a redundant bond pad for accessing internal circuitry in the event that the main bond pad for that circuitry is difficult to access with testing equipment. Signals...
7282932 Compliant contact pin assembly, card system and methods thereof  
A compliant contact pin assembly, a contactor card, a testing system and methods for making and testing are provided. A compliant contact pin assembly includes a contact pin formed from a portion...
7282806 Semiconductor devices at least partially covered by a composite coating including particles dispersed through photopolymer material  
Devices include at least one semiconductor die including at least one surface that is at least partially covered by a photopolymer material. The photopolymer material includes a plurality of...
7282805 Bond pad rerouting element and stacked semiconductor device assemblies including the rerouting element  
A rerouting element for a semiconductor device includes a dielectric film that carries conductive vias, conductive elements, and contact pads. The conductive vias are positioned at locations that...
7282793 Multiple die stack apparatus employing T-shaped interposer elements  
Multiple integrated circuit devices in a stacked configuration that use a spacing element for allowing increased device density and increased thermal conduction or heat removal for semiconductor...
7282792 Methods for stacking wire-bonded integrated circuit dice on flip-chip bonded integrated circuit dice  
An inventive electronic device, such as a multi-chip module (MCM), a Single In-line Memory Module (SIMM), or a Dual In-line Memory Module (DIMM), includes a base, such as a printed circuit board,...
7282789 Back-to-back semiconductor device assemblies  
A back-to-back semiconductor device assembly includes two vertically mountable semiconductor devices, the backs of which are secured to one another. The bond pads of both semiconductor devices are...
7282784 Methods of manufacture of a via structure comprising a plurality of conductive elements and methods of forming multichip modules including such via structures  
A method of forming a multiconductor via includes forming at least one seed layer in at least one through-hole of a substrate, selectively patterning the seed layer to form a plurality of laterally...
7282783 Resistance variable memory device and method of fabrication  
Methods and apparatus for providing a resistance variable memory device with agglomeration prevention and thermal stability. According to one embodiment, a resistance variable memory device is...
7282762 4F2 EEPROM NROM memory arrays with vertical devices  
NROM EEPROM memory devices and arrays are described that facilitate the use of vertical NROM memory cells and select gates in NOR or NAND high density memory architectures. Memory embodiments of...
7282756 Structurally-stabilized capacitors and method of making of same  
Structurally-stable, tall capacitors having unique three-dimensional architectures for semiconductor devices are disclosed. The capacitors include monolithically-fabricated upright microstructures,...
7282685 Multi-point correlated sampling for image sensors  
An improved passive pixel sensor (PPS) circuit comprising a correlated sampling circuit and method that integrates pixel charge leakage onto an integrating amplifier during sampling periods. An...
7282666 Method and apparatus to increase throughput of processing using pulsed radiation sources  
A material processing system and method is disclosed for processing materials such as amorphous silicon in an annealing processes and lithography processes on a silicon wafer, as well as ablation...
7282457 Apparatus for stabilizing high pressure oxidation of a semiconductor device  
A method and apparatus for preventing N 2 O from becoming super critical during a high pressure oxidation stage within a high pressure oxidation furnace is disclosed. The method and apparatus...
7282447 Method for an integrated circuit contact  
A process is provided for forming vertical contacts in the manufacture of integrated circuits and devices. The process eliminates the need for precise mask alignment and allows the etch of the...
7282443 Methods of forming metal silicide  
The invention includes methods of forming metal silicide having bulk resistance of less than 30 micro-ohms-centimeter. The metal of the metal silicide can be selected from Groups 3, 4, 8, 9 and 10...
7282440 Integrated circuit contact  
A process is provided for forming vertical contacts in the manufacture of integrated circuits and devices so manufactured. The process eliminates the need for precise mask alignment and allows the...
7282439 Anti-reflective coating doped with carbon for use in integrated circuit technology and method of formation  
The invention pertains to films comprising silicon, oxygen and carbon and the use of the films in integrated circuit technology, such as capacitor constructions, DRAM constructions, semiconductive...
7282433 Interconnect structures with bond-pads and methods of forming bump sites on bond-pads  
Microelectronic workpieces that have bump sites over bond-pads and methods of fabricating such bump sites. One embodiment of such a workpiece, for example, includes a substrate having a plurality...
7282409 Isolation structure for a memory cell using Al2O3 dielectric  
The invention provides, in one exemplary embodiment, an isolation gate formed over a substrate for biasing the substrate and providing isolation between adjacent active areas of an integrated...
7282408 Surface treatment of an oxide layer to enhance adhesion of a ruthenium metal layer  
A method for forming a ruthenium metal layer on a dielectric layer comprises forming a silicon dioxide layer, then treating the silicon dioxide with a silicon-containing gas, for example silicon...
7282401 Method and apparatus for a self-aligned recessed access device (RAD) transistor gate  
A method used in fabrication of a recessed access device transistor gate has increased tolerance for mask misalignment. One embodiment of the invention comprises forming a vertical spacing layer...
7282400 Method and apparatus on (110) surfaces of silicon structures with conduction in the <110> direction  
Improved methods and structures are provided that are lateral to surfaces with a (110) crystal plane orientation such that an electrical current of such structures is conducted in the <110>...
7282397 Methods for designing bond pad rerouting elements for use in stacked semiconductor device assemblies and for assembling semiconductor devices  
A rerouting element for a semiconductor device includes a substantially planar member that carries at least one contact location, at least one conductive, at least one rerouted bond pad. The...
7282392 Method of fabricating a stacked die in die BGA package  
Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies for increasing semiconductor device density are provided.
7282390 Stacked die-in-die BGA package with die having a recess  
Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies are provided. In an embodiment of the methods, a second die is mounted on a first die which...
7282387 Electro- and electroless plating of metal in the manufacture of PCRAM devices  
Non-volatile, resistance variable memory devices, integrated circuit elements, and methods of forming such devices are provided. According to one embodiment of a method of the invention, a memory...
7282239 Systems and methods for depositing material onto microfeature workpieces in reaction chambers  
In one embodiment, the system includes a gas supply assembly having a first gas source, a first gas conduit coupled to the first gas source, a first valve assembly, a reaction chamber, and a gas...
7282131 Methods of electrochemically treating semiconductor substrates  
The invention includes methods of electrochemically treating semiconductor substrates. The invention includes a method of electroplating a substance. A substrate having defined first and second...
7281952 Edge connector including internal layer contact, printed circuit board and electronic module incorporating same  
An edge connector, system, printed circuit board and electronic module are described, which include an edge connector comprised of a substrate, including a first major exterior surface, a second...
7280729 Semiconductor constructions and light-directing conduits  
The invention includes optical signal conduits having rare earth elements incorporated therein. The optical signal conduits can, for example, contain rare earth elements incorporated within a...
7280549 High speed ring/bus  
A data communication bus and method of operation thereof, including a plurality of nodes connected to a respective plurality of media segments. A typical node includes an output port coupled to a...
7280420 Data compression read mode for memory testing  
Memory devices having a normal mode of operation and a test mode of operation are useful in quality programs. The test mode of operation includes a data compression test mode. In the data...