Matches 601 - 650 out of 16945 < 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 >
Match Document Document Title
7292491 Method and apparatus for controlling refresh operations in a dynamic memory device  
A method and apparatus are provided for controlling refresh operations of a dynamic memory device. The temperature of the dynamic memory device is detected. The detected temperature is then used to...
7292489 Circuits and methods of temperature compensation for refresh oscillator  
A memory device has refresh cycles to refresh memory cells of the memory device. The time interval between one refresh cycle to the next refresh cycle is a refresh interval. The refresh interval...
7292487 Independent polling for multi-page programming  
A method of testing, polling and trimming memory pages in different memory banks simultaneously is presented, using a cache memory located in each one of the memory banks. The cache memory is at...
7292476 Programming method for NAND EEPROM  
A NAND architecture non-volatile memory device and programming process is described that programs the various cells of strings of non-volatile memory cells by the application of differing word line...
7291920 Semiconductor structures  
In one aspect, the invention includes a method of forming a roughened layer of platinum, comprising: a) providing a substrate within a reaction chamber; b) flowing an oxidizing gas into the...
7291917 Integrated circuitry  
Methods of forming contact openings, making electrical interconnections, and related integrated circuitry are described. Integrated circuitry formed through one or more of the inventive...
7291900 Lead frame-based semiconductor device packages incorporating at least one land grid array package  
A lead frame-based semiconductor device package including at least one land grid array package. At least one semiconductor die is mounted to an interposer substrate, with bond pads of the...
7291895 Integrated circuitry  
A silicon nitride comprising layer formed over a semiconductor substrate includes Al, Ga or a mixture thereof. A silicon dioxide comprising layer is formed proximate thereto. The silicon dioxide...
7291880 Transistor assembly  
Semiconductor processing methods of forming transistors, semiconductor processing methods of forming dynamic random access memory circuitry, and related integrated circuitry are described. In one...
7291822 Amplification with feedback capacitance for photodetector signals  
Signals from an imager pixel photodetector are received by an amplifier having capacitive feedback, such as a capacitive transimpedance amplifier (CTIA). The amplifier can be operated at a low or...
7291563 Method of etching a substrate; method of forming a feature on a substrate; and method of depositing a layer comprising silicon, carbon, and fluorine onto a semiconductor substrate  
The invention includes methods of etching substrates, methods of forming features on substrates, and methods of depositing a layer comprising silicon, carbon and fluorine onto a semiconductor...
7291555 Methods of forming a reaction product and methods of forming a conductive metal silicide by reaction of metal with silicon  
A method of forming a reaction product includes providing a semiconductor substrate comprising a first material. A second material is formed over the first material. The first and second materials...
7291543 Thin flip-chip method  
Methods for thinning a bumped semiconductor wafer, as well as methods for producing flip-chips of very thin profiles, are disclosed. According to the methods of the present invention, a mold...
7291519 Methods of forming transistor constructions  
The invention includes a non-volatile memory cell comprising a field effect transistor construction having a body region within a crystalline material. The body region includes a charge trapping...
7291425 Radiation patterning tools, and methods of forming radiation patterning tools  
The invention includes, for example, a radiation patterning tool which can be utilized to form relatively circular contacts in situations in which an array of contacts has a different pitch along a...
7290242 Pattern generation on a semiconductor surface  
A method of forming a pattern of elements is shown. In one embodiment, the method is used to create a reticle. In another embodiment, the method is used to further form a number of elements on a...
7289384 Method for writing to multiple banks of a memory device  
In a multi-bank memory system such as a synchronous dynamic random access memory (SDRAM), a method of writing data to the banks is provided. This method allows for writing to any number of banks....
7289378 Reconstruction of signal timing in integrated circuits  
Improved integrated circuits, memory devices, circuitry, and data methods are described that facilitate the adjustment and reconstruction of signal timing of devices by providing for an interface...
7289363 Memory cell repair using fuse programming method in a flash memory device  
A method for repairing cells of a flash memory array includes using a fuse memory array circuit. The fuse memory cells are initially programmed. The locations of defective memory cells of the main...
7289349 Resistance variable memory element with threshold device and method of forming the same  
A memory device having a memory portion connected in series with a threshold device between. The memory portion stores at least one bit of data based on at least two resistance states. The...
7289347 System and method for optically interconnecting memory devices  
A memory device includes a semiconductor substrate in which memory circuitry has been fabricated. An address converter and a control signal converter are coupled to an address decoder and control...
7288954 Compliant contact pin test assembly and methods thereof  
A compliant contact pin assembly and a contactor card and methods for testing therewith are provided. The compliant contact pin assembly includes a contact pin formed from a portion of a substrate...
7288953 Method for testing using a universal wafer carrier for wafer level die burn-in  
A reusable burn-in/test fixture for testing unsingulated dice on a semiconductor wafer consisting of two halves. The first half of the test fixture is a wafer cavity plate for receiving the wafer,...
7288819 Stable PD-SOI devices and methods  
One aspect of the present subject matter relates to a partially depleted silicon-on-insulator structure. The structure includes a well region formed above an oxide insulation layer. In various...
7288817 Reverse metal process for creating a metal silicide transistor gate structure  
The present invention teaches a method of forming a MOSFET transistor having a silicide gate which is not subject to problems produced by etching a metal containing layer when forming the gate...
7288808 Capacitor constructions with enhanced surface area  
A capacitor fabrication method may include forming a first capacitor electrode over a substrate, the first electrode having an inner surface area per unit area and an outer surface area per unit...
7288806 DRAM arrays  
The invention includes memory arrays, and methods which can be utilized for forming memory arrays. A patterned etch stop can be used during memory array fabrication, with the etch stop covering...
7288784 Structure for amorphous carbon based non-volatile memory  
A memory device including at least one first memory element comprising a first layer of amorphous carbon over at least one second memory element comprising a second layer of amorphous carbon. The...
7288757 Microelectronic imaging devices and associated methods for attaching transmissive elements  
Microelectronic imaging devices and associated methods for attaching transmissive elements are disclosed. A manufacturing method in accordance with one embodiment of the invention includes...
7288441 Method for two-stage transfer molding device to encapsulate MMC module  
A method for fabricating a semiconductor card includes a printed circuit substrate upon which is mounted a card circuit including one or more semiconductor components such as dice or packages....
7288431 Molded stiffener for thin substrates  
A stiffener molded to a semiconductor substrate, such as a lead frame, and methods of molding the stiffener to the substrate are provided. The stiffener is molded to the substrate to provide...
7287326 Methods of forming a contact pin assembly  
A compliant contact pin assembly method for making is provided. The compliant contact pin assembly includes a contact pin formed from a portion of a substrate with the contact pin compliantly held...
7287108 Capacitive multidrop bus compensation  
The signal integrity of a high speed heavily loaded multidrop memory bus is often degraded due the numerous impedance mismatches. The impedance mismatches causes the bus to exhibit a nonlinear...
7286428 Offset compensated sensing for magnetic random access memory  
An offset compensated memory element voltage supply including a differential amplifier with a compensation circuit, and a transistor with a gate connected to the output of the differential...
7286417 Low power dissipation voltage generator  
A voltage generator circuit is described for providing a regulated voltage, such as a negative word line voltage in a semiconductor memory. The generator uses a source transistor to couple a...
7286378 Serial transistor-cell array architecture  
A memory device having memory cells in which a single access transistor controls the grounding of at least four storage elements, such as resistive storage elements, for purposes of reading the...
7286180 CMOS image sensor with a low-power architecture  
A system of reducing power consumption in and active pixels sensor. The sensor is broken into different blocks, and each of the blocks is individually optimized. The optimization may include...
7285986 High speed, low power CMOS logic gate  
A logic gate with a differential evaluation stage, precharge circuitry for precharging outputs of the gate, latch circuitry for latching the outputs and an inverter. The gate uses high speed, low...
7285979 Apparatus and method for independent control of on-die termination for output buffers of a memory device  
An apparatus and method providing independent control of on-die termination (ODT) of output buffers. The ODTs for the buffer circuits of an input/output (I/O) buffer can be enabled and disabled in...
7285971 Integrated circuit (IC) test assembly including phase change material for stabilizing temperature during stress testing of integrated circuits and method thereof  
A testing apparatus and method for testing integrated circuits is disclosed wherein a device under test is continuously maintained at a desired set point temperature by an included thermal body....
7285970 Load board socket adapter and interface method  
A load board adapter which is removably attachable to a load board and provides removable and replaceable sockets for individual integrated circuit packages to provide an electrical connection...
7285850 Support elements for semiconductor devices with peripherally located bond pads  
A support structure for a semiconductor device with peripherally disposed contacts includes a support substrate and at least one conductive column protruding from the support substrate. The at...
7285839 Coating of copper and silver air bridge structures to improve electromigration resistance and other applications  
An improved electrical interconnect for an integrated circuit and methods for providing the same are disclosed. The electrical interconnect includes an air bridge extending through a gaseous medium...
7285821 Trench corner effect bidirectional flash memory cell  
A non-volatile memory cell structure that is capable of holding two data bits. The structure includes a trench in a substrate with two sides of the trench being lined with a trapping material. The...
7285814 Dynamic random access memory circuitry and integrated circuitry  
A method of forming a conductive contact to a conductive structure includes forming a conductive structure received within and projecting outwardly from a first insulative material. A second...
7285812 Vertical transistors  
Vertical transistors for memory cells, such as 4F2 memory cells, are disclosed. The memory cells use digit line connections formed within the isolation trench to connect the digit line with the...
7285811 MRAM device for preventing electrical shorts during fabrication  
The present invention provides an MRAM cell which minimizes the occurrence of electrical shorts during fabrication. A first conductor is provided in a trench in an insulating layer and an upper...
7285798 CMOS inverter constructions  
Thin film transistor based three-dimensional CMOS inverters utilizing a common gate bridged between a PFET device and an NFET device. One or both of the NFET and PFET devices can have an active...
7285796 Raised photodiode sensor to increase fill factor and quantum efficiency in scaled pixels  
An image pixel cell with a doped, hydrogenated amorphous silicon photosensor, raised above the surface of a substrate is provided. Methods of forming the raised photosensor are also disclosed....
7285502 Methods for forming porous insulator structures on semiconductor devices  
A method for forming a porous insulative structure on a semiconductor device structure includes forming a layer of unconsolidated electrically insulative, or dielectric, material with microcapsules...
Matches 601 - 650 out of 16945 < 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 >